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[v2,31/54] net/e1000/base: add queue select definitions

Message ID 24d29d54a9d90e9c6dc99c33b6e3a00266b800d0.1738681726.git.anatoly.burakov@intel.com (mailing list archive)
State Superseded
Delegated to: Bruce Richardson
Headers
Series Merge Intel IGC and E1000 drivers, and update E1000 base code |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Burakov, Anatoly Feb. 4, 2025, 3:10 p.m. UTC 
From: Sasha Neftin <sasha.neftin@intel.com>

Add definitions for address select mask (selects source address to be
used in the address filtering), as well as queue select (indicates which
Rx queue should get the packet matching this MAC address).

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
 drivers/net/intel/e1000/base/e1000_defines.h | 7 +++++++
 1 file changed, 7 insertions(+)
diff mbox series

Patch

diff --git a/drivers/net/intel/e1000/base/e1000_defines.h b/drivers/net/intel/e1000/base/e1000_defines.h
index 2c3b806c92..c311858d35 100644
--- a/drivers/net/intel/e1000/base/e1000_defines.h
+++ b/drivers/net/intel/e1000/base/e1000_defines.h
@@ -685,6 +685,13 @@ 
  */
 #define E1000_RAR_ENTRIES	15
 #define E1000_RAH_AV		0x80000000 /* Receive descriptor valid */
+#define E1000_RAH_RAH_MASK	0x0000FFFF
+#define E1000_RAH_ASEL_MASK	0x00030000
+#define E1000_RAH_ASEL_SRC_ADD	0x00010000
+#define E1000_RAH_QSEL_MASK	0x000C0000
+#define E1000_RAH_QSEL_SHIFT	18
+#define E1000_RAH_ASEL_SRC_ADDR	0x00010000
+#define E1000_RAH_QSEL_ENABLE	0x10000000
 #define E1000_RAL_MAC_ADDR_LEN	4
 #define E1000_RAH_MAC_ADDR_LEN	2
 #define E1000_RAH_QUEUE_MASK_82575	0x000C0000