From patchwork Mon Sep 2 09:54:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Burakov, Anatoly" X-Patchwork-Id: 143564 X-Patchwork-Delegate: bruce.richardson@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5859F458CD; Mon, 2 Sep 2024 11:58:13 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 573FA40E15; Mon, 2 Sep 2024 11:55:51 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.13]) by mails.dpdk.org (Postfix) with ESMTP id 6EA204065F for ; Mon, 2 Sep 2024 11:55:28 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1725270928; x=1756806928; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=6xqE+vhnbouNASZrURNaPJofoBAeR/nZHloJ1CECPuM=; b=PszpAVxLaJ4TLKRHr8POc46uGamonLrr76lKci3iU47kgKEC2c89jxkt KLht8lT3WTAYLLY+izFoczGL7ypWYk3liC+69eCG4UW1+UP8tS2EsaeJY xCnpAKA1F5DaHCyYrslxWK7RYEIF0EdaCIbl1TDaplwpqbTiQwjI8kxNt qLdloOs9LKq7hmQHufktFS4o0QcpttJQb6tCVkyM+GCne5SbsgOvh37mj KbvhCRy+tG1vkEzKrH01Nsj2BuHRxAc2JrNqOzHMHtQ+s/C+2f1VTpEZ4 QxQ+RWZlMDl0ZtopwTvdqzYmfxa6m3onyGp+xyPBR7tQX5opLnG4zUK76 w==; X-CSE-ConnectionGUID: /V80N/EtRheIymBOoc4xVg== X-CSE-MsgGUID: xNNcPIQJSPuPw+8xrjC9ig== X-IronPort-AV: E=McAfee;i="6700,10204,11182"; a="26747258" X-IronPort-AV: E=Sophos;i="6.10,195,1719903600"; d="scan'208";a="26747258" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by fmvoesa107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Sep 2024 02:55:27 -0700 X-CSE-ConnectionGUID: beVrzclDRo+ndOT3OqIfGQ== X-CSE-MsgGUID: peNPXxyLSlOu/+H2haM3pQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,195,1719903600"; d="scan'208";a="64598026" Received: from silpixa00401119.ir.intel.com ([10.55.129.167]) by fmviesa009.fm.intel.com with ESMTP; 02 Sep 2024 02:55:26 -0700 From: Anatoly Burakov To: dev@dpdk.org Cc: bruce.richardson@intel.com Subject: [PATCH v1 29/30] net/i40e/base: add Shadow RAM pointer definition Date: Mon, 2 Sep 2024 10:54:41 +0100 Message-ID: <452cdc85bfde0919543009f7f4b3f9c110e0ff3e.1725270827.git.anatoly.burakov@intel.com> X-Mailer: git-send-email 2.43.5 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Bartosz Jakub Rosadzinski This commit introduces a definition of the 5th Free Provisioning Area pointer in Shadow RAM. 5th PFA is used during NVM update for storing X710-T2L/X710-T4L's Phy Firmware. Signed-off-by: Bartosz Jakub Rosadzinski Signed-off-by: Anatoly Burakov --- drivers/net/i40e/base/i40e_type.h | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h index 5d59446d96..7cc746f82f 100644 --- a/drivers/net/i40e/base/i40e_type.h +++ b/drivers/net/i40e/base/i40e_type.h @@ -1554,6 +1554,7 @@ struct i40e_hw_port_stats { #define I40E_SR_FEATURE_CONFIGURATION_PTR 0x49 #define I40E_SR_CONFIGURATION_METADATA_PTR 0x4D #define I40E_SR_IMMEDIATE_VALUES_PTR 0x4E +#define I40E_SR_5TH_FREE_PROVISION_AREA_PTR 0x50 #define I40E_SR_PRESERVATION_RULES_PTR 0x70 #define I40E_X722_SR_5TH_FREE_PROVISION_AREA_PTR 0x71 #define I40E_SR_6TH_FREE_PROVISION_AREA_PTR 0x71