[v2,031/148] net/ice/base: prevent potential integer overflow

Message ID 58c45080d5fc262d85cf050239acb7a3be492e75.1718204528.git.anatoly.burakov@intel.com (mailing list archive)
State Superseded, archived
Delegated to: Bruce Richardson
Headers
Series Update net/ice base driver to latest upstream snapshot |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Burakov, Anatoly June 12, 2024, 3 p.m. UTC
From: Ian Stokes <ian.stokes@intel.com>

The original bit-shift was made on a 16-bit value which could overflow.
Use 64-bit integer to do bit-shifts instead.

Signed-off-by: Lukasz Plachno <lukasz.plachno@intel.com>
Signed-off-by: Ian Stokes <ian.stokes@intel.com>
---
 drivers/net/ice/base/ice_parser_rt.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
  

Patch

diff --git a/drivers/net/ice/base/ice_parser_rt.c b/drivers/net/ice/base/ice_parser_rt.c
index 69655fdd96..50a3d301b0 100644
--- a/drivers/net/ice/base/ice_parser_rt.c
+++ b/drivers/net/ice/base/ice_parser_rt.c
@@ -469,9 +469,9 @@  static void _err_add(struct ice_parser_rt *rt, int idx, bool val)
 {
 	rt->pu.err_msk |= (u16)(1 << idx);
 	if (val)
-		rt->pu.flg_val |= (u16)(1 << idx);
+		rt->pu.flg_val |= (1ULL << idx);
 	else
-		rt->pu.flg_val &= ~(u16)(1 << idx);
+		rt->pu.flg_val &= ~(1ULL << idx);
 
 	ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Pending update for error %d value %d\n",
 		  idx, val);