diff mbox series

[v1,09/24] net/igc/base: fix semaphore timeout value

Message ID	5c9fdb9467947a1f77eae339a33844907be9033d.1738858026.git.anatoly.burakov@intel.com (mailing list archive)
State	Accepted
Delegated to:	Bruce Richardson
Headers	From: Anatoly Burakov <anatoly.burakov@intel.com> To: dev@dpdk.org, Alvin Zhang <alvinx.zhang@intel.com>, Ferruh Yigit <ferruh.yigit@intel.com> Subject: [PATCH v1 09/24] net/igc/base: fix semaphore timeout value Date: Thu, 6 Feb 2025 16:08:32 +0000 Message-ID: <5c9fdb9467947a1f77eae339a33844907be9033d.1738858026.git.anatoly.burakov@intel.com> In-Reply-To: <cover.1738858026.git.anatoly.burakov@intel.com> References: <cover.1738328106.git.anatoly.burakov@intel.com> <cover.1738858026.git.anatoly.burakov@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: list Errors-To: dev-bounces@dpdk.org
Series	Fixes for igc and e1000 \| [v1,00/24] Fixes for igc and e1000 [v1,01/24] net/igc/base: fix deadlock in i225 [v1,02/24] net/igc/base: fix infinite loop [v1,03/24] net/igc/base: fix bitwise op type mismatch [v1,04/24] net/igc/base: increase PHY power up delay [v1,05/24] net/igc/base: reset loop variable [v1,06/24] net/igc/base: fix LTR for i225 [v1,07/24] net/igc/base: fix typo in LTR calculation [v1,08/24] net/igc/base: fix unused value [v1,09/24] net/igc/base: fix semaphore timeout value [v1,10/24] net/igc/base: fix iterator type [v1,11/24] net/igc/base: fix MAC addr hash bit shift [v1,12/24] net/igc/base: fix data type in MAC hash [v1,13/24] net/igc/base: fix static analysis warning [v1,14/24] net/e1000/base: fix semaphore timeout value [v1,15/24] net/e1000/base: correct mPHY access logic [v1,16/24] net/e1000/base: fix iterator type [v1,17/24] net/e1000/base: fix MAC addr hash bit shift [v1,18/24] net/e1000/base: fix data type in MAC hash [v1,19/24] net/e1000/base: fix uninitialized variable usage [v1,20/24] net/e1000/base: fix static analysis warning [v1,21/24] net/e1000/base: fix static analysis warning [v1,22/24] net/e1000/base: fix reset for 82580 [v1,23/24] net/e1000/base: fix unchecked return [v1,24/24] net/e1000/base: skip MANC check for 82575

Checks

Context	Check	Description
ci/checkpatch	success	coding style OK

Commit Message

Burakov, Anatoly Feb. 6, 2025, 4:08 p.m. UTC

From: Pawel Malinowski <pawel.malinowski@intel.com>

According to datasheet software ownership of SWSM.SWESMBI bit should not
exceed 100ms. Current implementation caused incorrect timeout counter
values, where each iteration equals 50us delay. Because of that driver was
allowed to wait for semaphore even for 1,5s. This might trigger DPC
timeout.

This implementation hardcodes value to 2000, which multiplied by 50us,
gives 100ms of possible wait time.

Fixes: 8cb7c57d9b3c ("net/igc: support device initialization")
Cc: stable@dpdk.org

Signed-off-by: Pawel Malinowski <pawel.malinowski@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
 drivers/net/intel/igc/base/igc_defines.h | 1 +
 drivers/net/intel/igc/base/igc_i225.c    | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)

diff mbox series

Patch

diff --git a/drivers/net/intel/igc/base/igc_defines.h b/drivers/net/intel/igc/base/igc_defines.h
index 280570b157..3cb2f430c5 100644
--- a/drivers/net/intel/igc/base/igc_defines.h
+++ b/drivers/net/intel/igc/base/igc_defines.h
@@ -525,6 +525,7 @@ 
 /* SW Semaphore Register */
 #define IGC_SWSM_SMBI		0x00000001 /* Driver Semaphore bit */
 #define IGC_SWSM_SWESMBI	0x00000002 /* FW Semaphore bit */
+#define IGC_SWSM_TIMEOUT	2000       /* Driver Semaphore max timeout counter */
 #define IGC_SWSM_DRV_LOAD	0x00000008 /* Driver Loaded Bit */
 
 #define IGC_SWSM2_LOCK	0x00000002 /* Secondary driver semaphore bit */
diff --git a/drivers/net/intel/igc/base/igc_i225.c b/drivers/net/intel/igc/base/igc_i225.c
index 23c68a3948..7352ba240a 100644
--- a/drivers/net/intel/igc/base/igc_i225.c
+++ b/drivers/net/intel/igc/base/igc_i225.c
@@ -388,7 +388,7 @@  s32 igc_setup_copper_link_i225(struct igc_hw *hw)
 static s32 igc_get_hw_semaphore_i225(struct igc_hw *hw)
 {
 	u32 swsm;
-	s32 timeout = hw->nvm.word_size + 1;
+	s32 timeout = IGC_SWSM_TIMEOUT;
 	s32 i = 0;
 
 	DEBUGFUNC("igc_get_hw_semaphore_i225");