@@ -28,7 +28,6 @@ STATIC void i40e_adminq_init_regs(struct i40e_hw *hw)
hw->aq.arq.len = I40E_VF_ARQLEN1;
hw->aq.arq.bal = I40E_VF_ARQBAL1;
hw->aq.arq.bah = I40E_VF_ARQBAH1;
-#ifdef PF_DRIVER
} else {
hw->aq.asq.tail = I40E_PF_ATQT;
hw->aq.asq.head = I40E_PF_ATQH;
@@ -40,7 +39,6 @@ STATIC void i40e_adminq_init_regs(struct i40e_hw *hw)
hw->aq.arq.len = I40E_PF_ARQLEN;
hw->aq.arq.bal = I40E_PF_ARQBAL;
hw->aq.arq.bah = I40E_PF_ARQBAH;
-#endif
}
}
@@ -278,26 +276,8 @@ STATIC enum i40e_status_code i40e_config_asq_regs(struct i40e_hw *hw)
wr32(hw, hw->aq.asq.tail, 0);
/* set starting point */
-#ifdef PF_DRIVER
-#ifdef INTEGRATED_VF
- if (!i40e_is_vf(hw))
- wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries |
- I40E_PF_ATQLEN_ATQENABLE_MASK));
-#else
wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries |
I40E_PF_ATQLEN_ATQENABLE_MASK));
-#endif /* INTEGRATED_VF */
-#endif /* PF_DRIVER */
-#ifdef VF_DRIVER
-#ifdef INTEGRATED_VF
- if (i40e_is_vf(hw))
- wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries |
- I40E_VF_ATQLEN1_ATQENABLE_MASK));
-#else
- wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries |
- I40E_VF_ATQLEN1_ATQENABLE_MASK));
-#endif /* INTEGRATED_VF */
-#endif /* VF_DRIVER */
wr32(hw, hw->aq.asq.bal, I40E_LO_DWORD(hw->aq.asq.desc_buf.pa));
wr32(hw, hw->aq.asq.bah, I40E_HI_DWORD(hw->aq.asq.desc_buf.pa));
@@ -325,26 +305,8 @@ STATIC enum i40e_status_code i40e_config_arq_regs(struct i40e_hw *hw)
wr32(hw, hw->aq.arq.tail, 0);
/* set starting point */
-#ifdef PF_DRIVER
-#ifdef INTEGRATED_VF
- if (!i40e_is_vf(hw))
- wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries |
- I40E_PF_ARQLEN_ARQENABLE_MASK));
-#else
wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries |
I40E_PF_ARQLEN_ARQENABLE_MASK));
-#endif /* INTEGRATED_VF */
-#endif /* PF_DRIVER */
-#ifdef VF_DRIVER
-#ifdef INTEGRATED_VF
- if (i40e_is_vf(hw))
- wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries |
- I40E_VF_ARQLEN1_ARQENABLE_MASK));
-#else
- wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries |
- I40E_VF_ARQLEN1_ARQENABLE_MASK));
-#endif /* INTEGRATED_VF */
-#endif /* VF_DRIVER */
wr32(hw, hw->aq.arq.bal, I40E_LO_DWORD(hw->aq.arq.desc_buf.pa));
wr32(hw, hw->aq.arq.bah, I40E_HI_DWORD(hw->aq.arq.desc_buf.pa));
@@ -552,7 +514,6 @@ enum i40e_status_code i40e_shutdown_arq(struct i40e_hw *hw)
i40e_release_spinlock(&hw->aq.arq_spinlock);
return ret_code;
}
-#ifdef PF_DRIVER
/**
* i40e_resume_aq - resume AQ processing from 0
@@ -571,7 +532,6 @@ STATIC void i40e_resume_aq(struct i40e_hw *hw)
i40e_config_arq_regs(hw);
}
-#endif /* PF_DRIVER */
/**
* i40e_set_hw_flags - set HW flags
@@ -685,9 +645,6 @@ enum i40e_status_code i40e_init_adminq(struct i40e_hw *hw)
if (ret_code != I40E_SUCCESS)
goto init_adminq_free_asq;
- /* VF has no need of firmware */
- if (i40e_is_vf(hw))
- goto init_adminq_exit;
/* There are some cases where the firmware may not be quite ready
* for AdminQ operations, so we retry the AdminQ setup a few times
* if we see timeouts in this first AQ call.
@@ -823,11 +780,7 @@ u16 i40e_clean_asq(struct i40e_hw *hw)
* Returns true if the firmware has processed all descriptors on the
* admin send queue. Returns false if there are still requests pending.
**/
-#ifdef VF_DRIVER
-bool i40e_asq_done(struct i40e_hw *hw)
-#else
STATIC bool i40e_asq_done(struct i40e_hw *hw)
-#endif
{
/* AQ designers suggest use of head for better
* timing reliability than DD bit
@@ -1028,11 +981,7 @@ i40e_asq_send_command_exec(struct i40e_hw *hw,
/* update the error if time out occurred */
if ((!cmd_completed) &&
(!details->async && !details->postpone)) {
-#ifdef PF_DRIVER
if (rd32(hw, hw->aq.asq.len) & I40E_GL_ATQLEN_ATQCRIT_MASK) {
-#else
- if (rd32(hw, hw->aq.asq.len) & I40E_VF_ATQLEN1_ATQCRIT_MASK) {
-#endif
i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE,
"AQTX: AQ Critical error.\n");
status = I40E_ERR_ADMIN_QUEUE_CRITICAL_ERROR;
@@ -1160,19 +1109,7 @@ enum i40e_status_code i40e_clean_arq_element(struct i40e_hw *hw,
}
/* set next_to_use to head */
-#ifdef INTEGRATED_VF
- if (!i40e_is_vf(hw))
- ntu = rd32(hw, hw->aq.arq.head) & I40E_PF_ARQH_ARQH_MASK;
- else
- ntu = rd32(hw, hw->aq.arq.head) & I40E_VF_ARQH1_ARQH_MASK;
-#else
-#ifdef PF_DRIVER
ntu = rd32(hw, hw->aq.arq.head) & I40E_PF_ARQH_ARQH_MASK;
-#endif /* PF_DRIVER */
-#ifdef VF_DRIVER
- ntu = rd32(hw, hw->aq.arq.head) & I40E_VF_ARQH1_ARQH_MASK;
-#endif /* VF_DRIVER */
-#endif /* INTEGRATED_VF */
if (ntu == ntc) {
/* nothing to do - shouldn't need to update ring's values */
ret_code = I40E_ERR_ADMIN_QUEUE_NO_WORK;
@@ -1230,9 +1167,7 @@ enum i40e_status_code i40e_clean_arq_element(struct i40e_hw *hw,
hw->aq.arq.next_to_clean = ntc;
hw->aq.arq.next_to_use = ntu;
-#ifdef PF_DRIVER
i40e_nvmupd_check_wait_event(hw, LE16_TO_CPU(e->desc.opcode), &e->desc);
-#endif /* PF_DRIVER */
clean_arq_element_out:
/* Set pending if needed, unlock and return */
if (pending != NULL)
@@ -46,33 +46,14 @@ enum i40e_status_code i40e_set_mac_type(struct i40e_hw *hw)
case I40E_DEV_ID_XXV710_N3000:
hw->mac.type = I40E_MAC_XL710;
break;
-#ifdef X722_A0_SUPPORT
- case I40E_DEV_ID_X722_A0:
-#endif
case I40E_DEV_ID_KX_X722:
case I40E_DEV_ID_QSFP_X722:
case I40E_DEV_ID_SFP_X722:
case I40E_DEV_ID_1G_BASE_T_X722:
case I40E_DEV_ID_10G_BASE_T_X722:
case I40E_DEV_ID_SFP_I_X722:
- case I40E_DEV_ID_SFP_X722_A:
hw->mac.type = I40E_MAC_X722;
break;
-#if defined(INTEGRATED_VF) || defined(VF_DRIVER)
- case I40E_DEV_ID_X722_VF:
-#ifdef X722_A0_SUPPORT
- case I40E_DEV_ID_X722_A0_VF:
-#endif
- hw->mac.type = I40E_MAC_X722_VF;
- break;
-#endif /* INTEGRATED_VF || VF_DRIVER */
-#if defined(INTEGRATED_VF) || defined(VF_DRIVER)
- case I40E_DEV_ID_VF:
- case I40E_DEV_ID_VF_HV:
- case I40E_DEV_ID_ADAPTIVE_VF:
- hw->mac.type = I40E_MAC_VF;
- break;
-#endif
default:
hw->mac.type = I40E_MAC_GENERIC;
break;
@@ -378,26 +359,8 @@ void i40e_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask, void *desc,
bool i40e_check_asq_alive(struct i40e_hw *hw)
{
if (hw->aq.asq.len)
-#ifdef PF_DRIVER
-#ifdef INTEGRATED_VF
- if (!i40e_is_vf(hw))
- return !!(rd32(hw, hw->aq.asq.len) &
- I40E_PF_ATQLEN_ATQENABLE_MASK);
-#else
return !!(rd32(hw, hw->aq.asq.len) &
I40E_PF_ATQLEN_ATQENABLE_MASK);
-#endif /* INTEGRATED_VF */
-#endif /* PF_DRIVER */
-#ifdef VF_DRIVER
-#ifdef INTEGRATED_VF
- if (i40e_is_vf(hw))
- return !!(rd32(hw, hw->aq.asq.len) &
- I40E_VF_ATQLEN1_ATQENABLE_MASK);
-#else
- return !!(rd32(hw, hw->aq.asq.len) &
- I40E_VF_ATQLEN1_ATQENABLE_MASK);
-#endif /* INTEGRATED_VF */
-#endif /* VF_DRIVER */
return false;
}
@@ -973,7 +936,6 @@ enum i40e_status_code i40e_validate_mac_addr(u8 *mac_addr)
return status;
}
-#ifdef PF_DRIVER
/**
* i40e_init_shared_code - Initialize the shared code
@@ -7198,7 +7160,7 @@ enum i40e_status_code i40e_led_set_phy(struct i40e_hw *hw, bool on,
status = i40e_led_set_reg(hw, led_addr, led_ctl);
return status;
}
-#endif /* PF_DRIVER */
+
/**
* i40e_get_phy_lpi_status - read LPI status from PHY or MAC register
* @hw: pointer to the hw struct
@@ -7685,105 +7647,6 @@ i40e_aq_run_phy_activity(struct i40e_hw *hw, u16 activity_id, u32 dnl_opcode,
return retval;
}
-#ifdef VF_DRIVER
-
-/**
- * i40e_aq_send_msg_to_pf
- * @hw: pointer to the hardware structure
- * @v_opcode: opcodes for VF-PF communication
- * @v_retval: return error code
- * @msg: pointer to the msg buffer
- * @msglen: msg length
- * @cmd_details: pointer to command details
- *
- * Send message to PF driver using admin queue. By default, this message
- * is sent asynchronously, i.e. i40e_asq_send_command() does not wait for
- * completion before returning.
- **/
-enum i40e_status_code i40e_aq_send_msg_to_pf(struct i40e_hw *hw,
- enum virtchnl_ops v_opcode,
- enum i40e_status_code v_retval,
- u8 *msg, u16 msglen,
- struct i40e_asq_cmd_details *cmd_details)
-{
- struct i40e_aq_desc desc;
- struct i40e_asq_cmd_details details;
- enum i40e_status_code status;
-
- i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_send_msg_to_pf);
- desc.flags |= CPU_TO_LE16((u16)I40E_AQ_FLAG_SI);
- desc.cookie_high = CPU_TO_LE32(v_opcode);
- desc.cookie_low = CPU_TO_LE32(v_retval);
- if (msglen) {
- desc.flags |= CPU_TO_LE16((u16)(I40E_AQ_FLAG_BUF
- | I40E_AQ_FLAG_RD));
- if (msglen > I40E_AQ_LARGE_BUF)
- desc.flags |= CPU_TO_LE16((u16)I40E_AQ_FLAG_LB);
- desc.datalen = CPU_TO_LE16(msglen);
- }
- if (!cmd_details) {
- i40e_memset(&details, 0, sizeof(details), I40E_NONDMA_MEM);
- details.async = true;
- cmd_details = &details;
- }
- status = i40e_asq_send_command(hw, (struct i40e_aq_desc *)&desc, msg,
- msglen, cmd_details);
- return status;
-}
-
-/**
- * i40e_vf_parse_hw_config
- * @hw: pointer to the hardware structure
- * @msg: pointer to the virtual channel VF resource structure
- *
- * Given a VF resource message from the PF, populate the hw struct
- * with appropriate information.
- **/
-void i40e_vf_parse_hw_config(struct i40e_hw *hw,
- struct virtchnl_vf_resource *msg)
-{
- struct virtchnl_vsi_resource *vsi_res;
- int i;
-
- vsi_res = &msg->vsi_res[0];
-
- hw->dev_caps.num_vsis = msg->num_vsis;
- hw->dev_caps.num_rx_qp = msg->num_queue_pairs;
- hw->dev_caps.num_tx_qp = msg->num_queue_pairs;
- hw->dev_caps.num_msix_vectors_vf = msg->max_vectors;
- hw->dev_caps.dcb = msg->vf_cap_flags &
- VIRTCHNL_VF_OFFLOAD_L2;
- hw->dev_caps.iwarp = (msg->vf_cap_flags &
- VIRTCHNL_VF_OFFLOAD_IWARP) ? 1 : 0;
- for (i = 0; i < msg->num_vsis; i++) {
- if (vsi_res->vsi_type == VIRTCHNL_VSI_SRIOV) {
- i40e_memcpy(hw->mac.perm_addr,
- vsi_res->default_mac_addr,
- ETH_ALEN,
- I40E_NONDMA_TO_NONDMA);
- i40e_memcpy(hw->mac.addr, vsi_res->default_mac_addr,
- ETH_ALEN,
- I40E_NONDMA_TO_NONDMA);
- }
- vsi_res++;
- }
-}
-
-/**
- * i40e_vf_reset
- * @hw: pointer to the hardware structure
- *
- * Send a VF_RESET message to the PF. Does not wait for response from PF
- * as none will be forthcoming. Immediately after calling this function,
- * the admin queue should be shut down and (optionally) reinitialized.
- **/
-enum i40e_status_code i40e_vf_reset(struct i40e_hw *hw)
-{
- return i40e_aq_send_msg_to_pf(hw, VIRTCHNL_OP_RESET_VF,
- I40E_SUCCESS, NULL, 0, NULL);
-}
-#endif /* VF_DRIVER */
-
/**
* i40e_aq_set_arp_proxy_config
* @hw: pointer to the HW structure
@@ -25,17 +25,6 @@
#define I40E_DEV_ID_25G_B 0x158A
#define I40E_DEV_ID_25G_SFP28 0x158B
#define I40E_DEV_ID_10G_BASE_T_BC 0x15FF
-#if defined(INTEGRATED_VF) || defined(VF_DRIVER) || defined(I40E_NDIS_SUPPORT)
-#define I40E_DEV_ID_VF 0x154C
-#define I40E_DEV_ID_VF_HV 0x1571
-#define I40E_DEV_ID_ADAPTIVE_VF 0x1889
-#endif /* VF_DRIVER */
-#ifdef X722_A0_SUPPORT
-#define I40E_DEV_ID_X722_A0 0x374C
-#if defined(INTEGRATED_VF) || defined(VF_DRIVER)
-#define I40E_DEV_ID_X722_A0_VF 0x374D
-#endif
-#endif
#define I40E_DEV_ID_10G_B 0x104F
#define I40E_DEV_ID_10G_SFP 0x104E
#define I40E_DEV_ID_5G_BASE_T_BC 0x101F
@@ -49,9 +38,6 @@
#define I40E_DEV_ID_1G_BASE_T_X722 0x37D1
#define I40E_DEV_ID_10G_BASE_T_X722 0x37D2
#define I40E_DEV_ID_SFP_I_X722 0x37D3
-#if defined(INTEGRATED_VF) || defined(VF_DRIVER) || defined(I40E_NDIS_SUPPORT)
-#define I40E_DEV_ID_X722_VF 0x37CD
-#endif /* VF_DRIVER */
#define I40E_DEV_ID_SFP_X722_A 0x0DDA
#define i40e_is_40G_device(d) ((d) == I40E_DEV_ID_QSFP_A || \
@@ -46,9 +46,6 @@ i40e_asq_send_command_v2(struct i40e_hw *hw,
u16 buff_size,
struct i40e_asq_cmd_details *cmd_details,
enum i40e_admin_queue_err *aq_status);
-#ifdef VF_DRIVER
-bool i40e_asq_done(struct i40e_hw *hw);
-#endif
/* debug function for adminq */
void i40e_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask,
@@ -71,8 +68,6 @@ enum i40e_status_code i40e_aq_set_rss_key(struct i40e_hw *hw,
const char *i40e_aq_str(struct i40e_hw *hw, enum i40e_admin_queue_err aq_err);
const char *i40e_stat_str(struct i40e_hw *hw, enum i40e_status_code stat_err);
-#ifdef PF_DRIVER
-
u32 i40e_led_get(struct i40e_hw *hw);
void i40e_led_set(struct i40e_hw *hw, u32 mode, bool blink);
enum i40e_status_code i40e_led_set_phy(struct i40e_hw *hw, bool on,
@@ -498,7 +493,6 @@ void i40e_nvmupd_check_wait_event(struct i40e_hw *hw, u16 opcode,
struct i40e_aq_desc *desc);
void i40e_nvmupd_clear_wait_state(struct i40e_hw *hw);
void i40e_set_pci_config_data(struct i40e_hw *hw, u16 link_status);
-#endif /* PF_DRIVER */
enum i40e_status_code i40e_enable_eee(struct i40e_hw *hw, bool enable);
enum i40e_status_code i40e_set_mac_type(struct i40e_hw *hw);
@@ -510,7 +504,6 @@ STATIC INLINE struct i40e_rx_ptype_decoded decode_rx_desc_ptype(u8 ptype)
return i40e_ptype_lookup[ptype];
}
-#ifdef PF_DRIVER
/**
* i40e_virtchnl_link_speed - Convert AdminQ link_speed to virtchnl definition
* @link_speed: the speed to convert
@@ -545,7 +538,6 @@ i40e_virtchnl_link_speed(enum i40e_aq_link_speed link_speed)
return VIRTCHNL_LINK_SPEED_UNKNOWN;
}
}
-#endif /* PF_DRIVER */
/* i40e_common for VF drivers*/
void i40e_vf_parse_hw_config(struct i40e_hw *hw,
@@ -5,8 +5,6 @@
#ifndef _I40E_REGISTER_H_
#define _I40E_REGISTER_H_
-
-#ifdef PF_DRIVER
#define I40E_GL_ARQBAH 0x000801C0 /* Reset: EMPR */
#define I40E_GL_ARQBAH_ARQBAH_SHIFT 0
#define I40E_GL_ARQBAH_ARQBAH_MASK I40E_MASK(0xFFFFFFFF, I40E_GL_ARQBAH_ARQBAH_SHIFT)
@@ -1607,7 +1605,6 @@
#define I40E_MSIX_TVCTRL_MAX_INDEX 128
#define I40E_MSIX_TVCTRL_MASK_SHIFT 0
#define I40E_MSIX_TVCTRL_MASK_MASK I40E_MASK(0x1, I40E_MSIX_TVCTRL_MASK_SHIFT)
-#endif /* PF_DRIVER */
#define I40E_VFMSIX_PBA1(_i) (0x00002000 + ((_i) * 4)) /* _i=0...19 */ /* Reset: VFLR */
#define I40E_VFMSIX_PBA1_MAX_INDEX 19
#define I40E_VFMSIX_PBA1_PENBIT_SHIFT 0
@@ -1630,7 +1627,6 @@
#define I40E_VFMSIX_TVCTRL1_MAX_INDEX 639
#define I40E_VFMSIX_TVCTRL1_MASK_SHIFT 0
#define I40E_VFMSIX_TVCTRL1_MASK_MASK I40E_MASK(0x1, I40E_VFMSIX_TVCTRL1_MASK_SHIFT)
-#ifdef PF_DRIVER
#define I40E_GLNVM_FLA 0x000B6108 /* Reset: POR */
#define I40E_GLNVM_FLA_FL_SCK_SHIFT 0
#define I40E_GLNVM_FLA_FL_SCK_MASK I40E_MASK(0x1, I40E_GLNVM_FLA_FL_SCK_SHIFT)
@@ -3169,7 +3165,6 @@
#define I40E_PRTPM_SAL_MAX_INDEX 3
#define I40E_PRTPM_SAL_PFPM_SAL_SHIFT 0
#define I40E_PRTPM_SAL_PFPM_SAL_MASK I40E_MASK(0xFFFFFFFF, I40E_PRTPM_SAL_PFPM_SAL_SHIFT)
-#endif /* PF_DRIVER */
#define I40E_VF_ARQBAH1 0x00006000 /* Reset: EMPR */
#define I40E_VF_ARQBAH1_ARQBAH_SHIFT 0
#define I40E_VF_ARQBAH1_ARQBAH_MASK I40E_MASK(0xFFFFFFFF, I40E_VF_ARQBAH1_ARQBAH_SHIFT)
@@ -3395,7 +3390,6 @@
#define I40E_VFQF_HREGION_REGION_7_SHIFT 29
#define I40E_VFQF_HREGION_REGION_7_MASK I40E_MASK(0x7, I40E_VFQF_HREGION_REGION_7_SHIFT)
-#ifdef PF_DRIVER
#define I40E_MNGSB_FDCRC 0x000B7050 /* Reset: POR */
#define I40E_MNGSB_FDCRC_CRC_RES_SHIFT 0
#define I40E_MNGSB_FDCRC_CRC_RES_MASK I40E_MASK(0xFF, I40E_MNGSB_FDCRC_CRC_RES_SHIFT)
@@ -5301,7 +5295,6 @@
#define I40E_GLGEN_STAT_HALT 0x00390000 /* Reset: CORER */
#define I40E_GLGEN_STAT_HALT_HALT_CELLS_SHIFT 0
#define I40E_GLGEN_STAT_HALT_HALT_CELLS_MASK I40E_MASK(0x3FFFFFFF, I40E_GLGEN_STAT_HALT_HALT_CELLS_SHIFT)
-#endif /* PF_DRIVER */
/* Flow Director */
#define I40E_REG_INSET_L2_DMAC_SHIFT 60
#define I40E_REG_INSET_L2_DMAC_MASK I40E_MASK(0xEULL, I40E_REG_INSET_L2_DMAC_SHIFT)
@@ -20,19 +20,11 @@
#define UNREFERENCED_4PARAMETER(_p, _q, _r, _s) (_p); (_q); (_r); (_s);
#define UNREFERENCED_5PARAMETER(_p, _q, _r, _s, _t) (_p); (_q); (_r); (_s); (_t);
-#ifndef LINUX_MACROS
-#ifndef BIT
#define BIT(a) (1UL << (a))
-#endif /* BIT */
-#ifndef BIT_ULL
#define BIT_ULL(a) (1ULL << (a))
-#endif /* BIT_ULL */
-#endif /* LINUX_MACROS */
-#ifndef I40E_MASK
/* I40E_MASK is a macro used on 32 bit registers */
#define I40E_MASK(mask, shift) (mask << shift)
-#endif
#define I40E_MAX_PF 16
#define I40E_MAX_PF_VSI 64
@@ -65,9 +57,7 @@
struct i40e_hw;
typedef void (*I40E_ADMINQ_CALLBACK)(struct i40e_hw *, struct i40e_aq_desc *);
-#ifndef ETH_ALEN
#define ETH_ALEN 6
-#endif
/* Data type manipulation macros. */
#define I40E_HI_DWORD(x) ((u32)((((x) >> 16) >> 16) & 0xFFFFFFFF))
#define I40E_LO_DWORD(x) ((u32)((x) & 0xFFFFFFFF))
@@ -434,7 +434,6 @@ static const struct rte_pci_id pci_id_i40e_map[] = {
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_10G_BASE_T4) },
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_25G_B) },
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_25G_SFP28) },
- { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_A0) },
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_KX_X722) },
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_QSFP_X722) },
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_SFP_X722) },
@@ -17,11 +17,6 @@ if dpdk_conf.get('RTE_IOVA_IN_MBUF') == 0
subdir_done()
endif
-cflags += ['-DPF_DRIVER',
- '-DVF_DRIVER',
- '-DINTEGRATED_VF',
- '-DX722_A0_SUPPORT']
-
subdir('base')
objs = [base_objs]