From: Nir Efrati <nir.efrati@intel.com>
On some MAC types, packet loss is observed due to wake DMA clock gating.
Disable wake DMA clock for some MAC types to avoid packet loss.
Signed-off-by: Nir Efrati <nir.efrati@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
drivers/net/intel/e1000/base/e1000_ich8lan.c | 7 +++++++
drivers/net/intel/e1000/base/e1000_ich8lan.h | 2 +-
2 files changed, 8 insertions(+), 1 deletion(-)
@@ -5048,6 +5048,7 @@ STATIC s32 e1000_init_hw_ich8lan(struct e1000_hw *hw)
{
struct e1000_mac_info *mac = &hw->mac;
u32 ctrl_ext, txdctl, snoop;
+ u32 mac_reg;
s32 ret_val;
u16 i;
@@ -5108,6 +5109,12 @@ STATIC s32 e1000_init_hw_ich8lan(struct e1000_hw *hw)
snoop = (u32) ~(PCIE_NO_SNOOP_ALL);
e1000_set_pcie_no_snoop_generic(hw, snoop);
+ /* Enable workaround for packet loss issue on TGL/ADL platforms */
+ if (mac->type == e1000_pch_tgp || mac->type == e1000_pch_adp) {
+ mac_reg = E1000_READ_REG(hw, E1000_FFLT_DBG);
+ mac_reg |= E1000_FFLT_DBG_DONT_GATE_WAKE_DMA_CLK;
+ E1000_WRITE_REG(hw, E1000_FFLT_DBG, mac_reg);
+ }
ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
ctrl_ext |= E1000_CTRL_EXT_RO_DIS;
E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
@@ -277,7 +277,7 @@
#define E1000_PCH_RAICC(_n) (0x05F50 + ((_n) * 4))
#define E1000_PCI_VENDOR_ID_REGISTER 0x00
-
+#define E1000_FFLT_DBG_DONT_GATE_WAKE_DMA_CLK 0x1000
#define E1000_PCI_REVISION_ID_REG 0x08
void e1000_set_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw,
bool state);