[v2,20/54] net/e1000/base: reset loop variable

Message ID aacc71d84a15eb18c3068df6b2145bd6777202c8.1738681726.git.anatoly.burakov@intel.com (mailing list archive)
State Superseded
Delegated to: Bruce Richardson
Headers
Series Merge Intel IGC and E1000 drivers, and update E1000 base code |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Burakov, Anatoly Feb. 4, 2025, 3:10 p.m. UTC
From: Sasha Neftin <sasha.neftin@intel.com>

When writing to Shadow RAM, we set rev_val on success, but since the value
is already set to success initially, it is possible for none of the writes
to be successful, yet ret_val will still be set to success. Fix it by
resetting the ret_val to failure before every loop iteration.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
 drivers/net/intel/e1000/base/e1000_i225.c | 1 +
 1 file changed, 1 insertion(+)
  

Patch

diff --git a/drivers/net/intel/e1000/base/e1000_i225.c b/drivers/net/intel/e1000/base/e1000_i225.c
index b8b57b6628..999fa03a3d 100644
--- a/drivers/net/intel/e1000/base/e1000_i225.c
+++ b/drivers/net/intel/e1000/base/e1000_i225.c
@@ -572,6 +572,7 @@  static s32 __e1000_write_nvm_srwr(struct e1000_hw *hw, u16 offset, u16 words,
 	}
 
 	for (i = 0; i < words; i++) {
+		ret_val = -E1000_ERR_NVM;
 		eewr = ((offset + i) << E1000_NVM_RW_ADDR_SHIFT) |
 			(data[i] << E1000_NVM_RW_REG_DATA) |
 			E1000_NVM_RW_REG_START;