diff mbox series

[v2,38/54] net/e1000/base: make debug prints more informative

Message ID be25e0ec916bf7a237d5dd0924572602bdf5fa5a.1738681726.git.anatoly.burakov@intel.com (mailing list archive)
State Superseded
Delegated to: Bruce Richardson
Headers
Series Merge Intel IGC and E1000 drivers, and update E1000 base code |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Burakov, Anatoly Feb. 4, 2025, 3:10 p.m. UTC 
From: Dima Ruinskiy <dima.ruinskiy@intel.com>

PHY page and register notation traditionally uses decimal numbering. This
patch aligns the debug prints to this notation, as well as moves prints
to after we get a value of interest to us.

Signed-off-by: Dima Ruinskiy <dima.ruinskiy@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
 drivers/net/intel/e1000/base/e1000_phy.c | 18 ++++++++++--------
 1 file changed, 10 insertions(+), 8 deletions(-)
diff mbox series

Patch

diff --git a/drivers/net/intel/e1000/base/e1000_phy.c b/drivers/net/intel/e1000/base/e1000_phy.c
index 4810022fa0..cc1efddceb 100644
--- a/drivers/net/intel/e1000/base/e1000_phy.c
+++ b/drivers/net/intel/e1000/base/e1000_phy.c
@@ -690,7 +690,7 @@  s32 e1000_set_page_igp(struct e1000_hw *hw, u16 page)
 {
 	DEBUGFUNC("e1000_set_page_igp");
 
-	DEBUGOUT1("Setting page 0x%x\n", page);
+	DEBUGOUT2("Setting page %d (0x%x)\n", page >> IGP_PAGE_SHIFT, page);
 
 	hw->phy.addr = 1;
 
@@ -3520,8 +3520,6 @@  s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset,
 		}
 	}
 
-	DEBUGOUT2("Accessing PHY page %d reg 0x%x\n", page, reg);
-
 	/* Write the Wakeup register page offset value using opcode 0x11 */
 	ret_val = e1000_write_phy_reg_mdic(hw, BM_WUC_ADDRESS_OPCODE, reg);
 	if (ret_val) {
@@ -3533,10 +3531,14 @@  s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset,
 		/* Read the Wakeup register page value using opcode 0x12 */
 		ret_val = e1000_read_phy_reg_mdic(hw, BM_WUC_DATA_OPCODE,
 						  data);
+		DEBUGOUT3("Read PHY page %d reg %d value 0x%04x\n",
+			  page, reg, *data);
 	} else {
 		/* Write the Wakeup register page value using opcode 0x12 */
 		ret_val = e1000_write_phy_reg_mdic(hw, BM_WUC_DATA_OPCODE,
 						   *data);
+		DEBUGOUT3("Wrote PHY page %d reg %d value 0x%04x\n",
+			  page, reg, *data);
 	}
 
 	if (ret_val) {
@@ -3644,11 +3646,11 @@  STATIC s32 __e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data,
 		}
 	}
 
-	DEBUGOUT3("reading PHY page %d (or 0x%x shifted) reg 0x%x\n", page,
-		  page << IGP_PAGE_SHIFT, reg);
-
 	ret_val = e1000_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & reg,
 					  data);
+	DEBUGOUT3("read PHY page %d reg %d value 0x%04x\n",
+		  page, reg, *data);
+
 out:
 	if (!locked)
 		hw->phy.ops.release(hw);
@@ -3770,8 +3772,8 @@  STATIC s32 __e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data,
 		}
 	}
 
-	DEBUGOUT3("writing PHY page %d (or 0x%x shifted) reg 0x%x\n", page,
-		  page << IGP_PAGE_SHIFT, reg);
+	DEBUGOUT3("writing PHY page %d reg %d value 0x%04x\n",
+		  page, reg, data);
 
 	ret_val = e1000_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & reg,
 					   data);