Add a function to check DD bit status, and use it everywhere we do these
checks.
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
Notes:
v6:
- Move ixgbe_tx_desc_done() to ixgbe_rxtx.h to avoid compile errors on
platforms that do not support vector driver
v5:
- Add this commit
drivers/net/intel/ixgbe/ixgbe_rxtx.c | 8 ++-----
drivers/net/intel/ixgbe/ixgbe_rxtx.h | 21 +++++++++++++++++++
.../net/intel/ixgbe/ixgbe_rxtx_vec_common.c | 4 +---
.../net/intel/ixgbe/ixgbe_rxtx_vec_common.h | 4 +---
4 files changed, 25 insertions(+), 12 deletions(-)
On Mon, Jun 09, 2025 at 04:37:16PM +0100, Anatoly Burakov wrote:
> Add a function to check DD bit status, and use it everywhere we do these
> checks.
>
> Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
> ---
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
@@ -118,13 +118,11 @@ static __rte_always_inline int
ixgbe_tx_free_bufs(struct ci_tx_queue *txq)
{
struct ci_tx_entry *txep;
- uint32_t status;
int i, nb_free = 0;
struct rte_mbuf *m, *free[RTE_IXGBE_TX_MAX_FREE_BUF_SZ];
/* check DD bit on threshold descriptor */
- status = txq->ixgbe_tx_ring[txq->tx_next_dd].wb.status;
- if (!(status & rte_cpu_to_le_32(IXGBE_ADVTXD_STAT_DD)))
+ if (!ixgbe_tx_desc_done(txq, txq->tx_next_dd))
return 0;
/*
@@ -3412,7 +3410,6 @@ int
ixgbe_dev_tx_descriptor_status(void *tx_queue, uint16_t offset)
{
struct ci_tx_queue *txq = tx_queue;
- volatile uint32_t *status;
uint32_t desc;
if (unlikely(offset >= txq->nb_tx_desc))
@@ -3428,8 +3425,7 @@ ixgbe_dev_tx_descriptor_status(void *tx_queue, uint16_t offset)
desc -= txq->nb_tx_desc;
}
- status = &txq->ixgbe_tx_ring[desc].wb.status;
- if (*status & rte_cpu_to_le_32(IXGBE_ADVTXD_STAT_DD))
+ if (ixgbe_tx_desc_done(txq, desc))
return RTE_ETH_TX_DESC_DONE;
return RTE_ETH_TX_DESC_FULL;
@@ -5,6 +5,8 @@
#ifndef _IXGBE_RXTX_H_
#define _IXGBE_RXTX_H_
+#include "ixgbe_type.h"
+
#include "../common/tx.h"
/*
@@ -241,4 +243,23 @@ uint64_t ixgbe_get_rx_port_offloads(struct rte_eth_dev *dev);
uint64_t ixgbe_get_tx_queue_offloads(struct rte_eth_dev *dev);
int ixgbe_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc);
+/**
+ * Check if the Tx descriptor DD bit is set.
+ *
+ * @param txq
+ * Pointer to the Tx queue structure.
+ * @param idx
+ * Index of the Tx descriptor to check.
+ *
+ * @return
+ * 1 if the Tx descriptor is done, 0 otherwise.
+ */
+static inline int
+ixgbe_tx_desc_done(struct ci_tx_queue *txq, uint16_t idx)
+{
+ const uint32_t status = txq->ixgbe_tx_ring[idx].wb.status;
+
+ return !!(status & rte_cpu_to_le_32(IXGBE_ADVTXD_STAT_DD));
+}
+
#endif /* _IXGBE_RXTX_H_ */
@@ -215,7 +215,6 @@ ixgbe_recycle_tx_mbufs_reuse_vec(void *tx_queue,
struct ci_tx_entry *txep;
struct rte_mbuf **rxep;
int i, n;
- uint32_t status;
uint16_t nb_recycle_mbufs;
uint16_t avail = 0;
uint16_t mbuf_ring_size = recycle_rxq_info->mbuf_ring_size;
@@ -232,8 +231,7 @@ ixgbe_recycle_tx_mbufs_reuse_vec(void *tx_queue,
return 0;
/* check DD bits on threshold descriptor */
- status = txq->ixgbe_tx_ring[txq->tx_next_dd].wb.status;
- if (!(status & IXGBE_ADVTXD_STAT_DD))
+ if (!ixgbe_tx_desc_done(txq, txq->tx_next_dd))
return 0;
n = txq->tx_rs_thresh;
@@ -29,15 +29,13 @@ static __rte_always_inline int
ixgbe_tx_free_bufs_vec(struct ci_tx_queue *txq)
{
struct ci_tx_entry_vec *txep;
- uint32_t status;
uint32_t n;
uint32_t i;
int nb_free = 0;
struct rte_mbuf *m, *free[RTE_IXGBE_TX_MAX_FREE_BUF_SZ];
/* check DD bit on threshold descriptor */
- status = txq->ixgbe_tx_ring[txq->tx_next_dd].wb.status;
- if (!(status & IXGBE_ADVTXD_STAT_DD))
+ if (!ixgbe_tx_desc_done(txq, txq->tx_next_dd))
return 0;
n = txq->tx_rs_thresh;