diff mbox series

[v1,11/24] net/igc/base: fix MAC addr hash bit shift

Message ID	d678a977b168d9970311a3ad3a0638504d8561a2.1738858026.git.anatoly.burakov@intel.com (mailing list archive)
State	Accepted
Delegated to:	Bruce Richardson
Headers	From: Anatoly Burakov <anatoly.burakov@intel.com> To: dev@dpdk.org, Alvin Zhang <alvinx.zhang@intel.com>, Ferruh Yigit <ferruh.yigit@intel.com> Subject: [PATCH v1 11/24] net/igc/base: fix MAC addr hash bit shift Date: Thu, 6 Feb 2025 16:08:34 +0000 Message-ID: <d678a977b168d9970311a3ad3a0638504d8561a2.1738858026.git.anatoly.burakov@intel.com> In-Reply-To: <cover.1738858026.git.anatoly.burakov@intel.com> References: <cover.1738328106.git.anatoly.burakov@intel.com> <cover.1738858026.git.anatoly.burakov@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: list Errors-To: dev-bounces@dpdk.org
Series	Fixes for igc and e1000 \| [v1,00/24] Fixes for igc and e1000 [v1,01/24] net/igc/base: fix deadlock in i225 [v1,02/24] net/igc/base: fix infinite loop [v1,03/24] net/igc/base: fix bitwise op type mismatch [v1,04/24] net/igc/base: increase PHY power up delay [v1,05/24] net/igc/base: reset loop variable [v1,06/24] net/igc/base: fix LTR for i225 [v1,07/24] net/igc/base: fix typo in LTR calculation [v1,08/24] net/igc/base: fix unused value [v1,09/24] net/igc/base: fix semaphore timeout value [v1,10/24] net/igc/base: fix iterator type [v1,11/24] net/igc/base: fix MAC addr hash bit shift [v1,12/24] net/igc/base: fix data type in MAC hash [v1,13/24] net/igc/base: fix static analysis warning [v1,14/24] net/e1000/base: fix semaphore timeout value [v1,15/24] net/e1000/base: correct mPHY access logic [v1,16/24] net/e1000/base: fix iterator type [v1,17/24] net/e1000/base: fix MAC addr hash bit shift [v1,18/24] net/e1000/base: fix data type in MAC hash [v1,19/24] net/e1000/base: fix uninitialized variable usage [v1,20/24] net/e1000/base: fix static analysis warning [v1,21/24] net/e1000/base: fix static analysis warning [v1,22/24] net/e1000/base: fix reset for 82580 [v1,23/24] net/e1000/base: fix unchecked return [v1,24/24] net/e1000/base: skip MANC check for 82575

Checks

Context	Check	Description
ci/checkpatch	success	coding style OK

Commit Message

Burakov, Anatoly Feb. 6, 2025, 4:08 p.m. UTC

From: Aleksandr Loktionov <aleksandr.loktionov@intel.com>

In e1000_hash_mc_addr_generic() the expression:

        "mc_addr[4] >> 8 - bit_shift", right shifting "mc_addr[4]"

shift by more than 7 bits always yields zero, so hash becomes not so
different. Add initialization with bit_shift = 1, and add a loop condition
to ensure bit_shift will be always in [1..8] range.

Fixes: 8cb7c57d9b3c ("net/igc: support device initialization")
Cc: stable@dpdk.org

Signed-off-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
 drivers/net/intel/igc/base/igc_mac.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff mbox series

Patch

diff --git a/drivers/net/intel/igc/base/igc_mac.c b/drivers/net/intel/igc/base/igc_mac.c
index 3cd6506e5e..c69f8ac73b 100644
--- a/drivers/net/intel/igc/base/igc_mac.c
+++ b/drivers/net/intel/igc/base/igc_mac.c
@@ -486,7 +486,7 @@  static int igc_rar_set_generic(struct igc_hw *hw, u8 *addr, u32 index)
 u32 igc_hash_mc_addr_generic(struct igc_hw *hw, u8 *mc_addr)
 {
 	u32 hash_value, hash_mask;
-	u8 bit_shift = 0;
+	u8 bit_shift = 1;
 
 	DEBUGFUNC("igc_hash_mc_addr_generic");
 
@@ -496,7 +496,7 @@  u32 igc_hash_mc_addr_generic(struct igc_hw *hw, u8 *mc_addr)
 	/* For a mc_filter_type of 0, bit_shift is the number of left-shifts
 	 * where 0xFF would still fall within the hash mask.
 	 */
-	while (hash_mask >> bit_shift != 0xFF)
+	while (hash_mask >> bit_shift != 0xFF && bit_shift < 4)
 		bit_shift++;
 
 	/* The portion of the address that is used for the hash table