[v2,046/148] net/ice/base: add helper function for refsync

Message ID f8baae17b2d443809854a15e4b9ea1931017e37b.1718204528.git.anatoly.burakov@intel.com (mailing list archive)
State Superseded, archived
Delegated to: Bruce Richardson
Headers
Series Update net/ice base driver to latest upstream snapshot |

Checks

Context Check Description
ci/checkpatch warning coding style issues

Commit Message

Burakov, Anatoly June 12, 2024, 3 p.m. UTC
From: Ian Stokes <ian.stokes@intel.com>

Add a helper function to determine whether a given pin of DPLL is capable for
refsync configuration.

Signed-off-by: Yochai Hagvi <yochai.hagvi@intel.com>
Signed-off-by: Ian Stokes <ian.stokes@intel.com>
---
 drivers/net/ice/base/ice_ptp_hw.c | 16 ++++++++++++++++
 drivers/net/ice/base/ice_ptp_hw.h |  1 +
 2 files changed, 17 insertions(+)
  

Patch

diff --git a/drivers/net/ice/base/ice_ptp_hw.c b/drivers/net/ice/base/ice_ptp_hw.c
index 084532c5fc..db28aa308c 100644
--- a/drivers/net/ice/base/ice_ptp_hw.c
+++ b/drivers/net/ice/base/ice_ptp_hw.c
@@ -5783,3 +5783,19 @@  int ice_ptp_init_phc(struct ice_hw *hw)
 
 	return status;
 }
+
+/**
+ * refsync_pin_id_valid
+ * @hw: pointer to the HW struct
+ * @id: pin index
+ *
+ * Checks whether DPLL's input pin can be configured to ref-sync pairing mode.
+ */
+bool refsync_pin_id_valid(struct ice_hw *hw, u8 id)
+{
+	/* refsync is allowed only on pins 1 or 5 for E810T */
+	if (ice_is_e810t(hw) && id != 1 && id != 5)
+		return false;
+
+	return true;
+}
diff --git a/drivers/net/ice/base/ice_ptp_hw.h b/drivers/net/ice/base/ice_ptp_hw.h
index d88ecbbef3..04556db7e9 100644
--- a/drivers/net/ice/base/ice_ptp_hw.h
+++ b/drivers/net/ice/base/ice_ptp_hw.h
@@ -142,6 +142,7 @@  ice_read_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx, u64 *tstamp);
 int
 ice_clear_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx);
 int ice_ptp_init_phc(struct ice_hw *hw);
+bool refsync_pin_id_valid(struct ice_hw *hw, u8 id);
 
 /* E822 family functions */
 int