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Tue, 5 Oct 2021 00:52:33 +0000 Received: from nvidia.com (172.20.187.5) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Tue, 5 Oct 2021 00:52:31 +0000 From: To: CC: Dmitry Kozlyuk , Ori Kam , "Thomas Monjalon" , Ferruh Yigit , Andrew Rybchenko Date: Tue, 5 Oct 2021 03:52:12 +0300 Message-ID: <20211005005216.2427489-2-dkozlyuk@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211005005216.2427489-1-dkozlyuk@nvidia.com> References: <20211005005216.2427489-1-dkozlyuk@nvidia.com> MIME-Version: 1.0 X-Originating-IP: [172.20.187.5] X-ClientProxiedBy: HQMAIL105.nvidia.com (172.20.187.12) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: eaa67729-edcc-4fab-ddf9-08d9879a6ab4 X-MS-TrafficTypeDiagnostic: MN2PR12MB3054: X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-Microsoft-Antispam-PRVS: X-MS-Exchange-Transport-Forked: True X-MS-Oob-TLC-OOBClassifiers: OLM:8882; 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CAT:NONE; SFS:(4636009)(36840700001)(46966006)(5660300002)(8676002)(70206006)(36906005)(54906003)(47076005)(7636003)(70586007)(16526019)(7696005)(36860700001)(508600001)(55016002)(36756003)(356005)(26005)(186003)(82310400003)(6916009)(83380400001)(8936002)(107886003)(316002)(4326008)(2616005)(2876002)(1076003)(86362001)(426003)(2906002)(6666004)(6286002)(336012); DIR:OUT; SFP:1101; X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Oct 2021 00:52:33.2718 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: eaa67729-edcc-4fab-ddf9-08d9879a6ab4 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT035.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB3054 Subject: [dpdk-dev] [PATCH 1/5] ethdev: add capability to keep flow rules on restart X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Dmitry Kozlyuk Currently, it is not specified what happens to the flow rules when the device is stopped, possibly reconfigured, then started. If flow rules were kept, it could be convenient for application developers, because they wouldn't need to save and restore them. However, due to the number of flows and possible creation rate it is impractical to save all flow rules in DPDK layer. This means that flow rules persistence really depends on whether PMD and HW can implement it efficiently. It is proposed for PMDs to advertise this capability if supported using a new flag. If the device is being reconfigured in a way that is incompatible with existing flow rules, PMD is required to report an error. This is mandatory, because flow API does not supply users with capabilities, so this is the only way for a user to learn that configuration is invalid. For example, if queue count changes and the action of a flow rule specifies queues that are going away, the user must update or remove the flow rule before removing the queues. Signed-off-by: Dmitry Kozlyuk Acked-by: Ori Kam Acked-by: Somnath Kotur Acked-by: Ajit Khaparde --- doc/guides/prog_guide/rte_flow.rst | 9 +++++++++ lib/ethdev/rte_ethdev.h | 2 ++ 2 files changed, 11 insertions(+) diff --git a/doc/guides/prog_guide/rte_flow.rst b/doc/guides/prog_guide/rte_flow.rst index 2b42d5ec8c..0a03097a7c 100644 --- a/doc/guides/prog_guide/rte_flow.rst +++ b/doc/guides/prog_guide/rte_flow.rst @@ -87,6 +87,15 @@ To avoid resource leaks on the PMD side, handles must be explicitly destroyed by the application before releasing associated resources such as queues and ports. +By default flow rules are implicitly destroyed when the device is stopped. +If the device advertises ``RTE_DEV_CAPA_FLOW_RULE_KEEP``, flow rules persist +across device stop and start with possible reconfiguration in between. +Some configuration changes may be incompatible with existing flow rules, +in this case ``rte_eth_dev_configure()`` or ``rte_eth_rx/tx_queue_setup()`` +will fail. At this point PMD developers are encouraged to log errors identical +to the ones that would be emitted by ``rte_flow_create()`` if the new +configuration was active. + The following sections cover: - **Attributes** (represented by ``struct rte_flow_attr``): properties of a diff --git a/lib/ethdev/rte_ethdev.h b/lib/ethdev/rte_ethdev.h index afdc53b674..d24de5e8fa 100644 --- a/lib/ethdev/rte_ethdev.h +++ b/lib/ethdev/rte_ethdev.h @@ -1478,6 +1478,8 @@ struct rte_eth_conf { #define RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP 0x00000001 /** Device supports Tx queue setup after device started. */ #define RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP 0x00000002 +/** Device keeps flow rules across restart and reconfiguration. */ +#define RTE_ETH_DEV_CAPA_FLOW_RULE_KEEP 0x00000004 /**@}*/ /* From patchwork Tue Oct 5 00:52:13 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Kozlyuk X-Patchwork-Id: 100477 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 70980A0C41; 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intel.com; dkim=none (message not signed) header.d=none;intel.com; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by BN8NAM11FT035.mail.protection.outlook.com (10.13.177.116) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4566.14 via Frontend Transport; Tue, 5 Oct 2021 00:52:35 +0000 Received: from nvidia.com (172.20.187.5) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Tue, 5 Oct 2021 00:52:33 +0000 From: To: CC: Dmitry Kozlyuk , Ori Kam , "Thomas Monjalon" , Ferruh Yigit , Andrew Rybchenko Date: Tue, 5 Oct 2021 03:52:13 +0300 Message-ID: <20211005005216.2427489-3-dkozlyuk@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211005005216.2427489-1-dkozlyuk@nvidia.com> References: <20211005005216.2427489-1-dkozlyuk@nvidia.com> MIME-Version: 1.0 X-Originating-IP: [172.20.187.5] X-ClientProxiedBy: HQMAIL105.nvidia.com (172.20.187.12) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: fa314c9f-cb3e-42a3-9c61-08d9879a6bbd X-MS-TrafficTypeDiagnostic: BL0PR12MB4867: X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-Microsoft-Antispam-PRVS: X-MS-Exchange-Transport-Forked: True X-MS-Oob-TLC-OOBClassifiers: OLM:8882; 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CAT:NONE; SFS:(4636009)(36840700001)(46966006)(5660300002)(7636003)(70206006)(36906005)(47076005)(8676002)(54906003)(70586007)(7696005)(26005)(508600001)(36860700001)(55016002)(16526019)(36756003)(356005)(186003)(107886003)(336012)(83380400001)(8936002)(6916009)(316002)(4326008)(2876002)(86362001)(6666004)(82310400003)(2616005)(426003)(1076003)(6286002)(2906002); DIR:OUT; SFP:1101; X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Oct 2021 00:52:35.0198 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: fa314c9f-cb3e-42a3-9c61-08d9879a6bbd X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT035.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL0PR12MB4867 Subject: [dpdk-dev] [PATCH 2/5] ethdev: add capability to keep shared objects on restart X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Dmitry Kozlyuk rte_flow_action_handle_create() did not mention what happens with an indirect action when a device is stopped, possibly reconfigured, and started again. It is natural for some indirect actions to be persistent, like counters and meters; keeping others just saves application time and complexity. However, not all PMDs can support it. It is proposed to add a device capability to indicate if indirect actions are kept across the above sequence or implicitly destroyed. In the future, indirect actions may not be the only type of objects shared between flow rules. The capability bit intends to cover all possible types of such objects, hence its name. It may happen that in the future a PMD acquires support for a type of shared objects that it cannot keep across a restart. It is undesirable to stop advertising the capability so that applications that don't use objects of the problematic type can still take advantage of it. This is why PMDs are allowed to keep only a subset of shared objects provided that the vendor mandatorily documents it. If the device is being reconfigured in a way that is incompatible with an existing shared objects, PMD is required to report an error. This is mandatory, because flow API does not supply users with capabilities, so this is the only way for a user to learn that configuration is invalid. For example, if queue count changes and RSS indirect action specifies queues that are going away, the user must update the action before removing the queues or remove the action and all flow rules that were using it. Signed-off-by: Dmitry Kozlyuk Acked-by: Ori Kam --- doc/guides/prog_guide/rte_flow.rst | 12 ++++++++++++ lib/ethdev/rte_ethdev.h | 6 ++++++ 2 files changed, 18 insertions(+) diff --git a/doc/guides/prog_guide/rte_flow.rst b/doc/guides/prog_guide/rte_flow.rst index 0a03097a7c..4597853bff 100644 --- a/doc/guides/prog_guide/rte_flow.rst +++ b/doc/guides/prog_guide/rte_flow.rst @@ -2794,6 +2794,18 @@ updated depend on the type of the ``action`` and different for every type. The indirect action specified data (e.g. counter) can be queried by ``rte_flow_action_handle_query()``. +By default indirect actions are destroyed when the device is stopped. +If the device advertises ``RTE_ETH_DEV_CAPA_FLOW_SHARED_OBJECT_KEEP``, +indirect actions persist across the device stop and start with possible +reconfiguration in between. Some configuration changes may be incompatible +with existing indirect actions, in this case ``rte_eth_dev_configure()`` and/or +``rte_eth_rx/tx_queue_setup()`` will fail. At this point PMD developers +are encouraged to log errors identical to the ones that would be emitted by +``rte_flow_action_handle_create()`` if the new configuration was active. +Even if this capability is advertised, there may be kinds of indirect actions +that the device cannot keep. They are implicitly destroyed at device stop. +PMD developers must document such kinds of actions if applicable. + .. _table_rte_flow_action_handle: .. table:: INDIRECT diff --git a/lib/ethdev/rte_ethdev.h b/lib/ethdev/rte_ethdev.h index d24de5e8fa..3d9a42672f 100644 --- a/lib/ethdev/rte_ethdev.h +++ b/lib/ethdev/rte_ethdev.h @@ -1480,6 +1480,12 @@ struct rte_eth_conf { #define RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP 0x00000002 /** Device keeps flow rules across restart and reconfiguration. */ #define RTE_ETH_DEV_CAPA_FLOW_RULE_KEEP 0x00000004 +/** + * Device keeps objects that are shared between flow rules, + * e.g. indirect actions, across restart and reconfiguration. + * For a specific PMD this may not be applicable to certain action types. + */ +#define RTE_ETH_DEV_CAPA_FLOW_SHARED_OBJECT_KEEP 0x00000008 /**@}*/ /* From patchwork Tue Oct 5 00:52:14 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Kozlyuk X-Patchwork-Id: 100478 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id B3BD3A0C41; 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dpdk.org; dkim=none (message not signed) header.d=none;dpdk.org; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by BN8NAM11FT015.mail.protection.outlook.com (10.13.176.90) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4566.14 via Frontend Transport; Tue, 5 Oct 2021 00:52:37 +0000 Received: from nvidia.com (172.20.187.5) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Tue, 5 Oct 2021 00:52:35 +0000 From: To: CC: Dmitry Kozlyuk , , Matan Azrad , Viacheslav Ovsiienko Date: Tue, 5 Oct 2021 03:52:14 +0300 Message-ID: <20211005005216.2427489-4-dkozlyuk@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211005005216.2427489-1-dkozlyuk@nvidia.com> References: <20211005005216.2427489-1-dkozlyuk@nvidia.com> MIME-Version: 1.0 X-Originating-IP: [172.20.187.5] X-ClientProxiedBy: HQMAIL105.nvidia.com (172.20.187.12) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: d3eb9328-d433-40ad-101a-08d9879a6d75 X-MS-TrafficTypeDiagnostic: BL0PR12MB4610: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:1751; 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CAT:NONE; SFS:(4636009)(46966006)(36840700001)(1076003)(450100002)(86362001)(7696005)(2906002)(70586007)(6286002)(55016002)(70206006)(4326008)(36860700001)(2616005)(107886003)(356005)(82310400003)(508600001)(426003)(83380400001)(26005)(8936002)(2876002)(5660300002)(6916009)(336012)(30864003)(16526019)(6666004)(54906003)(8676002)(316002)(186003)(7636003)(36756003)(47076005); DIR:OUT; SFP:1101; X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Oct 2021 00:52:37.8398 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d3eb9328-d433-40ad-101a-08d9879a6d75 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT015.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL0PR12MB4610 Subject: [dpdk-dev] [PATCH 3/5] net/mlx5: discover max flow priority using DevX X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Dmitry Kozlyuk Maximum available flow priority was discovered using Verbs API regardless of the selected flow engine. This required some Verbs objects to be initialized in order to use DevX engine. Make priority discovery an engine method and implement it for DevX using its API. Cc: stable@dpdk.org Signed-off-by: Dmitry Kozlyuk Acked-by: Matan Azrad --- drivers/net/mlx5/linux/mlx5_os.c | 1 - drivers/net/mlx5/mlx5_flow.c | 98 +++++++++++++++++++++++++++ drivers/net/mlx5/mlx5_flow.h | 4 ++ drivers/net/mlx5/mlx5_flow_dv.c | 103 +++++++++++++++++++++++++++++ drivers/net/mlx5/mlx5_flow_verbs.c | 77 +++------------------ 5 files changed, 215 insertions(+), 68 deletions(-) diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c index 3746057673..8ee7ada51b 100644 --- a/drivers/net/mlx5/linux/mlx5_os.c +++ b/drivers/net/mlx5/linux/mlx5_os.c @@ -1830,7 +1830,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev, priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev); if (!priv->drop_queue.hrxq) goto error; - /* Supported Verbs flow priority number detection. */ err = mlx5_flow_discover_priorities(eth_dev); if (err < 0) { err = -err; diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c index c914a7120c..bfc3e20c9a 100644 --- a/drivers/net/mlx5/mlx5_flow.c +++ b/drivers/net/mlx5/mlx5_flow.c @@ -9416,3 +9416,101 @@ mlx5_dbg__print_pattern(const struct rte_flow_item *item) } printf("END\n"); } + +/* Map of Verbs to Flow priority with 8 Verbs priorities. */ +static const uint32_t priority_map_3[][MLX5_PRIORITY_MAP_MAX] = { + { 0, 1, 2 }, { 2, 3, 4 }, { 5, 6, 7 }, +}; + +/* Map of Verbs to Flow priority with 16 Verbs priorities. */ +static const uint32_t priority_map_5[][MLX5_PRIORITY_MAP_MAX] = { + { 0, 1, 2 }, { 3, 4, 5 }, { 6, 7, 8 }, + { 9, 10, 11 }, { 12, 13, 14 }, +}; + +/** + * Discover the number of available flow priorities. + * + * @param dev + * Ethernet device. + * + * @return + * On success, number of available flow priorities. + * On failure, a negative errno-style code and rte_errno is set. + */ +int +mlx5_flow_discover_priorities(struct rte_eth_dev *dev) +{ + static const uint16_t vprio[] = {8, 16}; + const struct mlx5_priv *priv = dev->data->dev_private; + const struct mlx5_flow_driver_ops *fops; + enum mlx5_flow_drv_type type; + int ret; + + type = mlx5_flow_os_get_type(); + if (type == MLX5_FLOW_TYPE_MAX) { + type = MLX5_FLOW_TYPE_VERBS; + if (priv->config.devx && priv->config.dv_flow_en) + type = MLX5_FLOW_TYPE_DV; + } + fops = flow_get_drv_ops(type); + if (fops->discover_priorities == NULL) { + DRV_LOG(ERR, "Priority discovery not supported"); + rte_errno = ENOTSUP; + return -rte_errno; + } + ret = fops->discover_priorities(dev, vprio, RTE_DIM(vprio)); + if (ret < 0) + return ret; + switch (ret) { + case 8: + ret = RTE_DIM(priority_map_3); + break; + case 16: + ret = RTE_DIM(priority_map_5); + break; + default: + rte_errno = ENOTSUP; + DRV_LOG(ERR, + "port %u maximum priority: %d expected 8/16", + dev->data->port_id, ret); + return -rte_errno; + } + DRV_LOG(INFO, "port %u supported flow priorities:" + " 0-%d for ingress or egress root table," + " 0-%d for non-root table or transfer root table.", + dev->data->port_id, ret - 2, + MLX5_NON_ROOT_FLOW_MAX_PRIO - 1); + return ret; +} + +/** + * Adjust flow priority based on the highest layer and the request priority. + * + * @param[in] dev + * Pointer to the Ethernet device structure. + * @param[in] priority + * The rule base priority. + * @param[in] subpriority + * The priority based on the items. + * + * @return + * The new priority. + */ +uint32_t +mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority, + uint32_t subpriority) +{ + uint32_t res = 0; + struct mlx5_priv *priv = dev->data->dev_private; + + switch (priv->config.flow_prio) { + case RTE_DIM(priority_map_3): + res = priority_map_3[priority][subpriority]; + break; + case RTE_DIM(priority_map_5): + res = priority_map_5[priority][subpriority]; + break; + } + return res; +} diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h index 5c68d4f7d7..8f94125f26 100644 --- a/drivers/net/mlx5/mlx5_flow.h +++ b/drivers/net/mlx5/mlx5_flow.h @@ -1226,6 +1226,9 @@ typedef int (*mlx5_flow_create_def_policy_t) (struct rte_eth_dev *dev); typedef void (*mlx5_flow_destroy_def_policy_t) (struct rte_eth_dev *dev); +typedef int (*mlx5_flow_discover_priorities_t) + (struct rte_eth_dev *dev, + const uint16_t *vprio, int vprio_n); struct mlx5_flow_driver_ops { mlx5_flow_validate_t validate; @@ -1260,6 +1263,7 @@ struct mlx5_flow_driver_ops { mlx5_flow_action_update_t action_update; mlx5_flow_action_query_t action_query; mlx5_flow_sync_domain_t sync_domain; + mlx5_flow_discover_priorities_t discover_priorities; }; /* mlx5_flow.c */ diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index c6370cd1d6..155745748f 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -17978,6 +17978,108 @@ flow_dv_sync_domain(struct rte_eth_dev *dev, uint32_t domains, uint32_t flags) return 0; } +/** + * Discover the number of available flow priorities + * by trying to create a flow with the highest priority value + * for each possible number. + * + * @param[in] dev + * Ethernet device. + * @param[in] vprio + * List of possible number of available priorities. + * @param[in] vprio_n + * Size of @p vprio array. + * @return + * On success, number of available flow priorities. + * On failure, a negative errno-style code and rte_errno is set. + */ +static int +flow_dv_discover_priorities(struct rte_eth_dev *dev, + const uint16_t *vprio, int vprio_n) +{ + struct mlx5_priv *priv = dev->data->dev_private; + struct mlx5_indexed_pool *pool = priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW]; + struct rte_flow_item_eth eth; + struct rte_flow_item item = { + .type = RTE_FLOW_ITEM_TYPE_ETH, + .spec = ð, + .mask = ð, + }; + struct mlx5_flow_dv_matcher matcher = { + .mask = { + .size = sizeof(matcher.mask.buf), + }, + }; + union mlx5_flow_tbl_key tbl_key; + struct mlx5_flow flow; + void *action; + struct rte_flow_error error; + uint8_t misc_mask; + int i, err, ret = -ENOTSUP; + + /* + * Prepare a flow with a catch-all pattern and a drop action. + * Use drop queue, because shared drop action may be unavailable. + */ + action = priv->drop_queue.hrxq->action; + if (action == NULL) { + DRV_LOG(ERR, "Priority discovery requires a drop action"); + rte_errno = ENOTSUP; + return -rte_errno; + } + memset(&flow, 0, sizeof(flow)); + flow.handle = mlx5_ipool_zmalloc(pool, &flow.handle_idx); + if (flow.handle == NULL) { + DRV_LOG(ERR, "Cannot create flow handle"); + rte_errno = ENOMEM; + return -rte_errno; + } + flow.ingress = true; + flow.dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param); + flow.dv.actions[0] = action; + flow.dv.actions_n = 1; + memset(ð, 0, sizeof(eth)); + flow_dv_translate_item_eth(matcher.mask.buf, flow.dv.value.buf, + &item, /* inner */ false, /* group */ 0); + matcher.crc = rte_raw_cksum(matcher.mask.buf, matcher.mask.size); + for (i = 0; i < vprio_n; i++) { + /* Configure the next proposed maximum priority. */ + matcher.priority = vprio[i] - 1; + memset(&tbl_key, 0, sizeof(tbl_key)); + err = flow_dv_matcher_register(dev, &matcher, &tbl_key, &flow, + /* tunnel */ NULL, + /* group */ 0, + &error); + if (err != 0) { + /* This action is pure SW and must always succeed. */ + DRV_LOG(ERR, "Cannot register matcher"); + ret = -rte_errno; + break; + } + /* Try to apply the flow to HW. */ + misc_mask = flow_dv_matcher_enable(flow.dv.value.buf); + __flow_dv_adjust_buf_size(&flow.dv.value.size, misc_mask); + err = mlx5_flow_os_create_flow + (flow.handle->dvh.matcher->matcher_object, + (void *)&flow.dv.value, flow.dv.actions_n, + flow.dv.actions, &flow.handle->drv_flow); + if (err == 0) { + claim_zero(mlx5_flow_os_destroy_flow + (flow.handle->drv_flow)); + flow.handle->drv_flow = NULL; + } + claim_zero(flow_dv_matcher_release(dev, flow.handle)); + if (err != 0) + break; + ret = vprio[i]; + } + mlx5_ipool_free(pool, flow.handle_idx); + /* Set rte_errno if no expected priority value matched. */ + if (ret < 0) + rte_errno = -ret; + return ret; +} + const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = { .validate = flow_dv_validate, .prepare = flow_dv_prepare, @@ -18011,6 +18113,7 @@ const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = { .action_update = flow_dv_action_update, .action_query = flow_dv_action_query, .sync_domain = flow_dv_sync_domain, + .discover_priorities = flow_dv_discover_priorities, }; #endif /* HAVE_IBV_FLOW_DV_SUPPORT */ diff --git a/drivers/net/mlx5/mlx5_flow_verbs.c b/drivers/net/mlx5/mlx5_flow_verbs.c index b93fd4d2c9..72b9db6c7f 100644 --- a/drivers/net/mlx5/mlx5_flow_verbs.c +++ b/drivers/net/mlx5/mlx5_flow_verbs.c @@ -28,17 +28,6 @@ #define VERBS_SPEC_INNER(item_flags) \ (!!((item_flags) & MLX5_FLOW_LAYER_TUNNEL) ? IBV_FLOW_SPEC_INNER : 0) -/* Map of Verbs to Flow priority with 8 Verbs priorities. */ -static const uint32_t priority_map_3[][MLX5_PRIORITY_MAP_MAX] = { - { 0, 1, 2 }, { 2, 3, 4 }, { 5, 6, 7 }, -}; - -/* Map of Verbs to Flow priority with 16 Verbs priorities. */ -static const uint32_t priority_map_5[][MLX5_PRIORITY_MAP_MAX] = { - { 0, 1, 2 }, { 3, 4, 5 }, { 6, 7, 8 }, - { 9, 10, 11 }, { 12, 13, 14 }, -}; - /* Verbs specification header. */ struct ibv_spec_header { enum ibv_flow_spec_type type; @@ -50,13 +39,17 @@ struct ibv_spec_header { * * @param[in] dev * Pointer to the Ethernet device structure. - * + * @param[in] vprio + * Expected result variants. + * @param[in] vprio_n + * Number of entries in @p vprio array. * @return - * number of supported flow priority on success, a negative errno + * Number of supported flow priority on success, a negative errno * value otherwise and rte_errno is set. */ -int -mlx5_flow_discover_priorities(struct rte_eth_dev *dev) +static int +flow_verbs_discover_priorities(struct rte_eth_dev *dev, + const uint16_t *vprio, int vprio_n) { struct mlx5_priv *priv = dev->data->dev_private; struct { @@ -79,7 +72,6 @@ mlx5_flow_discover_priorities(struct rte_eth_dev *dev) }; struct ibv_flow *flow; struct mlx5_hrxq *drop = priv->drop_queue.hrxq; - uint16_t vprio[] = { 8, 16 }; int i; int priority = 0; @@ -87,7 +79,7 @@ mlx5_flow_discover_priorities(struct rte_eth_dev *dev) rte_errno = ENOTSUP; return -rte_errno; } - for (i = 0; i != RTE_DIM(vprio); i++) { + for (i = 0; i != vprio_n; i++) { flow_attr.attr.priority = vprio[i] - 1; flow = mlx5_glue->create_flow(drop->qp, &flow_attr.attr); if (!flow) @@ -95,59 +87,9 @@ mlx5_flow_discover_priorities(struct rte_eth_dev *dev) claim_zero(mlx5_glue->destroy_flow(flow)); priority = vprio[i]; } - switch (priority) { - case 8: - priority = RTE_DIM(priority_map_3); - break; - case 16: - priority = RTE_DIM(priority_map_5); - break; - default: - rte_errno = ENOTSUP; - DRV_LOG(ERR, - "port %u verbs maximum priority: %d expected 8/16", - dev->data->port_id, priority); - return -rte_errno; - } - DRV_LOG(INFO, "port %u supported flow priorities:" - " 0-%d for ingress or egress root table," - " 0-%d for non-root table or transfer root table.", - dev->data->port_id, priority - 2, - MLX5_NON_ROOT_FLOW_MAX_PRIO - 1); return priority; } -/** - * Adjust flow priority based on the highest layer and the request priority. - * - * @param[in] dev - * Pointer to the Ethernet device structure. - * @param[in] priority - * The rule base priority. - * @param[in] subpriority - * The priority based on the items. - * - * @return - * The new priority. - */ -uint32_t -mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority, - uint32_t subpriority) -{ - uint32_t res = 0; - struct mlx5_priv *priv = dev->data->dev_private; - - switch (priv->config.flow_prio) { - case RTE_DIM(priority_map_3): - res = priority_map_3[priority][subpriority]; - break; - case RTE_DIM(priority_map_5): - res = priority_map_5[priority][subpriority]; - break; - } - return res; -} - /** * Get Verbs flow counter by index. * @@ -2105,4 +2047,5 @@ const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops = { .destroy = flow_verbs_destroy, .query = flow_verbs_query, .sync_domain = flow_verbs_sync_domain, + .discover_priorities = flow_verbs_discover_priorities, }; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE; SFS:(4636009)(36840700001)(46966006)(6286002)(30864003)(1076003)(36860700001)(70206006)(5660300002)(6666004)(450100002)(82310400003)(4326008)(83380400001)(70586007)(55016002)(107886003)(54906003)(316002)(508600001)(8936002)(16526019)(2616005)(6916009)(426003)(26005)(186003)(36756003)(2876002)(2906002)(47076005)(336012)(356005)(8676002)(7636003)(7696005)(86362001); DIR:OUT; SFP:1101; X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Oct 2021 00:52:39.2340 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b5cb0b60-fe1b-405a-2054-08d9879a6e3f X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT015.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB4907 Subject: [dpdk-dev] [PATCH 4/5] net/mlx5: create drop queue using DevX X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Dmitry Kozlyuk Drop queue creation and destruction were not implemented for DevX flow engine and Verbs engine methods were used as a workaround. Implement these methods for DevX so that there is a valid queue ID that can be used regardless of queue configuration via API. Cc: stable@dpdk.org Signed-off-by: Dmitry Kozlyuk Acked-by: Matan Azrad --- drivers/net/mlx5/linux/mlx5_os.c | 4 - drivers/net/mlx5/mlx5_devx.c | 204 ++++++++++++++++++++++++++----- 2 files changed, 176 insertions(+), 32 deletions(-) diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c index 8ee7ada51b..985f0bd489 100644 --- a/drivers/net/mlx5/linux/mlx5_os.c +++ b/drivers/net/mlx5/linux/mlx5_os.c @@ -1790,10 +1790,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev, } if (config->devx && config->dv_flow_en && config->dest_tir) { priv->obj_ops = devx_obj_ops; - priv->obj_ops.drop_action_create = - ibv_obj_ops.drop_action_create; - priv->obj_ops.drop_action_destroy = - ibv_obj_ops.drop_action_destroy; #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET priv->obj_ops.txq_obj_modify = ibv_obj_ops.txq_obj_modify; #else diff --git a/drivers/net/mlx5/mlx5_devx.c b/drivers/net/mlx5/mlx5_devx.c index a1db53577a..447d6bafb9 100644 --- a/drivers/net/mlx5/mlx5_devx.c +++ b/drivers/net/mlx5/mlx5_devx.c @@ -226,17 +226,17 @@ mlx5_rx_devx_get_event(struct mlx5_rxq_obj *rxq_obj) * * @param dev * Pointer to Ethernet device. - * @param idx - * Queue index in DPDK Rx queue array. + * @param rxq_data + * RX queue data. * * @return * 0 on success, a negative errno value otherwise and rte_errno is set. */ static int -mlx5_rxq_create_devx_rq_resources(struct rte_eth_dev *dev, uint16_t idx) +mlx5_rxq_create_devx_rq_resources(struct rte_eth_dev *dev, + struct mlx5_rxq_data *rxq_data) { struct mlx5_priv *priv = dev->data->dev_private; - struct mlx5_rxq_data *rxq_data = (*priv->rxqs)[idx]; struct mlx5_rxq_ctrl *rxq_ctrl = container_of(rxq_data, struct mlx5_rxq_ctrl, rxq); struct mlx5_devx_create_rq_attr rq_attr = { 0 }; @@ -289,20 +289,20 @@ mlx5_rxq_create_devx_rq_resources(struct rte_eth_dev *dev, uint16_t idx) * * @param dev * Pointer to Ethernet device. - * @param idx - * Queue index in DPDK Rx queue array. + * @param rxq_data + * RX queue data. * * @return * 0 on success, a negative errno value otherwise and rte_errno is set. */ static int -mlx5_rxq_create_devx_cq_resources(struct rte_eth_dev *dev, uint16_t idx) +mlx5_rxq_create_devx_cq_resources(struct rte_eth_dev *dev, + struct mlx5_rxq_data *rxq_data) { struct mlx5_devx_cq *cq_obj = 0; struct mlx5_devx_cq_attr cq_attr = { 0 }; struct mlx5_priv *priv = dev->data->dev_private; struct mlx5_dev_ctx_shared *sh = priv->sh; - struct mlx5_rxq_data *rxq_data = (*priv->rxqs)[idx]; struct mlx5_rxq_ctrl *rxq_ctrl = container_of(rxq_data, struct mlx5_rxq_ctrl, rxq); unsigned int cqe_n = mlx5_rxq_cqe_num(rxq_data); @@ -497,13 +497,13 @@ mlx5_rxq_devx_obj_new(struct rte_eth_dev *dev, uint16_t idx) tmpl->fd = mlx5_os_get_devx_channel_fd(tmpl->devx_channel); } /* Create CQ using DevX API. */ - ret = mlx5_rxq_create_devx_cq_resources(dev, idx); + ret = mlx5_rxq_create_devx_cq_resources(dev, rxq_data); if (ret) { DRV_LOG(ERR, "Failed to create CQ."); goto error; } /* Create RQ using DevX API. */ - ret = mlx5_rxq_create_devx_rq_resources(dev, idx); + ret = mlx5_rxq_create_devx_rq_resources(dev, rxq_data); if (ret) { DRV_LOG(ERR, "Port %u Rx queue %u RQ creation failure.", dev->data->port_id, idx); @@ -536,6 +536,11 @@ mlx5_rxq_devx_obj_new(struct rte_eth_dev *dev, uint16_t idx) * Pointer to Ethernet device. * @param log_n * Log of number of queues in the array. + * @param queues + * List of RX queue indices or NULL, in which case + * the attribute will be filled by drop queue ID. + * @param queues_n + * Size of @p queues array or 0 if it is NULL. * @param ind_tbl * DevX indirection table object. * @@ -563,6 +568,11 @@ mlx5_devx_ind_table_create_rqt_attr(struct rte_eth_dev *dev, } rqt_attr->rqt_max_size = priv->config.ind_table_max_size; rqt_attr->rqt_actual_size = rqt_n; + if (queues == NULL) { + for (i = 0; i < rqt_n; i++) + rqt_attr->rq_list[i] = priv->drop_queue.rxq->rq->id; + return rqt_attr; + } for (i = 0; i != queues_n; ++i) { struct mlx5_rxq_data *rxq = (*priv->rxqs)[queues[i]]; struct mlx5_rxq_ctrl *rxq_ctrl = @@ -670,7 +680,8 @@ mlx5_devx_ind_table_destroy(struct mlx5_ind_table_obj *ind_tbl) * @param[in] hash_fields * Verbs protocol hash field to make the RSS on. * @param[in] ind_tbl - * Indirection table for TIR. + * Indirection table for TIR. If table queues array is NULL, + * a TIR for drop queue is assumed. * @param[in] tunnel * Tunnel type. * @param[out] tir_attr @@ -686,19 +697,27 @@ mlx5_devx_tir_attr_set(struct rte_eth_dev *dev, const uint8_t *rss_key, int tunnel, struct mlx5_devx_tir_attr *tir_attr) { struct mlx5_priv *priv = dev->data->dev_private; - struct mlx5_rxq_data *rxq_data = (*priv->rxqs)[ind_tbl->queues[0]]; - struct mlx5_rxq_ctrl *rxq_ctrl = - container_of(rxq_data, struct mlx5_rxq_ctrl, rxq); - enum mlx5_rxq_type rxq_obj_type = rxq_ctrl->type; + enum mlx5_rxq_type rxq_obj_type; bool lro = true; uint32_t i; - /* Enable TIR LRO only if all the queues were configured for. */ - for (i = 0; i < ind_tbl->queues_n; ++i) { - if (!(*priv->rxqs)[ind_tbl->queues[i]]->lro) { - lro = false; - break; + /* NULL queues designate drop queue. */ + if (ind_tbl->queues != NULL) { + struct mlx5_rxq_data *rxq_data = + (*priv->rxqs)[ind_tbl->queues[0]]; + struct mlx5_rxq_ctrl *rxq_ctrl = + container_of(rxq_data, struct mlx5_rxq_ctrl, rxq); + rxq_obj_type = rxq_ctrl->type; + + /* Enable TIR LRO only if all the queues were configured for. */ + for (i = 0; i < ind_tbl->queues_n; ++i) { + if (!(*priv->rxqs)[ind_tbl->queues[i]]->lro) { + lro = false; + break; + } } + } else { + rxq_obj_type = priv->drop_queue.rxq->rxq_ctrl->type; } memset(tir_attr, 0, sizeof(*tir_attr)); tir_attr->disp_type = MLX5_TIRC_DISP_TYPE_INDIRECT; @@ -857,7 +876,7 @@ mlx5_devx_hrxq_modify(struct rte_eth_dev *dev, struct mlx5_hrxq *hrxq, } /** - * Create a DevX drop action for Rx Hash queue. + * Create a DevX drop Rx queue. * * @param dev * Pointer to Ethernet device. @@ -866,14 +885,99 @@ mlx5_devx_hrxq_modify(struct rte_eth_dev *dev, struct mlx5_hrxq *hrxq, * 0 on success, a negative errno value otherwise and rte_errno is set. */ static int -mlx5_devx_drop_action_create(struct rte_eth_dev *dev) +mlx5_rxq_devx_obj_drop_create(struct rte_eth_dev *dev) { - (void)dev; - DRV_LOG(ERR, "DevX drop action is not supported yet."); - rte_errno = ENOTSUP; + struct mlx5_priv *priv = dev->data->dev_private; + int socket_id = dev->device->numa_node; + struct mlx5_rxq_ctrl *rxq_ctrl; + struct mlx5_rxq_data *rxq_data; + struct mlx5_rxq_obj *rxq = NULL; + int ret; + + /* + * Initialize dummy control structures. + * They are required to hold pointers for cleanup + * and are only accessible via drop queue DevX objects. + */ + rxq_ctrl = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*rxq_ctrl), + 0, socket_id); + if (rxq_ctrl == NULL) { + DRV_LOG(ERR, "Port %u could not allocate drop queue control", + dev->data->port_id); + rte_errno = ENOMEM; + goto error; + } + rxq = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*rxq), 0, socket_id); + if (rxq == NULL) { + DRV_LOG(ERR, "Port %u could not allocate drop queue object", + dev->data->port_id); + rte_errno = ENOMEM; + goto error; + } + rxq->rxq_ctrl = rxq_ctrl; + rxq_ctrl->type = MLX5_RXQ_TYPE_STANDARD; + rxq_ctrl->priv = priv; + rxq_ctrl->obj = rxq; + rxq_data = &rxq_ctrl->rxq; + /* Create CQ using DevX API. */ + ret = mlx5_rxq_create_devx_cq_resources(dev, rxq_data); + if (ret != 0) { + DRV_LOG(ERR, "Port %u drop queue CQ creation failed.", + dev->data->port_id); + goto error; + } + /* Create RQ using DevX API. */ + ret = mlx5_rxq_create_devx_rq_resources(dev, rxq_data); + if (ret != 0) { + DRV_LOG(ERR, "Port %u drop queue RQ creation failed.", + dev->data->port_id); + rte_errno = ENOMEM; + goto error; + } + /* Change queue state to ready. */ + ret = mlx5_devx_modify_rq(rxq, MLX5_RXQ_MOD_RST2RDY); + if (ret != 0) + goto error; + /* Initialize drop queue. */ + priv->drop_queue.rxq = rxq; + return 0; +error: + ret = rte_errno; /* Save rte_errno before cleanup. */ + if (rxq != NULL) { + if (rxq->rq_obj.rq != NULL) + mlx5_devx_rq_destroy(&rxq->rq_obj); + if (rxq->cq_obj.cq != NULL) + mlx5_devx_cq_destroy(&rxq->cq_obj); + if (rxq->devx_channel) + mlx5_os_devx_destroy_event_channel + (rxq->devx_channel); + mlx5_free(rxq); + } + if (rxq_ctrl != NULL) + mlx5_free(rxq_ctrl); + rte_errno = ret; /* Restore rte_errno. */ return -rte_errno; } +/** + * Release drop Rx queue resources. + * + * @param dev + * Pointer to Ethernet device. + */ +static void +mlx5_rxq_devx_obj_drop_release(struct rte_eth_dev *dev) +{ + struct mlx5_priv *priv = dev->data->dev_private; + struct mlx5_rxq_obj *rxq = priv->drop_queue.rxq; + struct mlx5_rxq_ctrl *rxq_ctrl = rxq->rxq_ctrl; + + mlx5_rxq_devx_obj_release(rxq); + mlx5_free(rxq); + mlx5_free(rxq_ctrl); + priv->drop_queue.rxq = NULL; +} + /** * Release a drop hash Rx queue. * @@ -883,9 +987,53 @@ mlx5_devx_drop_action_create(struct rte_eth_dev *dev) static void mlx5_devx_drop_action_destroy(struct rte_eth_dev *dev) { - (void)dev; - DRV_LOG(ERR, "DevX drop action is not supported yet."); - rte_errno = ENOTSUP; + struct mlx5_priv *priv = dev->data->dev_private; + struct mlx5_hrxq *hrxq = priv->drop_queue.hrxq; + + if (hrxq->tir != NULL) + mlx5_devx_tir_destroy(hrxq); + if (hrxq->ind_table->ind_table != NULL) + mlx5_devx_ind_table_destroy(hrxq->ind_table); + if (priv->drop_queue.rxq->rq != NULL) + mlx5_rxq_devx_obj_drop_release(dev); +} + +/** + * Create a DevX drop action for Rx Hash queue. + * + * @param dev + * Pointer to Ethernet device. + * + * @return + * 0 on success, a negative errno value otherwise and rte_errno is set. + */ +static int +mlx5_devx_drop_action_create(struct rte_eth_dev *dev) +{ + struct mlx5_priv *priv = dev->data->dev_private; + struct mlx5_hrxq *hrxq = priv->drop_queue.hrxq; + int ret; + + ret = mlx5_rxq_devx_obj_drop_create(dev); + if (ret != 0) { + DRV_LOG(ERR, "Cannot create drop RX queue"); + return ret; + } + /* hrxq->ind_table queues are NULL, drop RX queue ID will be used */ + ret = mlx5_devx_ind_table_new(dev, 0, hrxq->ind_table); + if (ret != 0) { + DRV_LOG(ERR, "Cannot create drop hash RX queue indirection table"); + goto error; + } + ret = mlx5_devx_hrxq_new(dev, hrxq, /* tunnel */ false); + if (ret != 0) { + DRV_LOG(ERR, "Cannot create drop hash RX queue"); + goto error; + } + return 0; +error: + mlx5_devx_drop_action_destroy(dev); + return ret; } /** From patchwork Tue Oct 5 00:52:16 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Kozlyuk X-Patchwork-Id: 100480 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D558AA0C41; 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dpdk.org; dkim=none (message not signed) header.d=none;dpdk.org; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by BN8NAM11FT015.mail.protection.outlook.com (10.13.176.90) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4566.14 via Frontend Transport; Tue, 5 Oct 2021 00:52:40 +0000 Received: from nvidia.com (172.20.187.5) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Tue, 5 Oct 2021 00:52:38 +0000 From: To: CC: Dmitry Kozlyuk , , , Matan Azrad , Viacheslav Ovsiienko Date: Tue, 5 Oct 2021 03:52:16 +0300 Message-ID: <20211005005216.2427489-6-dkozlyuk@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211005005216.2427489-1-dkozlyuk@nvidia.com> References: <20211005005216.2427489-1-dkozlyuk@nvidia.com> MIME-Version: 1.0 X-Originating-IP: [172.20.187.5] X-ClientProxiedBy: HQMAIL105.nvidia.com (172.20.187.12) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 70a16b64-98f9-415c-dcb9-08d9879a6f1c X-MS-TrafficTypeDiagnostic: SN6PR12MB2767: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:291; 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CAT:NONE; SFS:(4636009)(46966006)(36840700001)(2906002)(8936002)(316002)(107886003)(70586007)(426003)(8676002)(336012)(47076005)(26005)(186003)(16526019)(36756003)(82310400003)(54906003)(1076003)(2616005)(7696005)(7636003)(86362001)(30864003)(36860700001)(70206006)(83380400001)(5660300002)(4326008)(2876002)(356005)(508600001)(55016002)(450100002)(6666004)(6286002)(6916009); DIR:OUT; SFP:1101; X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Oct 2021 00:52:40.6692 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 70a16b64-98f9-415c-dcb9-08d9879a6f1c X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT015.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN6PR12MB2767 Subject: [dpdk-dev] [PATCH 5/5] net/mlx5: preserve indirect actions on restart X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Dmitry Kozlyuk MLX5 PMD uses reference counting to manage RX queue resources. After port stop shared RSS actions kept references to RX queues, preventing resource release. As a result, internal PMD mempool for such queues had been exhausted after a number of port restarts. Diagnostic message from rte_eth_dev_start(): Rx queue allocation failed: Cannot allocate memory Dereference RX queues used by indirect actions on port stop (detach) and restore references on port start (attach) in order to allow RX queue resource release, but keep indirect RSS across the port restart. Replace queue IDs in HW by drop queue ID on detach and restore actual queue IDs on attach. As a result, MLX5 PMD is able to keep all its indirect actions across port restart. Advertise this capability to the ethdev layer. Fixes: 4b61b8774be9 ("ethdev: introduce indirect flow action") Cc: bingz@nvidia.com Cc: stable@dpdk.org Signed-off-by: Dmitry Kozlyuk Acked-by: Matan Azrad --- drivers/net/mlx5/mlx5_ethdev.c | 1 + drivers/net/mlx5/mlx5_flow.c | 194 ++++++++++++++++++++++++++++---- drivers/net/mlx5/mlx5_flow.h | 2 + drivers/net/mlx5/mlx5_rx.h | 4 + drivers/net/mlx5/mlx5_rxq.c | 99 ++++++++++++++-- drivers/net/mlx5/mlx5_trigger.c | 10 ++ 6 files changed, 276 insertions(+), 34 deletions(-) diff --git a/drivers/net/mlx5/mlx5_ethdev.c b/drivers/net/mlx5/mlx5_ethdev.c index 82e2284d98..8ebfd0bccb 100644 --- a/drivers/net/mlx5/mlx5_ethdev.c +++ b/drivers/net/mlx5/mlx5_ethdev.c @@ -325,6 +325,7 @@ mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info) info->reta_size = priv->reta_idx_n ? priv->reta_idx_n : config->ind_table_max_size; info->hash_key_size = MLX5_RSS_HASH_KEY_LEN; + info->dev_capa = RTE_ETH_DEV_CAPA_FLOW_SHARED_OBJECT_KEEP; info->speed_capa = priv->link_speed_capa; info->flow_type_rss_offloads = ~MLX5_RSS_HF_MASK; mlx5_set_default_params(dev, info); diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c index bfc3e20c9a..c10b911259 100644 --- a/drivers/net/mlx5/mlx5_flow.c +++ b/drivers/net/mlx5/mlx5_flow.c @@ -1560,6 +1560,58 @@ mlx5_flow_validate_action_queue(const struct rte_flow_action *action, return 0; } +/** + * Validate queue numbers for device RSS. + * + * @param[in] dev + * Configured device. + * @param[in] queues + * Array of queue numbers. + * @param[in] queues_n + * Size of the @p queues array. + * @param[out] error + * On error, filled with a textual error description. + * @param[out] queue + * On error, filled with an offending queue index in @p queues array. + * + * @return + * 0 on success, a negative errno code on error. + */ +static int +mlx5_validate_rss_queues(const struct rte_eth_dev *dev, + const uint16_t *queues, uint32_t queues_n, + const char **error, uint32_t *queue_idx) +{ + const struct mlx5_priv *priv = dev->data->dev_private; + enum mlx5_rxq_type rxq_type = MLX5_RXQ_TYPE_UNDEFINED; + uint32_t i; + + for (i = 0; i != queues_n; ++i) { + struct mlx5_rxq_ctrl *rxq_ctrl; + + if (queues[i] >= priv->rxqs_n) { + *error = "queue index out of range"; + *queue_idx = i; + return -EINVAL; + } + if (!(*priv->rxqs)[queues[i]]) { + *error = "queue is not configured"; + *queue_idx = i; + return -EINVAL; + } + rxq_ctrl = container_of((*priv->rxqs)[queues[i]], + struct mlx5_rxq_ctrl, rxq); + if (i == 0) + rxq_type = rxq_ctrl->type; + if (rxq_type != rxq_ctrl->type) { + *error = "combining hairpin and regular RSS queues is not supported"; + *queue_idx = i; + return -ENOTSUP; + } + } + return 0; +} + /* * Validate the rss action. * @@ -1580,8 +1632,9 @@ mlx5_validate_action_rss(struct rte_eth_dev *dev, { struct mlx5_priv *priv = dev->data->dev_private; const struct rte_flow_action_rss *rss = action->conf; - enum mlx5_rxq_type rxq_type = MLX5_RXQ_TYPE_UNDEFINED; - unsigned int i; + int ret; + const char *message; + uint32_t queue_idx; if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT && rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ) @@ -1645,27 +1698,12 @@ mlx5_validate_action_rss(struct rte_eth_dev *dev, return rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, "No queues configured"); - for (i = 0; i != rss->queue_num; ++i) { - struct mlx5_rxq_ctrl *rxq_ctrl; - - if (rss->queue[i] >= priv->rxqs_n) - return rte_flow_error_set - (error, EINVAL, - RTE_FLOW_ERROR_TYPE_ACTION_CONF, - &rss->queue[i], "queue index out of range"); - if (!(*priv->rxqs)[rss->queue[i]]) - return rte_flow_error_set - (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF, - &rss->queue[i], "queue is not configured"); - rxq_ctrl = container_of((*priv->rxqs)[rss->queue[i]], - struct mlx5_rxq_ctrl, rxq); - if (i == 0) - rxq_type = rxq_ctrl->type; - if (rxq_type != rxq_ctrl->type) - return rte_flow_error_set - (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION_CONF, - &rss->queue[i], - "combining hairpin and regular RSS queues is not supported"); + ret = mlx5_validate_rss_queues(dev, rss->queue, rss->queue_num, + &message, &queue_idx); + if (ret != 0) { + return rte_flow_error_set(error, -ret, + RTE_FLOW_ERROR_TYPE_ACTION_CONF, + &rss->queue[queue_idx], message); } return 0; } @@ -8547,6 +8585,116 @@ mlx5_action_handle_flush(struct rte_eth_dev *dev) return ret; } +/** + * Validate existing indirect actions against current device configuration + * and attach them to device resources. + * + * @param dev + * Pointer to Ethernet device. + * + * @return + * 0 on success, a negative errno value otherwise and rte_errno is set. + */ +int +mlx5_action_handle_attach(struct rte_eth_dev *dev) +{ + struct mlx5_priv *priv = dev->data->dev_private; + struct mlx5_indexed_pool *ipool = + priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS]; + struct mlx5_shared_action_rss *shared_rss, *shared_rss_last; + int ret = 0; + uint32_t idx; + + ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) { + struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl; + const char *message; + uint32_t queue_idx; + + ret = mlx5_validate_rss_queues(dev, ind_tbl->queues, + ind_tbl->queues_n, + &message, &queue_idx); + if (ret != 0) { + DRV_LOG(ERR, "Port %u cannot use queue %u in RSS: %s", + dev->data->port_id, ind_tbl->queues[queue_idx], + message); + break; + } + } + if (ret != 0) + return ret; + ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) { + struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl; + + ret = mlx5_ind_table_obj_attach(dev, ind_tbl); + if (ret != 0) { + DRV_LOG(ERR, "Port %u could not attach " + "indirection table obj %p", + dev->data->port_id, (void *)ind_tbl); + goto error; + } + } + return 0; +error: + shared_rss_last = shared_rss; + ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) { + struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl; + + if (shared_rss == shared_rss_last) + break; + if (mlx5_ind_table_obj_detach(dev, ind_tbl) != 0) + DRV_LOG(CRIT, "Port %u could not detach " + "indirection table obj %p on rollback", + dev->data->port_id, (void *)ind_tbl); + } + return ret; +} + +/** + * Detach indirect actions of the device from its resources. + * + * @param dev + * Pointer to Ethernet device. + * + * @return + * 0 on success, a negative errno value otherwise and rte_errno is set. + */ +int +mlx5_action_handle_detach(struct rte_eth_dev *dev) +{ + struct mlx5_priv *priv = dev->data->dev_private; + struct mlx5_indexed_pool *ipool = + priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS]; + struct mlx5_shared_action_rss *shared_rss, *shared_rss_last; + int ret = 0; + uint32_t idx; + + ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) { + struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl; + + ret = mlx5_ind_table_obj_detach(dev, ind_tbl); + if (ret != 0) { + DRV_LOG(ERR, "Port %u could not detach " + "indirection table obj %p", + dev->data->port_id, (void *)ind_tbl); + goto error; + } + } + return 0; +error: + shared_rss_last = shared_rss; + ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) { + struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl; + + if (shared_rss == shared_rss_last) + break; + if (mlx5_ind_table_obj_attach(dev, ind_tbl) != 0) + DRV_LOG(CRIT, "Port %u could not attach " + "indirection table obj %p on rollback", + dev->data->port_id, (void *)ind_tbl); + } + return ret; +} + #ifndef HAVE_MLX5DV_DR #define MLX5_DOMAIN_SYNC_FLOW ((1 << 0) | (1 << 1)) #else diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h index 8f94125f26..6bc7946cc3 100644 --- a/drivers/net/mlx5/mlx5_flow.h +++ b/drivers/net/mlx5/mlx5_flow.h @@ -1574,6 +1574,8 @@ void mlx5_flow_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev, struct mlx5_flow_meter_policy *mtr_policy); int mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev); int mlx5_flow_discover_dr_action_support(struct rte_eth_dev *dev); +int mlx5_action_handle_attach(struct rte_eth_dev *dev); +int mlx5_action_handle_detach(struct rte_eth_dev *dev); int mlx5_action_handle_flush(struct rte_eth_dev *dev); void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id); int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh); diff --git a/drivers/net/mlx5/mlx5_rx.h b/drivers/net/mlx5/mlx5_rx.h index 3f2b99fb65..7319ad0264 100644 --- a/drivers/net/mlx5/mlx5_rx.h +++ b/drivers/net/mlx5/mlx5_rx.h @@ -222,6 +222,10 @@ int mlx5_ind_table_obj_modify(struct rte_eth_dev *dev, struct mlx5_ind_table_obj *ind_tbl, uint16_t *queues, const uint32_t queues_n, bool standalone); +int mlx5_ind_table_obj_attach(struct rte_eth_dev *dev, + struct mlx5_ind_table_obj *ind_tbl); +int mlx5_ind_table_obj_detach(struct rte_eth_dev *dev, + struct mlx5_ind_table_obj *ind_tbl); struct mlx5_list_entry *mlx5_hrxq_create_cb(void *tool_ctx, void *cb_ctx); int mlx5_hrxq_match_cb(void *tool_ctx, struct mlx5_list_entry *entry, void *cb_ctx); diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c index abd8ce7989..cf4a29772c 100644 --- a/drivers/net/mlx5/mlx5_rxq.c +++ b/drivers/net/mlx5/mlx5_rxq.c @@ -2018,6 +2018,26 @@ mlx5_ind_table_obj_new(struct rte_eth_dev *dev, const uint16_t *queues, return ind_tbl; } +static int +mlx5_ind_table_obj_check_standalone(struct rte_eth_dev *dev __rte_unused, + struct mlx5_ind_table_obj *ind_tbl) +{ + uint32_t refcnt; + + refcnt = __atomic_load_n(&ind_tbl->refcnt, __ATOMIC_RELAXED); + if (refcnt <= 1) + return 0; + /* + * Modification of indirection tables having more than 1 + * reference is unsupported. + */ + DRV_LOG(DEBUG, + "Port %u cannot modify indirection table %p (refcnt %u > 1).", + dev->data->port_id, (void *)ind_tbl, refcnt); + rte_errno = EINVAL; + return -rte_errno; +} + /** * Modify an indirection table. * @@ -2050,18 +2070,8 @@ mlx5_ind_table_obj_modify(struct rte_eth_dev *dev, MLX5_ASSERT(standalone); RTE_SET_USED(standalone); - if (__atomic_load_n(&ind_tbl->refcnt, __ATOMIC_RELAXED) > 1) { - /* - * Modification of indirection ntables having more than 1 - * reference unsupported. Intended for standalone indirection - * tables only. - */ - DRV_LOG(DEBUG, - "Port %u cannot modify indirection table (refcnt> 1).", - dev->data->port_id); - rte_errno = EINVAL; + if (mlx5_ind_table_obj_check_standalone(dev, ind_tbl) < 0) return -rte_errno; - } for (i = 0; i != queues_n; ++i) { if (!mlx5_rxq_get(dev, queues[i])) { ret = -rte_errno; @@ -2087,6 +2097,73 @@ mlx5_ind_table_obj_modify(struct rte_eth_dev *dev, return ret; } +/** + * Attach an indirection table to its queues. + * + * @param dev + * Pointer to Ethernet device. + * @param ind_table + * Indirection table to attach. + * + * @return + * 0 on success, a negative errno value otherwise and rte_errno is set. + */ +int +mlx5_ind_table_obj_attach(struct rte_eth_dev *dev, + struct mlx5_ind_table_obj *ind_tbl) +{ + unsigned int i; + int ret; + + ret = mlx5_ind_table_obj_modify(dev, ind_tbl, ind_tbl->queues, + ind_tbl->queues_n, true); + if (ret != 0) { + DRV_LOG(ERR, "Port %u could not modify indirect table obj %p", + dev->data->port_id, (void *)ind_tbl); + return ret; + } + for (i = 0; i < ind_tbl->queues_n; i++) + mlx5_rxq_get(dev, ind_tbl->queues[i]); + return 0; +} + +/** + * Detach an indirection table from its queues. + * + * @param dev + * Pointer to Ethernet device. + * @param ind_table + * Indirection table to detach. + * + * @return + * 0 on success, a negative errno value otherwise and rte_errno is set. + */ +int +mlx5_ind_table_obj_detach(struct rte_eth_dev *dev, + struct mlx5_ind_table_obj *ind_tbl) +{ + struct mlx5_priv *priv = dev->data->dev_private; + const unsigned int n = rte_is_power_of_2(ind_tbl->queues_n) ? + log2above(ind_tbl->queues_n) : + log2above(priv->config.ind_table_max_size); + unsigned int i; + int ret; + + ret = mlx5_ind_table_obj_check_standalone(dev, ind_tbl); + if (ret != 0) + return ret; + MLX5_ASSERT(priv->obj_ops.ind_table_modify); + ret = priv->obj_ops.ind_table_modify(dev, n, NULL, 0, ind_tbl); + if (ret != 0) { + DRV_LOG(ERR, "Port %u could not modify indirect table obj %p", + dev->data->port_id, (void *)ind_tbl); + return ret; + } + for (i = 0; i < ind_tbl->queues_n; i++) + mlx5_rxq_release(dev, ind_tbl->queues[i]); + return ret; +} + int mlx5_hrxq_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry, void *cb_ctx) diff --git a/drivers/net/mlx5/mlx5_trigger.c b/drivers/net/mlx5/mlx5_trigger.c index 54173bfacb..c3adf5082e 100644 --- a/drivers/net/mlx5/mlx5_trigger.c +++ b/drivers/net/mlx5/mlx5_trigger.c @@ -14,6 +14,7 @@ #include #include "mlx5.h" +#include "mlx5_flow.h" #include "mlx5_mr.h" #include "mlx5_rx.h" #include "mlx5_tx.h" @@ -1113,6 +1114,14 @@ mlx5_dev_start(struct rte_eth_dev *dev) mlx5_rxq_timestamp_set(dev); /* Set a mask and offset of scheduling on timestamp into Tx queues. */ mlx5_txq_dynf_timestamp_set(dev); + /* Attach indirection table objects detached on port stop. */ + ret = mlx5_action_handle_attach(dev); + if (ret) { + DRV_LOG(ERR, + "port %u failed to attach indirect actions: %s", + dev->data->port_id, rte_strerror(rte_errno)); + goto error; + } /* * In non-cached mode, it only needs to start the default mreg copy * action and no flow created by application exists anymore. @@ -1185,6 +1194,7 @@ mlx5_dev_stop(struct rte_eth_dev *dev) /* All RX queue flags will be cleared in the flush interface. */ mlx5_flow_list_flush(dev, MLX5_FLOW_TYPE_GEN, true); mlx5_flow_meter_rxq_flush(dev); + mlx5_action_handle_detach(dev); mlx5_rx_intr_vec_disable(dev); priv->sh->port[priv->dev_port - 1].ih_port_id = RTE_MAX_ETHPORTS; priv->sh->port[priv->dev_port - 1].devx_ih_port_id = RTE_MAX_ETHPORTS;