From patchwork Thu Jan 20 16:26:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akhil Goyal X-Patchwork-Id: 106134 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 05FEDA034E; Thu, 20 Jan 2022 17:26:51 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id C4A984270E; Thu, 20 Jan 2022 17:26:50 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 66A2F4270E for ; Thu, 20 Jan 2022 17:26:48 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 20KAA8mY026190; Thu, 20 Jan 2022 08:26:46 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=WLJsdwbCUxvt3jhJ6NDBDZ924bBzSwMR7wM+INKTBgw=; b=Gmcm9/m46wZ6qHM+gjvGKIiVfeOPG/CYyV8LsUZQdIICXGoAHV/0F7IjYGTqez0xKo4M Tqnhx/DSHDF+DerqO3aiyrZP9693GYkrGyBo+DuSdbY+nswmxm0pJYW1FYDXYStfnVBR iuUObF4j1E5PQ+Jhh2lS25XUPWYNIXRLoqKKmMaKZeroCwBglL16JAliUuQg8ORWR5Pe 8o2IPCOJSOtyXyQxvvDSWIfVPV0GxATvwggNXhrUFTMcaPagnVuIj/eSIpSMnAW+RdYu JCVTEV78altJLcAeEp6hK/E1+bK/GyGMz3Kh659tR9Gd/HfR2bI/3IidgbeTRdkYxFp5 jA== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3dq5re1csw-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Thu, 20 Jan 2022 08:26:46 -0800 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Thu, 20 Jan 2022 08:26:45 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Thu, 20 Jan 2022 08:26:45 -0800 Received: from localhost.localdomain (unknown [10.28.48.55]) by maili.marvell.com (Postfix) with ESMTP id E2A0D3F705A; Thu, 20 Jan 2022 08:26:40 -0800 (PST) From: Akhil Goyal To: CC: , , , , , , , , , , , , "Akhil Goyal" Subject: [PATCH v2 1/4] ethdev: introduce IP reassembly offload Date: Thu, 20 Jan 2022 21:56:24 +0530 Message-ID: <20220120162627.4155695-2-gakhil@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220120162627.4155695-1-gakhil@marvell.com> References: <20220103150813.1694888-1-gakhil@marvell.com> <20220120162627.4155695-1-gakhil@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: qKPnHakZqnTdYqQonf2pFlVnY9b8C8GQ X-Proofpoint-ORIG-GUID: qKPnHakZqnTdYqQonf2pFlVnY9b8C8GQ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-01-20_06,2022-01-20_01,2021-12-02_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org IP Reassembly is a costly operation if it is done in software. The operation becomes even more costlier if IP fragments are encrypted. However, if it is offloaded to HW, it can considerably save application cycles. Hence, a new offload RTE_ETH_RX_OFFLOAD_IP_REASSEMBLY is introduced in ethdev for devices which can attempt reassembly of packets in hardware. rte_eth_dev_info is updated with the reassembly capabilities which a device can support. The resulting reassembled packet would be a typical segmented mbuf in case of success. And if reassembly of fragments is failed or is incomplete (if fragments do not come before the reass_timeout), the mbuf ol_flags can be updated. This is updated in a subsequent patch. Signed-off-by: Akhil Goyal Acked-by: Konstantin Ananyev --- devtools/libabigail.abignore | 5 +++++ doc/guides/nics/features.rst | 11 +++++++++++ lib/ethdev/rte_ethdev.c | 1 + lib/ethdev/rte_ethdev.h | 32 +++++++++++++++++++++++++++++++- 4 files changed, 48 insertions(+), 1 deletion(-) diff --git a/devtools/libabigail.abignore b/devtools/libabigail.abignore index 4b676f317d..90f449c43a 100644 --- a/devtools/libabigail.abignore +++ b/devtools/libabigail.abignore @@ -11,3 +11,8 @@ ; Ignore generated PMD information strings [suppress_variable] name_regexp = _pmd_info$ + +; Ignore fields inserted in place of reserved_64s of rte_eth_dev_info +[suppress_type] + name = rte_eth_dev_info + has_data_member_inserted_between = {offset_of(reserved_64s), end} diff --git a/doc/guides/nics/features.rst b/doc/guides/nics/features.rst index 27be2d2576..b45bce4a78 100644 --- a/doc/guides/nics/features.rst +++ b/doc/guides/nics/features.rst @@ -602,6 +602,17 @@ Supports inner packet L4 checksum. ``tx_offload_capa,tx_queue_offload_capa:RTE_ETH_TX_OFFLOAD_OUTER_UDP_CKSUM``. +.. _nic_features_ip_reassembly: + +IP reassembly +------------- + +Supports IP reassembly in hardware. + +* **[uses] rte_eth_rxconf,rte_eth_rxmode**: ``offloads:RTE_ETH_RX_OFFLOAD_IP_REASSEMBLY``. +* **[provides] rte_eth_dev_info**: ``reass_capa``. + + .. _nic_features_shared_rx_queue: Shared Rx queue diff --git a/lib/ethdev/rte_ethdev.c b/lib/ethdev/rte_ethdev.c index a1d475a292..d9a03f12f9 100644 --- a/lib/ethdev/rte_ethdev.c +++ b/lib/ethdev/rte_ethdev.c @@ -126,6 +126,7 @@ static const struct { RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM), RTE_RX_OFFLOAD_BIT2STR(RSS_HASH), RTE_RX_OFFLOAD_BIT2STR(BUFFER_SPLIT), + RTE_RX_OFFLOAD_BIT2STR(IP_REASSEMBLY), }; #undef RTE_RX_OFFLOAD_BIT2STR diff --git a/lib/ethdev/rte_ethdev.h b/lib/ethdev/rte_ethdev.h index fa299c8ad7..11427b2e4d 100644 --- a/lib/ethdev/rte_ethdev.h +++ b/lib/ethdev/rte_ethdev.h @@ -1586,6 +1586,7 @@ struct rte_eth_conf { #define RTE_ETH_RX_OFFLOAD_RSS_HASH RTE_BIT64(19) #define DEV_RX_OFFLOAD_RSS_HASH RTE_ETH_RX_OFFLOAD_RSS_HASH #define RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT RTE_BIT64(20) +#define RTE_ETH_RX_OFFLOAD_IP_REASSEMBLY RTE_BIT64(21) #define RTE_ETH_RX_OFFLOAD_CHECKSUM (RTE_ETH_RX_OFFLOAD_IPV4_CKSUM | \ RTE_ETH_RX_OFFLOAD_UDP_CKSUM | \ @@ -1781,6 +1782,33 @@ enum rte_eth_representor_type { RTE_ETH_REPRESENTOR_PF, /**< representor of Physical Function. */ }; +/* Flag to offload IP reassembly for IPv4 packets. */ +#define RTE_ETH_DEV_REASSEMBLY_F_IPV4 (RTE_BIT32(0)) +/* Flag to offload IP reassembly for IPv6 packets. */ +#define RTE_ETH_DEV_REASSEMBLY_F_IPV6 (RTE_BIT32(1)) +/** + * @warning + * @b EXPERIMENTAL: this structure may change without prior notice. + * + * A structure used to set IP reassembly configuration. + * + * If RTE_ETH_RX_OFFLOAD_IP_REASSEMBLY flag is set in offloads field, + * the PMD will attempt IP reassembly for the received packets as per + * properties defined in this structure: + * + */ +struct rte_eth_ip_reass_params { + /** Maximum time in ms which PMD can wait for other fragments. */ + uint32_t reass_timeout; + /** Maximum number of fragments that can be reassembled. */ + uint16_t max_frags; + /** + * Flags to enable reassembly of packet types - + * RTE_ETH_DEV_REASSEMBLY_F_xxx. + */ + uint16_t flags; +}; + /** * A structure used to retrieve the contextual information of * an Ethernet device, such as the controlling driver of the @@ -1841,8 +1869,10 @@ struct rte_eth_dev_info { * embedded managed interconnect/switch. */ struct rte_eth_switch_info switch_info; + /** IP reassembly offload capabilities that a device can support. */ + struct rte_eth_ip_reass_params reass_capa; - uint64_t reserved_64s[2]; /**< Reserved for future fields */ + uint64_t reserved_64s[1]; /**< Reserved for future fields */ void *reserved_ptrs[2]; /**< Reserved for future fields */ }; From patchwork Thu Jan 20 16:26:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akhil Goyal X-Patchwork-Id: 106135 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 18087A034E; Thu, 20 Jan 2022 17:26:58 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 3BA954270D; Thu, 20 Jan 2022 17:26:56 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 2912840042 for ; Thu, 20 Jan 2022 17:26:55 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 20KCvpYx015977; Thu, 20 Jan 2022 08:26:53 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=nr7KFMJZSIxhj0aORHNTfYwZDnRTuQaZqp7ucH+2NyU=; b=Y4eIgkj3y19bj1XBFKIFmVFgsZ447yWSavkMkSvpCHRW7hComUMCkrs8dFM9RoSyQtW9 DYnww6dJnLlWa74pFPYG6MMB3ESq3gEI8bVuO1QC1JKfB8cQpVJ5wzJjA3IcLZ5IJxZH ILpewJY3LiBpJAn6cJjlQ8zTkfEaQlFGjXdVMfCxz2m7qW/Pgu58Aiflqi7szi7huQLu EluXXKB3XLkXrY8+VYRUrKTc0iP+5t7itKTnRGUJW0WIfoQkwqBqcpX3g92lVSi2kwAk 4gibgSr1AMhRV7pQgYOZlImzoRCHFJ7hdhpLIpbzwY63xypWsK4oMXzhjmeejnJnbVZX 2Q== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3dpybrtkmb-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Thu, 20 Jan 2022 08:26:53 -0800 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 20 Jan 2022 08:26:51 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 20 Jan 2022 08:26:51 -0800 Received: from localhost.localdomain (unknown [10.28.48.55]) by maili.marvell.com (Postfix) with ESMTP id CD39B3F705A; Thu, 20 Jan 2022 08:26:46 -0800 (PST) From: Akhil Goyal To: CC: , , , , , , , , , , , , "Akhil Goyal" Subject: [PATCH v2 2/4] ethdev: add dev op to set/get IP reassembly configuration Date: Thu, 20 Jan 2022 21:56:25 +0530 Message-ID: <20220120162627.4155695-3-gakhil@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220120162627.4155695-1-gakhil@marvell.com> References: <20220103150813.1694888-1-gakhil@marvell.com> <20220120162627.4155695-1-gakhil@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: gWv0433FgaTtgWkw3MY_TbMcg171v6bz X-Proofpoint-GUID: gWv0433FgaTtgWkw3MY_TbMcg171v6bz X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-01-20_06,2022-01-20_01,2021-12-02_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org A new ethernet device op is added to give application control over the IP reassembly configuration. This operation is an optional call from the application, default values are set by PMD and exposed via rte_eth_dev_info. Application should always first retrieve the capabilities from rte_eth_dev_info and then set the fields accordingly. User can get the currently set values using the get API. Signed-off-by: Akhil Goyal --- lib/ethdev/ethdev_driver.h | 37 +++++++++++++++++ lib/ethdev/rte_ethdev.c | 81 ++++++++++++++++++++++++++++++++++++++ lib/ethdev/rte_ethdev.h | 51 ++++++++++++++++++++++++ lib/ethdev/version.map | 4 ++ 4 files changed, 173 insertions(+) diff --git a/lib/ethdev/ethdev_driver.h b/lib/ethdev/ethdev_driver.h index d95605a355..a310001648 100644 --- a/lib/ethdev/ethdev_driver.h +++ b/lib/ethdev/ethdev_driver.h @@ -990,6 +990,38 @@ typedef int (*eth_representor_info_get_t)(struct rte_eth_dev *dev, typedef int (*eth_rx_metadata_negotiate_t)(struct rte_eth_dev *dev, uint64_t *features); +/** + * @internal + * Get IP reassembly offload configuration parameters set in PMD. + * + * @param dev + * Port (ethdev) handle + * + * @param[out] conf + * Configuration parameters for IP reassembly. + * + * @return + * Negative errno value on error, zero otherwise + */ +typedef int (*eth_ip_reassembly_conf_get_t)(struct rte_eth_dev *dev, + struct rte_eth_ip_reass_params *conf); + +/** + * @internal + * Set configuration parameters for enabling IP reassembly offload in hardware. + * + * @param dev + * Port (ethdev) handle + * + * @param[in] conf + * Configuration parameters for IP reassembly. + * + * @return + * Negative errno value on error, zero otherwise + */ +typedef int (*eth_ip_reassembly_conf_set_t)(struct rte_eth_dev *dev, + struct rte_eth_ip_reass_params *conf); + /** * @internal A structure containing the functions exported by an Ethernet driver. */ @@ -1186,6 +1218,11 @@ struct eth_dev_ops { * kinds of metadata to the PMD */ eth_rx_metadata_negotiate_t rx_metadata_negotiate; + + /** Get IP reassembly configuration */ + eth_ip_reassembly_conf_get_t ip_reassembly_conf_get; + /** Set IP reassembly configuration */ + eth_ip_reassembly_conf_set_t ip_reassembly_conf_set; }; /** diff --git a/lib/ethdev/rte_ethdev.c b/lib/ethdev/rte_ethdev.c index d9a03f12f9..4bd31034a6 100644 --- a/lib/ethdev/rte_ethdev.c +++ b/lib/ethdev/rte_ethdev.c @@ -6473,6 +6473,87 @@ rte_eth_rx_metadata_negotiate(uint16_t port_id, uint64_t *features) (*dev->dev_ops->rx_metadata_negotiate)(dev, features)); } +int +rte_eth_ip_reassembly_conf_set(uint16_t port_id, + struct rte_eth_ip_reass_params *conf) +{ + struct rte_eth_dev *dev; + + RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); + dev = &rte_eth_devices[port_id]; + + if (dev->data->dev_configured == 0) { + RTE_ETHDEV_LOG(ERR, + "Device with port_id=%"PRIu16" is not configured.\n", + port_id); + return -EINVAL; + } + + if (dev->data->dev_started != 0) { + RTE_ETHDEV_LOG(ERR, + "Device with port_id=%"PRIu16" started,\n" + "cannot configure IP reassembly params.\n", + port_id); + return -EINVAL; + } + + if ((dev->data->dev_conf.rxmode.offloads & + RTE_ETH_RX_OFFLOAD_IP_REASSEMBLY) == 0) { + RTE_ETHDEV_LOG(ERR, + "The port (ID=%"PRIu16") is not configured for IP reassembly\n", + port_id); + return -EINVAL; + } + + + if (conf == NULL) { + RTE_ETHDEV_LOG(ERR, + "Invalid IP reassembly configuration (NULL)\n"); + return -EINVAL; + } + + RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->ip_reassembly_conf_set, + -ENOTSUP); + return eth_err(port_id, + (*dev->dev_ops->ip_reassembly_conf_set)(dev, conf)); +} + +int +rte_eth_ip_reassembly_conf_get(uint16_t port_id, + struct rte_eth_ip_reass_params *conf) +{ + struct rte_eth_dev *dev; + + RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); + dev = &rte_eth_devices[port_id]; + + if (conf == NULL) { + RTE_ETHDEV_LOG(ERR, "Cannot get reassembly info to NULL"); + return -EINVAL; + } + + if (dev->data->dev_configured == 0) { + RTE_ETHDEV_LOG(ERR, + "Device with port_id=%"PRIu16" is not configured.\n", + port_id); + return -EINVAL; + } + + if ((dev->data->dev_conf.rxmode.offloads & + RTE_ETH_RX_OFFLOAD_IP_REASSEMBLY) == 0) { + RTE_ETHDEV_LOG(ERR, + "The port (ID=%"PRIu16") is not configured for IP reassembly\n", + port_id); + return -EINVAL; + } + + RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->ip_reassembly_conf_get, + -ENOTSUP); + memset(conf, 0, sizeof(struct rte_eth_ip_reass_params)); + return eth_err(port_id, + (*dev->dev_ops->ip_reassembly_conf_get)(dev, conf)); +} + RTE_LOG_REGISTER_DEFAULT(rte_eth_dev_logtype, INFO); RTE_INIT(ethdev_init_telemetry) diff --git a/lib/ethdev/rte_ethdev.h b/lib/ethdev/rte_ethdev.h index 11427b2e4d..53af158bcb 100644 --- a/lib/ethdev/rte_ethdev.h +++ b/lib/ethdev/rte_ethdev.h @@ -5218,6 +5218,57 @@ int rte_eth_representor_info_get(uint16_t port_id, __rte_experimental int rte_eth_rx_metadata_negotiate(uint16_t port_id, uint64_t *features); +/** + * @warning + * @b EXPERIMENTAL: this API may change without prior notice + * + * Get IP reassembly configuration parameters currently set in PMD, + * if device rx offload flag (RTE_ETH_RX_OFFLOAD_IP_REASSEMBLY) is + * enabled and the PMD supports IP reassembly offload. + * + * @param port_id + * The port identifier of the device. + * @param conf + * A pointer to rte_eth_ip_reass_params structure. + * @return + * - (-ENOTSUP) if offload configuration is not supported by device. + * - (-EINVAL) if offload is not enabled in rte_eth_conf. + * - (-ENODEV) if *port_id* invalid. + * - (-EIO) if device is removed. + * - (0) on success. + */ +__rte_experimental +int rte_eth_ip_reassembly_conf_get(uint16_t port_id, + struct rte_eth_ip_reass_params *conf); + +/** + * @warning + * @b EXPERIMENTAL: this API may change without prior notice + * + * Set IP reassembly configuration parameters if device rx offload + * flag (RTE_ETH_RX_OFFLOAD_IP_REASSEMBLY) is enabled and the PMD + * supports IP reassembly offload. User should first check the + * reass_capa in rte_eth_dev_info before setting the configuration. + * The values of configuration parameters must not exceed the device + * capabilities. The use of this API is optional and if called, it + * should be called before rte_eth_dev_start(). + * + * @param port_id + * The port identifier of the device. + * @param conf + * A pointer to rte_eth_ip_reass_params structure. + * @return + * - (-ENOTSUP) if offload configuration is not supported by device. + * - (-EINVAL) if offload is not enabled in rte_eth_conf. + * - (-ENODEV) if *port_id* invalid. + * - (-EIO) if device is removed. + * - (0) on success. + */ +__rte_experimental +int rte_eth_ip_reassembly_conf_set(uint16_t port_id, + struct rte_eth_ip_reass_params *conf); + + #include /** diff --git a/lib/ethdev/version.map b/lib/ethdev/version.map index c2fb0669a4..ad829dd47e 100644 --- a/lib/ethdev/version.map +++ b/lib/ethdev/version.map @@ -256,6 +256,10 @@ EXPERIMENTAL { rte_flow_flex_item_create; rte_flow_flex_item_release; rte_flow_pick_transfer_proxy; + + #added in 22.03 + rte_eth_ip_reassembly_conf_get; + rte_eth_ip_reassembly_conf_set; }; INTERNAL { From patchwork Thu Jan 20 16:26:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akhil Goyal X-Patchwork-Id: 106136 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id AEE20A034E; Thu, 20 Jan 2022 17:27:04 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 3BF1F42713; Thu, 20 Jan 2022 17:27:02 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id CE16040042 for ; Thu, 20 Jan 2022 17:27:00 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 20KCOamx015679; Thu, 20 Jan 2022 08:26:59 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=qILpwlf/o9gYuIyyQ2n6B+Y6FGc/f2RzMSPG1OKSJ30=; b=McEBJCUSuVJ2DAJsvwYe+Eatca5Lxid3sCsUpuSWyP2fCr6Iz5B/EympDv0sbRQWOSLu L4KU5LhFx53YqewTmEhdcyww1pm06zprHhDdRN2+pfOLMSe0IA9cB5wrcCDg11TjV+au VQfZYnddZYkw0WHh4NNjwro/ILYyxLWXgErpMwWj2/QKbokE4CH51SL67gCesr80cxls dmgKhD94aLk3S5fdehqylkPDxlA1txgJquwI14+Xa+5dGlqSrPlA1bb+pRmlwncYj4W2 7F4JpM9wL8lmuPDVdCD2OydADf8wnrmNDaCChDUqjm76qV+6p0rdI7ZEP3+3mibYhBhi JQ== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3dpybrtkmw-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Thu, 20 Jan 2022 08:26:59 -0800 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 20 Jan 2022 08:26:57 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 20 Jan 2022 08:26:57 -0800 Received: from localhost.localdomain (unknown [10.28.48.55]) by maili.marvell.com (Postfix) with ESMTP id A24D23F705A; Thu, 20 Jan 2022 08:26:52 -0800 (PST) From: Akhil Goyal To: CC: , , , , , , , , , , , , "Akhil Goyal" Subject: [PATCH v2 3/4] ethdev: add mbuf dynfield for incomplete IP reassembly Date: Thu, 20 Jan 2022 21:56:26 +0530 Message-ID: <20220120162627.4155695-4-gakhil@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220120162627.4155695-1-gakhil@marvell.com> References: <20220103150813.1694888-1-gakhil@marvell.com> <20220120162627.4155695-1-gakhil@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: 3O8QAtTD3FCokTxXck5ogHTKBU35sVzH X-Proofpoint-GUID: 3O8QAtTD3FCokTxXck5ogHTKBU35sVzH X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-01-20_06,2022-01-20_01,2021-12-02_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Hardware IP reassembly may be incomplete for multiple reasons like reassembly timeout reached, duplicate fragments, etc. To save application cycles to process these packets again, a new mbuf dynflag is added to show that the mbuf received is not reassembled properly. Now if this dynflag is set, application can retrieve corresponding chain of mbufs using mbuf dynfield set by the PMD. Now, it will be up to application to either drop those fragments or wait for more time. Signed-off-by: Akhil Goyal --- lib/ethdev/ethdev_driver.h | 8 ++++++++ lib/ethdev/rte_ethdev.c | 28 ++++++++++++++++++++++++++++ lib/ethdev/rte_ethdev.h | 21 +++++++++++++++++++++ lib/ethdev/version.map | 1 + 4 files changed, 58 insertions(+) diff --git a/lib/ethdev/ethdev_driver.h b/lib/ethdev/ethdev_driver.h index a310001648..7499a4fbf5 100644 --- a/lib/ethdev/ethdev_driver.h +++ b/lib/ethdev/ethdev_driver.h @@ -1689,6 +1689,14 @@ int rte_eth_hairpin_queue_peer_unbind(uint16_t cur_port, uint16_t cur_queue, uint32_t direction); +/** + * @internal + * Register mbuf dynamic field and flag for IP reassembly incomplete case. + */ +__rte_internal +int +rte_eth_ip_reass_dynfield_register(int *field_offset, int *flag); + /* * Legacy ethdev API used internally by drivers. diff --git a/lib/ethdev/rte_ethdev.c b/lib/ethdev/rte_ethdev.c index 4bd31034a6..f6a155dceb 100644 --- a/lib/ethdev/rte_ethdev.c +++ b/lib/ethdev/rte_ethdev.c @@ -6554,6 +6554,34 @@ rte_eth_ip_reassembly_conf_get(uint16_t port_id, (*dev->dev_ops->ip_reassembly_conf_get)(dev, conf)); } +int +rte_eth_ip_reass_dynfield_register(int *field_offset, int *flag_offset) +{ + static const struct rte_mbuf_dynfield field_desc = { + .name = RTE_ETH_IP_REASS_DYNFIELD_NAME, + .size = sizeof(rte_eth_ip_reass_dynfield_t), + .align = __alignof__(rte_eth_ip_reass_dynfield_t), + }; + static const struct rte_mbuf_dynflag ip_reass_dynflag = { + .name = RTE_ETH_IP_REASS_INCOMPLETE_DYNFLAG_NAME, + }; + int offset; + + offset = rte_mbuf_dynfield_register(&field_desc); + if (offset < 0) + return -1; + if (field_offset != NULL) + *field_offset = offset; + + offset = rte_mbuf_dynflag_register(&ip_reass_dynflag); + if (offset < 0) + return -1; + if (flag_offset != NULL) + *flag_offset = offset; + + return 0; +} + RTE_LOG_REGISTER_DEFAULT(rte_eth_dev_logtype, INFO); RTE_INIT(ethdev_init_telemetry) diff --git a/lib/ethdev/rte_ethdev.h b/lib/ethdev/rte_ethdev.h index 53af158bcb..a6b43bcf2c 100644 --- a/lib/ethdev/rte_ethdev.h +++ b/lib/ethdev/rte_ethdev.h @@ -5268,6 +5268,27 @@ __rte_experimental int rte_eth_ip_reassembly_conf_set(uint16_t port_id, struct rte_eth_ip_reass_params *conf); +#define RTE_ETH_IP_REASS_DYNFIELD_NAME "rte_eth_ip_reass_dynfield" +#define RTE_ETH_IP_REASS_INCOMPLETE_DYNFLAG_NAME "rte_eth_ip_reass_incomplete_dynflag" + +/** + * In case of IP reassembly offload failure, ol_flags in mbuf will be set + * with RTE_MBUF_F_RX_IPREASSEMBLY_INCOMPLETE and packets will be returned + * without alteration. The application can retrieve the attached fragments + * using mbuf dynamic field. + */ +typedef struct { + /** + * Next fragment packet. Application should fetch dynamic field of + * each fragment until a NULL is received and nb_frags is 0. + */ + struct rte_mbuf *next_frag; + /** Time spent(in ms) by HW in waiting for further fragments. */ + uint16_t time_spent; + /** Number of more fragments attached in mbuf dynamic fields. */ + uint16_t nb_frags; +} rte_eth_ip_reass_dynfield_t; + #include diff --git a/lib/ethdev/version.map b/lib/ethdev/version.map index ad829dd47e..8b7578471a 100644 --- a/lib/ethdev/version.map +++ b/lib/ethdev/version.map @@ -283,6 +283,7 @@ INTERNAL { rte_eth_hairpin_queue_peer_bind; rte_eth_hairpin_queue_peer_unbind; rte_eth_hairpin_queue_peer_update; + rte_eth_ip_reass_dynfield_register; rte_eth_representor_id_get; rte_eth_switch_domain_alloc; rte_eth_switch_domain_free; From patchwork Thu Jan 20 16:26:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akhil Goyal X-Patchwork-Id: 106137 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id B0B5BA034E; Thu, 20 Jan 2022 17:27:10 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 2FE914271E; Thu, 20 Jan 2022 17:27:06 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 14E7440042 for ; Thu, 20 Jan 2022 17:27:04 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 20KCXwrD015791; Thu, 20 Jan 2022 08:27:04 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=2y0q3ZnLcB4DkXcyBn60rJ2grNSK42EJ5oyutewJ2fk=; b=ElUwLcGilC6LQor5IkKTjzQ4AyerkaFAZsvgc4dPIYRroO88C8Fayd6b0VtsVWxybtFZ olBcXCZ2LlFtd/lyHbZcGvjDIuFqXfXuE9XsP5fuVb72S/evz5ZSSc19nZqXeYCNG/jQ zlIDri/egGVaqoPFi9X0cjBCqwB7eBV6p2A3U+iNdqCa2dbep6E4xpijNMaalxd4GswE q/2or2JM6wPHbrWmg/Flbq3bSCWXS4YYiMht90ZKO44BYCG/heTP/ndkP8752Crx5HU6 rlM7yAtpwos68nHIfrEHqoH4aTFS6MT3g4TAACvUWydoYGQoj1oTrzVO8bulfE1AMLgv lA== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3dpybrtknb-3 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Thu, 20 Jan 2022 08:27:04 -0800 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Thu, 20 Jan 2022 08:27:02 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Thu, 20 Jan 2022 08:27:02 -0800 Received: from localhost.localdomain (unknown [10.28.48.55]) by maili.marvell.com (Postfix) with ESMTP id 82F523F705A; Thu, 20 Jan 2022 08:26:58 -0800 (PST) From: Akhil Goyal To: CC: , , , , , , , , , , , , "Akhil Goyal" Subject: [PATCH v2 4/4] security: add IPsec option for IP reassembly Date: Thu, 20 Jan 2022 21:56:27 +0530 Message-ID: <20220120162627.4155695-5-gakhil@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220120162627.4155695-1-gakhil@marvell.com> References: <20220103150813.1694888-1-gakhil@marvell.com> <20220120162627.4155695-1-gakhil@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: O57lRQ9A3CjHZNGUer29QKZXvB5iOUNX X-Proofpoint-GUID: O57lRQ9A3CjHZNGUer29QKZXvB5iOUNX X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-01-20_06,2022-01-20_01,2021-12-02_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org A new option is added in IPsec to enable and attempt reassembly of inbound packets. Signed-off-by: Akhil Goyal --- devtools/libabigail.abignore | 14 ++++++++++++++ lib/security/rte_security.h | 12 +++++++++++- 2 files changed, 25 insertions(+), 1 deletion(-) diff --git a/devtools/libabigail.abignore b/devtools/libabigail.abignore index 90f449c43a..c6e304282f 100644 --- a/devtools/libabigail.abignore +++ b/devtools/libabigail.abignore @@ -16,3 +16,17 @@ [suppress_type] name = rte_eth_dev_info has_data_member_inserted_between = {offset_of(reserved_64s), end} + +; Ignore fields inserted in place of reserved_opts of rte_security_ipsec_sa_options +[suppress_type] + name = rte_ipsec_sa_prm + name = rte_security_ipsec_sa_options + has_data_member_inserted_between = {offset_of(reserved_opts), end} + +[suppress_type] + name = rte_security_capability + has_data_member_inserted_between = {offset_of(reserved_opts), (offset_of(reserved_opts) + 18)} + +[suppress_type] + name = rte_security_session_conf + has_data_member_inserted_between = {offset_of(reserved_opts), (offset_of(reserved_opts) + 18)} diff --git a/lib/security/rte_security.h b/lib/security/rte_security.h index 1228b6c8b1..168b837a82 100644 --- a/lib/security/rte_security.h +++ b/lib/security/rte_security.h @@ -264,6 +264,16 @@ struct rte_security_ipsec_sa_options { */ uint32_t l4_csum_enable : 1; + /** Enable reassembly on incoming packets. + * + * * 1: Enable driver to try reassembly of encrypted IP packets for + * this SA, if supported by the driver. This feature will work + * only if rx_offload RTE_ETH_RX_OFFLOAD_IP_REASSEMBLY is set in + * inline Ethernet device. + * * 0: Disable reassembly of packets (default). + */ + uint32_t reass_en : 1; + /** Reserved bit fields for future extension * * User should ensure reserved_opts is cleared as it may change in @@ -271,7 +281,7 @@ struct rte_security_ipsec_sa_options { * * Note: Reduce number of bits in reserved_opts for every new option. */ - uint32_t reserved_opts : 18; + uint32_t reserved_opts : 17; }; /** IPSec security association direction */