From patchwork Fri Apr 8 11:23:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 109520 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 571DBA0501; Fri, 8 Apr 2022 13:20:10 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id E953F4067E; Fri, 8 Apr 2022 13:20:09 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mails.dpdk.org (Postfix) with ESMTP id 006E24003F for ; Fri, 8 Apr 2022 13:20:07 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1649416808; x=1680952808; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=AcmS9JUrYifB/X61Js95hOGBi2CPJ9HUasiYxrosK9Y=; b=R7Oico1ysWn4zp13F2EThtGCFgrIyDlB+p+WFdmQ7lHOUGXmNW5n1sBB di0zhjIjmzlrJrE+N4Zdgcwyo1UMXDJXShAS/TNvRGM7pgadi5lo+m6dE A4K8mp4PlgtkgSZUBe2d6f118qbiaWrMocm+lL22V695sBWkeUdRB5pGD yBv4TH8wuEhj0kkQzwPF+RvEJASZbhYJz31GQHu3WAh7+tallh2iRLX5S ri1jl7NKtw+p1BEc5u5THJakT7bTCIWrcIgcNWEB479tVBg4OsOXOsykP 5gPInYikPQjKtQIhuD7Hbw9tMWxvh9UU3Q6jQ/XcGRDjwf+L7PszcMDYf A==; X-IronPort-AV: E=McAfee;i="6400,9594,10310"; a="249099981" X-IronPort-AV: E=Sophos;i="5.90,244,1643702400"; d="scan'208";a="249099981" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Apr 2022 04:20:07 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,244,1643702400"; d="scan'208";a="525339967" Received: from dpdk51.sh.intel.com ([10.67.111.142]) by orsmga006.jf.intel.com with ESMTP; 08 Apr 2022 04:20:05 -0700 From: Qi Zhang To: qiming.yang@intel.com, wenjun1.wu@intel.com Cc: dev@dpdk.org, Qi Zhang Subject: [PATCH v2] net/ice: optimize max queue number calculation Date: Fri, 8 Apr 2022 19:23:43 +0800 Message-Id: <20220408112343.2632618-1-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.26.2 MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Remove the limitation that max queue pair number must be 2^n. With this patch, even on a 8 ports device, the max queue pair number increased from 128 to 254. Signed-off-by: Qi Zhang Acked-by: Wenjun Wu < wenjun1.wu@intel.com> --- v2: - fix check patch warning drivers/net/ice/ice_ethdev.c | 24 ++++++++++++++++++++---- 1 file changed, 20 insertions(+), 4 deletions(-) diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c index 73e550f5fb..ff2b3e45d9 100644 --- a/drivers/net/ice/ice_ethdev.c +++ b/drivers/net/ice/ice_ethdev.c @@ -819,10 +819,26 @@ ice_vsi_config_tc_queue_mapping(struct ice_vsi *vsi, return -ENOTSUP; } - vsi->nb_qps = RTE_MIN(vsi->nb_qps, ICE_MAX_Q_PER_TC); - fls = (vsi->nb_qps == 0) ? 0 : rte_fls_u32(vsi->nb_qps) - 1; - /* Adjust the queue number to actual queues that can be applied */ - vsi->nb_qps = (vsi->nb_qps == 0) ? 0 : 0x1 << fls; + /* vector 0 is reserved and 1 vector for ctrl vsi */ + if (vsi->adapter->hw.func_caps.common_cap.num_msix_vectors < 2) + vsi->nb_qps = 0; + else + vsi->nb_qps = RTE_MIN + ((uint16_t)vsi->adapter->hw.func_caps.common_cap.num_msix_vectors - 2, + RTE_MIN(vsi->nb_qps, ICE_MAX_Q_PER_TC)); + + /* nb_qps(hex) -> fls */ + /* 0000 -> 0 */ + /* 0001 -> 0 */ + /* 0002 -> 1 */ + /* 0003 ~ 0004 -> 2 */ + /* 0005 ~ 0008 -> 3 */ + /* 0009 ~ 0010 -> 4 */ + /* 0011 ~ 0020 -> 5 */ + /* 0021 ~ 0040 -> 6 */ + /* 0041 ~ 0080 -> 7 */ + /* 0081 ~ 0100 -> 8 */ + fls = (vsi->nb_qps == 0) ? 0 : rte_fls_u32(vsi->nb_qps - 1); qp_idx = 0; /* Set tc and queue mapping with VSI */