From patchwork Thu Jul 7 15:22:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kevin Liu X-Patchwork-Id: 113774 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C5606A0540; Thu, 7 Jul 2022 09:24:10 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B67F240A7B; Thu, 7 Jul 2022 09:24:10 +0200 (CEST) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mails.dpdk.org (Postfix) with ESMTP id 7D069406B4 for ; Thu, 7 Jul 2022 09:24:08 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1657178648; x=1688714648; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=dPMyLBlA9PuNu0jVzhbLtKJzW09FX2K46DGFgoMO+Ns=; b=NzkSBg9j4oCNEhfHup/RiZeehWvFpQodRWSesIawwLRtLzU8x/irZyWH KiH5z55AWR5uxW7ZLtL6eszgx7oRll3czfbK7Fd1sLKbdMihH53tLq/HA IDGRlNWo6u2mHkCIgCEjv9vim3oikg39EXsBbfL3VglluvyXrxVV8KIrH 5bONy8YT00DRUBbTkCY0aP+7nGtC6jzHi55oU1UuoO/4R7Suc0lo3l2J0 UTVNCxgR+oisCiaeG48M35VE8oh88q8OHhOAJcUl6J+k8SRYShs6CzIfs fEZy+o5G+QNi7V61j8Vkv+9eWO+GnxfTVA3RY9n1lq61/xSZ2jWYaUfUO g==; X-IronPort-AV: E=McAfee;i="6400,9594,10400"; a="264370202" X-IronPort-AV: E=Sophos;i="5.92,252,1650956400"; d="scan'208";a="264370202" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jul 2022 00:24:07 -0700 X-IronPort-AV: E=Sophos;i="5.92,252,1650956400"; d="scan'208";a="543718335" Received: from intel-cd-odc-kevin.cd.intel.com ([10.240.178.191]) by orsmga003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jul 2022 00:24:05 -0700 From: Kevin Liu To: dev@dpdk.org Cc: beilei.xing@intel.com, Yuying.Zhang@intel.com, stevex.yang@intel.com, Kevin Liu Subject: [PATCH v2] net/i40e: restore disable double VLAN by default Date: Thu, 7 Jul 2022 15:22:08 +0000 Message-Id: <20220707152208.2065232-1-kevinx.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220707104732.1816933-1-kevinx.liu@intel.com> References: <20220707104732.1816933-1-kevinx.liu@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Previously, QinQ was enabled by default and cannot be disable, But a serious issue was found during the performance test, if QinQ is always enable, the performance will drop seriously. So, restore disable double VLAN by default and eliminate the impact of QinQ on Performance. doc: update known issue. Fixes: ae97b8b89826 ("net/i40e: fix error disable double VLAN") Signed-off-by: Kevin Liu --- v2: update doc and refine commit log --- doc/guides/nics/i40e.rst | 11 +++++++---- drivers/net/i40e/i40e_ethdev.c | 12 ------------ 2 files changed, 7 insertions(+), 16 deletions(-) diff --git a/doc/guides/nics/i40e.rst b/doc/guides/nics/i40e.rst index 85fdc4944d..75ff40aa59 100644 --- a/doc/guides/nics/i40e.rst +++ b/doc/guides/nics/i40e.rst @@ -969,11 +969,14 @@ it will fail and return the info "Conflict with the first rule's input set", which means the current rule's input set conflicts with the first rule's. Remove the first rule if want to change the input set of the PCTYPE. -Disable QinQ is not supported when FW >= 8.4 -~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - -If upgrade FW to version 8.4 and higher, enable QinQ by default and disable QinQ is not supported. +Vlan related feature miss when FW >= 8.4 +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +If upgrade FW to version 8.4 and higher, some vlan related issue exist: +1. vlan tci input set not work +2. tpid set fail +3. need enable qinq before use vlan filter +4. outer vlan strip fail Example of getting best performance with l3fwd example ------------------------------------------------------ diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index 684e095026..117dd85c11 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -4027,12 +4027,6 @@ i40e_vlan_offload_set(struct rte_eth_dev *dev, int mask) } if (mask & RTE_ETH_VLAN_EXTEND_MASK) { - /* Double VLAN not allowed to be disabled.*/ - if (pf->fw8_3gt && !(rxmode->offloads & RTE_ETH_RX_OFFLOAD_VLAN_EXTEND)) { - PMD_DRV_LOG(WARNING, - "Disable double VLAN is not allowed after firmwarev8.3!"); - return 0; - } i = 0; num = vsi->mac_num; mac_filter = rte_zmalloc("mac_filter_info_data", @@ -6296,7 +6290,6 @@ int i40e_vsi_cfg_inner_vlan_stripping(struct i40e_vsi *vsi, bool on) static int i40e_dev_init_vlan(struct rte_eth_dev *dev) { - struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private); struct rte_eth_dev_data *data = dev->data; int ret; int mask = 0; @@ -6307,11 +6300,6 @@ i40e_dev_init_vlan(struct rte_eth_dev *dev) RTE_ETH_VLAN_FILTER_MASK | RTE_ETH_VLAN_EXTEND_MASK; - /* Double VLAN be enabled by default.*/ - if (pf->fw8_3gt) { - struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode; - rxmode->offloads |= RTE_ETH_RX_OFFLOAD_VLAN_EXTEND; - } ret = i40e_vlan_offload_set(dev, mask); if (ret) { PMD_DRV_LOG(INFO, "Failed to update vlan offload");