From patchwork Mon Jan 16 09:39:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nithin Dabilpuram X-Patchwork-Id: 122084 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 071A1423EE; Mon, 16 Jan 2023 10:40:53 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 914CA40A7D; Mon, 16 Jan 2023 10:40:53 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id F1E0840042 for ; Mon, 16 Jan 2023 10:40:51 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 30G8fPCI010507 for ; Mon, 16 Jan 2023 01:40:51 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=CsJx6lJ8RWNuto07m4I7uoRPzT1IoZl/zEPpSbBWJ+4=; b=H+MC8sCrXjflHQ/EfmbxFlGMSYplz0mAm6m59OdnTgKrAWc5RHSeI9qMLgCjuFIah7wP I91/g0gpOJxSzdxV7IrF+3Rl/O5xROl7LGaMoGL9elu9NXaFLkBbl0hZlnVTxSi0sF0g dWz2+b/0o5oCEuzSXxL8oyblMiOiPUpxfIPz3biQ8+jQXLjEqZKy61AxzPHxWTh2s0V4 zXqWEDG38/0lz3Ufpv2jPFz3rZ/a6lZ73HQsUF+wsGheqZ1O+qL5//xqGzVNyAYVXbUa vdJzQrE7eT7M2hnN/TmVJfWx8mzFVhTcS4agxvjJWdBT6BuqaaVArV6BJjgN8trSjM+j 5Q== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3n3vst5qug-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Mon, 16 Jan 2023 01:40:50 -0800 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Mon, 16 Jan 2023 01:40:48 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.42 via Frontend Transport; Mon, 16 Jan 2023 01:40:48 -0800 Received: from hyd1588t430.caveonetworks.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 8ECA43F7052; Mon, 16 Jan 2023 01:40:46 -0800 (PST) From: Nithin Dabilpuram To: , Nithin Dabilpuram , "Kiran Kumar K" , Sunil Kumar Kori , Satha Rao CC: , Subject: [PATCH 1/9] common/cnxk: get mbox lock before NDC sync Date: Mon, 16 Jan 2023 15:09:46 +0530 Message-ID: <20230116093954.172938-1-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: 2OPSd4e9Qb-b1-JDxnK4yD62DFPz8Nvq X-Proofpoint-GUID: 2OPSd4e9Qb-b1-JDxnK4yD62DFPz8Nvq X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.923,Hydra:6.0.562,FMLib:17.11.122.1 definitions=2023-01-16_08,2023-01-13_02,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Take mbox lock before NDC sync to be thread safe. Also release the lock only after access to response is complete. Fixes: 7a978bc4be6b ("common/cnxk: support mailbox locking") Cc: rkudurumalla@marvell.com Signed-off-by: Nithin Dabilpuram --- drivers/common/cnxk/roc_nix_tm.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/common/cnxk/roc_nix_tm.c b/drivers/common/cnxk/roc_nix_tm.c index 4e5f320712..4ced7a052f 100644 --- a/drivers/common/cnxk/roc_nix_tm.c +++ b/drivers/common/cnxk/roc_nix_tm.c @@ -690,13 +690,16 @@ roc_nix_tm_sq_free_pending_sqe(struct nix *nix, int q) mbox = dev->mbox; /* Sync NDC-NIX-TX for LF */ - ndc_req = mbox_alloc_msg_ndc_sync_op(mbox); - if (ndc_req == NULL) + ndc_req = mbox_alloc_msg_ndc_sync_op(mbox_get(mbox)); + if (ndc_req == NULL) { + mbox_put(mbox); return -EFAULT; + } ndc_req->nix_lf_tx_sync = 1; if (mbox_process(mbox)) rc |= NIX_ERR_NDC_SYNC; + mbox_put(mbox); if (rc) plt_err("NDC_SYNC failed rc %d", rc); @@ -1480,8 +1483,9 @@ nix_tm_alloc_txschq(struct nix *nix, enum roc_nix_tm_tree tree) mbox_put(mbox); goto alloc_err; } - mbox_put(mbox); + nix_tm_copy_rsp_to_nix(nix, rsp); + mbox_put(mbox); } while (pend); nix->tm_link_cfg_lvl = rsp->link_cfg_lvl; From patchwork Mon Jan 16 09:39:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nithin Dabilpuram X-Patchwork-Id: 122085 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D4E5A423EE; Mon, 16 Jan 2023 10:40:58 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 700EA42BB1; Mon, 16 Jan 2023 10:40:56 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id B1A6342BB1 for ; Mon, 16 Jan 2023 10:40:54 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 30G63aaV000602 for ; Mon, 16 Jan 2023 01:40:53 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=KM9OzX+tQ8cVcqJJ/boowUfohCNZ7kwClRfPu695QI0=; b=KY81d5q4TMNrAt4rBi5IdTqvkxdF9ZIa1ecuzvpbyzk+qpPUDwXYdT5kK9KkFRVaVX32 ORR/FmmsjPaVbeoZuAr3NRC/H+qK818ojRZjUO9ju4+o0mnY1SyOLWxPf+FjtvRpqiXt ZVW/+gi4Clb2psX0//+Q/l/VGU9tEJmRn6TrSmeCvd1WtlN7MUqzFLylFRNiyXcGsoHY T61jiI8y8NvHvI5PWgwQRRO5U1I9OyT6HD7e/lphBLghaABGWIX48+KVlUdz8bGR0yp6 vKRc/61S83ITmat/krItlp3Uf81WnfuTofNsNv2hsz2UEnez5mqJL9T9Na/X03jli04M BA== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3n3tmvkuj6-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Mon, 16 Jan 2023 01:40:53 -0800 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Mon, 16 Jan 2023 01:40:51 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.42 via Frontend Transport; Mon, 16 Jan 2023 01:40:51 -0800 Received: from hyd1588t430.caveonetworks.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 86B8C3F7058; Mon, 16 Jan 2023 01:40:49 -0800 (PST) From: Nithin Dabilpuram To: , Nithin Dabilpuram , "Kiran Kumar K" , Sunil Kumar Kori , Satha Rao CC: Subject: [PATCH 2/9] common/cnxk: enable CQ late BP with valid CPT BPID Date: Mon, 16 Jan 2023 15:09:47 +0530 Message-ID: <20230116093954.172938-2-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230116093954.172938-1-ndabilpuram@marvell.com> References: <20230116093954.172938-1-ndabilpuram@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: jSMGwl_gcaO8zCAbwKeyIIDJ8hO36bdm X-Proofpoint-GUID: jSMGwl_gcaO8zCAbwKeyIIDJ8hO36bdm X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.923,Hydra:6.0.562,FMLib:17.11.122.1 definitions=2023-01-16_08,2023-01-13_02,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Satha Rao When FC enable requested for CPT, mbox returns allocated BPID. While configuring CQ consider this value to enable late back pressure. Signed-off-by: Satha Rao --- drivers/common/cnxk/roc_nix_fc.c | 2 ++ drivers/common/cnxk/roc_nix_priv.h | 1 + drivers/common/cnxk/roc_nix_queue.c | 19 +++++++++++++------ 3 files changed, 16 insertions(+), 6 deletions(-) diff --git a/drivers/common/cnxk/roc_nix_fc.c b/drivers/common/cnxk/roc_nix_fc.c index 569fe8dc48..784e6e5416 100644 --- a/drivers/common/cnxk/roc_nix_fc.c +++ b/drivers/common/cnxk/roc_nix_fc.c @@ -83,6 +83,7 @@ nix_fc_rxchan_bpid_set(struct roc_nix *roc_nix, bool enable) rc = mbox_process_msg(mbox, (void *)&rsp); if (rc) goto exit; + nix->cpt_lbpid = rsp->chan_bpid[0] & 0x1FF; } else { req = mbox_alloc_msg_nix_cpt_bp_disable(mbox); if (req == NULL) @@ -94,6 +95,7 @@ nix_fc_rxchan_bpid_set(struct roc_nix *roc_nix, bool enable) rc = mbox_process_msg(mbox, (void *)&rsp); if (rc) goto exit; + nix->cpt_lbpid = 0; } exit: diff --git a/drivers/common/cnxk/roc_nix_priv.h b/drivers/common/cnxk/roc_nix_priv.h index 0a9461c856..7d2e3626a3 100644 --- a/drivers/common/cnxk/roc_nix_priv.h +++ b/drivers/common/cnxk/roc_nix_priv.h @@ -205,6 +205,7 @@ struct nix { uint16_t nb_cpt_lf; uint16_t outb_se_ring_cnt; uint16_t outb_se_ring_base; + uint16_t cpt_lbpid; bool need_meta_aura; /* Mode provided by driver */ bool inb_inl_dev; diff --git a/drivers/common/cnxk/roc_nix_queue.c b/drivers/common/cnxk/roc_nix_queue.c index 20a1e7d4d8..385f1ba04e 100644 --- a/drivers/common/cnxk/roc_nix_queue.c +++ b/drivers/common/cnxk/roc_nix_queue.c @@ -798,7 +798,7 @@ roc_nix_cq_init(struct roc_nix *roc_nix, struct roc_nix_cq *cq) struct mbox *mbox = (&nix->dev)->mbox; volatile struct nix_cq_ctx_s *cq_ctx; uint16_t drop_thresh = NIX_CQ_THRESH_LEVEL; - uint16_t cpt_lbpid = nix->bpid[0]; + uint16_t cpt_lbpid = nix->cpt_lbpid; enum nix_q_size qsize; size_t desc_sz; int rc; @@ -860,11 +860,14 @@ roc_nix_cq_init(struct roc_nix *roc_nix, struct roc_nix_cq *cq) if (roc_model_is_cn10kb() && roc_nix_inl_inb_is_enabled(roc_nix)) { cq_ctx->cq_err_int_ena |= BIT(NIX_CQERRINT_CPT_DROP); cq_ctx->cpt_drop_err_en = 1; - cq_ctx->lbp_ena = 1; - cq_ctx->lbpid_low = cpt_lbpid & 0x7; - cq_ctx->lbpid_med = (cpt_lbpid >> 3) & 0x7; - cq_ctx->lbpid_high = (cpt_lbpid >> 6) & 0x7; - cq_ctx->lbp_frac = NIX_CQ_LPB_THRESH_FRAC; + /* Enable Late BP only when non zero CPT BPID */ + if (cpt_lbpid) { + cq_ctx->lbp_ena = 1; + cq_ctx->lbpid_low = cpt_lbpid & 0x7; + cq_ctx->lbpid_med = (cpt_lbpid >> 3) & 0x7; + cq_ctx->lbpid_high = (cpt_lbpid >> 6) & 0x7; + cq_ctx->lbp_frac = NIX_CQ_LPB_THRESH_FRAC; + } drop_thresh = NIX_CQ_SEC_THRESH_LEVEL; } @@ -959,6 +962,10 @@ roc_nix_cq_fini(struct roc_nix_cq *cq) aq->cq.bp_ena = 0; aq->cq_mask.ena = ~aq->cq_mask.ena; aq->cq_mask.bp_ena = ~aq->cq_mask.bp_ena; + if (roc_model_is_cn10kb() && roc_nix_inl_inb_is_enabled(cq->roc_nix)) { + aq->cq.lbp_ena = 0; + aq->cq_mask.lbp_ena = ~aq->cq_mask.lbp_ena; + } } rc = mbox_process(mbox); From patchwork Mon Jan 16 09:39:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nithin Dabilpuram X-Patchwork-Id: 122086 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5976A423EE; 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Mon, 16 Jan 2023 01:40:56 -0800 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Mon, 16 Jan 2023 01:40:54 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.42 via Frontend Transport; Mon, 16 Jan 2023 01:40:54 -0800 Received: from hyd1588t430.caveonetworks.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 2C7903F7041; Mon, 16 Jan 2023 01:40:51 -0800 (PST) From: Nithin Dabilpuram To: , Nithin Dabilpuram , "Kiran Kumar K" , Sunil Kumar Kori , Satha Rao CC: Subject: [PATCH 3/9] common/cnxk: configure fc hist bits Date: Mon, 16 Jan 2023 15:09:48 +0530 Message-ID: <20230116093954.172938-3-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230116093954.172938-1-ndabilpuram@marvell.com> References: <20230116093954.172938-1-ndabilpuram@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: yNLfE-nevYcSubRnS9GuxL6bQ8aBfUAQ X-Proofpoint-GUID: yNLfE-nevYcSubRnS9GuxL6bQ8aBfUAQ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.923,Hydra:6.0.562,FMLib:17.11.122.1 definitions=2023-01-16_08,2023-01-13_02,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Satha Rao New parameter added inside SQ structure to control the fc_hyst_bits. Instead of count on all updates each SQ can tune his own hysteresis level. Signed-off-by: Satha Rao --- drivers/common/cnxk/roc_nix.h | 1 + drivers/common/cnxk/roc_nix_queue.c | 5 ++--- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h index 47ee078c2e..96756b1a2b 100644 --- a/drivers/common/cnxk/roc_nix.h +++ b/drivers/common/cnxk/roc_nix.h @@ -354,6 +354,7 @@ struct roc_nix_sq { uint16_t cq_drop_thresh; bool sso_ena; bool cq_ena; + uint8_t fc_hyst_bits; /* End of Input parameters */ uint16_t sqes_per_sqb_log2; struct roc_nix *roc_nix; diff --git a/drivers/common/cnxk/roc_nix_queue.c b/drivers/common/cnxk/roc_nix_queue.c index 385f1ba04e..287a489e7f 100644 --- a/drivers/common/cnxk/roc_nix_queue.c +++ b/drivers/common/cnxk/roc_nix_queue.c @@ -1025,9 +1025,8 @@ sqb_pool_populate(struct roc_nix *roc_nix, struct roc_nix_sq *sq) else aura.fc_stype = 0x3; /* STSTP */ aura.fc_addr = (uint64_t)sq->fc; - aura.fc_hyst_bits = 1; /* Store count on all updates */ - rc = roc_npa_pool_create(&sq->aura_handle, blk_sz, nb_sqb_bufs, &aura, - &pool, 0); + aura.fc_hyst_bits = sq->fc_hyst_bits & 0xF; + rc = roc_npa_pool_create(&sq->aura_handle, blk_sz, nb_sqb_bufs, &aura, &pool, 0); if (rc) goto fail; From patchwork Mon Jan 16 09:39:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nithin Dabilpuram X-Patchwork-Id: 122087 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 00BF9423EE; Mon, 16 Jan 2023 10:41:11 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4ECA642D18; Mon, 16 Jan 2023 10:41:00 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 7E0D442D18 for ; Mon, 16 Jan 2023 10:40:59 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 30G63V30032538 for ; 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Mon, 16 Jan 2023 01:40:57 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.42 via Frontend Transport; Mon, 16 Jan 2023 01:40:57 -0800 Received: from hyd1588t430.caveonetworks.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id CCAA13F7054; Mon, 16 Jan 2023 01:40:54 -0800 (PST) From: Nithin Dabilpuram To: , Nithin Dabilpuram , "Kiran Kumar K" , Sunil Kumar Kori , Satha Rao CC: , Rakesh Kudurumalla Subject: [PATCH 4/9] net/cnxk: reset pfc mode and flow control Date: Mon, 16 Jan 2023 15:09:49 +0530 Message-ID: <20230116093954.172938-4-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230116093954.172938-1-ndabilpuram@marvell.com> References: <20230116093954.172938-1-ndabilpuram@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: pHsf5tYJL7mU_-tedXgADIcP5Z-2twzG X-Proofpoint-GUID: pHsf5tYJL7mU_-tedXgADIcP5Z-2twzG X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.923,Hydra:6.0.562,FMLib:17.11.122.1 definitions=2023-01-16_08,2023-01-13_02,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Rakesh Kudurumalla reset pfc and flow control if pfc mode and flow control are set respectively during unintilization of pf or vf Signed-off-by: Rakesh Kudurumalla --- drivers/net/cnxk/cnxk_ethdev.c | 38 ++++++++++++++++++++-------------- 1 file changed, 23 insertions(+), 15 deletions(-) diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c index d711eb6b27..22072d29b0 100644 --- a/drivers/net/cnxk/cnxk_ethdev.c +++ b/drivers/net/cnxk/cnxk_ethdev.c @@ -1934,6 +1934,8 @@ cnxk_eth_dev_uninit(struct rte_eth_dev *eth_dev, bool reset) { struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev); const struct eth_dev_ops *dev_ops = eth_dev->dev_ops; + struct cnxk_pfc_cfg *pfc_cfg = &dev->pfc_cfg; + struct cnxk_fc_cfg *fc_cfg = &dev->fc_cfg; struct rte_eth_pfc_queue_conf pfc_conf; struct roc_nix *nix = &dev->nix; struct rte_eth_fc_conf fc_conf; @@ -1957,21 +1959,27 @@ cnxk_eth_dev_uninit(struct rte_eth_dev *eth_dev, bool reset) /* Restore 802.3 Flow control configuration */ memset(&pfc_conf, 0, sizeof(struct rte_eth_pfc_queue_conf)); memset(&fc_conf, 0, sizeof(struct rte_eth_fc_conf)); - fc_conf.mode = RTE_ETH_FC_NONE; - rc = cnxk_nix_flow_ctrl_set(eth_dev, &fc_conf); - - pfc_conf.mode = RTE_ETH_FC_NONE; - for (i = 0; i < RTE_MAX(eth_dev->data->nb_rx_queues, - eth_dev->data->nb_tx_queues); - i++) { - pfc_conf.rx_pause.tc = ROC_NIX_PFC_CLASS_INVALID; - pfc_conf.rx_pause.tx_qid = i; - pfc_conf.tx_pause.tc = ROC_NIX_PFC_CLASS_INVALID; - pfc_conf.tx_pause.rx_qid = i; - rc = cnxk_nix_priority_flow_ctrl_queue_config(eth_dev, - &pfc_conf); - if (rc && rc != -ENOTSUP) - plt_err("Failed to reset PFC. error code(%d)", rc); + if (fc_cfg->rx_pause || fc_cfg->tx_pause) { + fc_conf.mode = RTE_ETH_FC_NONE; + rc = cnxk_nix_flow_ctrl_set(eth_dev, &fc_conf); + if (rc < 0) + plt_err("Failed to reset control flow. error code(%d)", + rc); + } + if (pfc_cfg->rx_pause_en || pfc_cfg->tx_pause_en) { + for (i = 0; i < RTE_MAX(eth_dev->data->nb_rx_queues, + eth_dev->data->nb_tx_queues); + i++) { + pfc_conf.mode = RTE_ETH_FC_NONE; + pfc_conf.rx_pause.tc = ROC_NIX_PFC_CLASS_INVALID; + pfc_conf.rx_pause.tx_qid = i; + pfc_conf.tx_pause.tc = ROC_NIX_PFC_CLASS_INVALID; + pfc_conf.tx_pause.rx_qid = i; + rc = cnxk_nix_priority_flow_ctrl_queue_config(eth_dev, + &pfc_conf); + if (rc && rc != -ENOTSUP) + plt_err("Failed to reset PFC. error code(%d)", rc); + } } /* Disable and free rte_meter entries */ From patchwork Mon Jan 16 09:39:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nithin Dabilpuram X-Patchwork-Id: 122088 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 05BEE423EE; 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Mon, 16 Jan 2023 01:41:01 -0800 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Mon, 16 Jan 2023 01:40:59 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.42 via Frontend Transport; Mon, 16 Jan 2023 01:40:59 -0800 Received: from hyd1588t430.caveonetworks.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id B0EC83F7041; Mon, 16 Jan 2023 01:40:57 -0800 (PST) From: Nithin Dabilpuram To: , Nithin Dabilpuram , "Kiran Kumar K" , Sunil Kumar Kori , Satha Rao CC: Subject: [PATCH 5/9] common/cnxk: dump inline device RQ context Date: Mon, 16 Jan 2023 15:09:50 +0530 Message-ID: <20230116093954.172938-5-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230116093954.172938-1-ndabilpuram@marvell.com> References: <20230116093954.172938-1-ndabilpuram@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: WIruLtPyH9K4XxHkv-nUskwY7Iy94rno X-Proofpoint-GUID: WIruLtPyH9K4XxHkv-nUskwY7Iy94rno X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.923,Hydra:6.0.562,FMLib:17.11.122.1 definitions=2023-01-16_08,2023-01-13_02,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Dump inline device RQ context along with ethdev's RQ context. Signed-off-by: Nithin Dabilpuram --- drivers/common/cnxk/roc_nix_debug.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/common/cnxk/roc_nix_debug.c b/drivers/common/cnxk/roc_nix_debug.c index 775325115b..2f8c595bd9 100644 --- a/drivers/common/cnxk/roc_nix_debug.c +++ b/drivers/common/cnxk/roc_nix_debug.c @@ -693,6 +693,7 @@ roc_nix_queues_ctx_dump(struct roc_nix *roc_nix, FILE *file) struct npa_aq_enq_req *npa_aq; struct dev *dev = &nix->dev; int sq = nix->nb_tx_queues; + struct roc_nix_rq *inl_rq; struct npa_lf *npa_lf; volatile void *ctx; uint32_t sqb_aura; @@ -726,6 +727,25 @@ roc_nix_queues_ctx_dump(struct roc_nix *roc_nix, FILE *file) nix_lf_rq_dump(ctx, file); } + /* Dump inline dev RQ for this port */ + inl_rq = roc_nix_inl_dev_rq(roc_nix); + if (inl_rq) { + struct idev_cfg *idev = idev_get_cfg(); + struct nix_inl_dev *inl_dev = idev->nix_inl_dev; + + rc = nix_q_ctx_get(&inl_dev->dev, NIX_AQ_CTYPE_RQ, inl_rq->qid, &ctx); + if (rc) { + plt_err("Failed to get rq context"); + goto fail; + } + nix_dump(file, "============== port=%d inl_rq=%d ===============", roc_nix->port_id, + inl_rq->qid); + if (roc_model_is_cn9k()) + nix_cn9k_lf_rq_dump(ctx, file); + else + nix_lf_rq_dump(ctx, file); + } + for (q = 0; q < sq; q++) { rc = nix_q_ctx_get(dev, NIX_AQ_CTYPE_SQ, q, &ctx); if (rc) { From patchwork Mon Jan 16 09:39:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nithin Dabilpuram X-Patchwork-Id: 122089 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D8D33423EE; Mon, 16 Jan 2023 10:41:27 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4A7F942D23; Mon, 16 Jan 2023 10:41:06 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id CD98542D2B for ; Mon, 16 Jan 2023 10:41:04 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 30G63aaZ000602 for ; Mon, 16 Jan 2023 01:41:04 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=yZMv/zkyQ8JgD3iVGGrJIUbUYwHOBTxsb5+B53tnF78=; b=U4EqXnXWte+cyEm2G6mWw54yIj6gC469OzSJP2VVsmIsFKwzojqNgA6cmO9Qlfu8hjBX QXME5fdYuGK3q1YGBoj8A0VPLf2OMeLCpwI63YXchAWMtE2OVG5S1egLUwhNeCa9IdBe UKIKccGF6VHyzvPILnaaPiG9hQw6i4yZlcl83tdct+8WmDPp2LoJHYnhc7jT6BguUA1b GFu5s7VksoJ4W1blyZAuldFGjPeKNCoGaaZ+aO9RSCkLDka2GLP2uExYqznmCQ0EHzTR ANanyra+t95gF7joFEU35/a0trWTwz8NngjyF8O4BDrxXerIgabOHB4wuKLFxt1bYhYW Sw== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3n3tmvkujx-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Mon, 16 Jan 2023 01:41:03 -0800 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Mon, 16 Jan 2023 01:41:02 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.42 via Frontend Transport; Mon, 16 Jan 2023 01:41:02 -0800 Received: from hyd1588t430.caveonetworks.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 5F80B3F7052; Mon, 16 Jan 2023 01:41:00 -0800 (PST) From: Nithin Dabilpuram To: , Nithin Dabilpuram , "Kiran Kumar K" , Sunil Kumar Kori , Satha Rao CC: Subject: [PATCH 6/9] common/cnxk: free tm resources in order from leaf to root Date: Mon, 16 Jan 2023 15:09:51 +0530 Message-ID: <20230116093954.172938-6-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230116093954.172938-1-ndabilpuram@marvell.com> References: <20230116093954.172938-1-ndabilpuram@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: CWX2BUyQFyhgo2bOib3ne3HRW09mHqoA X-Proofpoint-GUID: CWX2BUyQFyhgo2bOib3ne3HRW09mHqoA X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.923,Hydra:6.0.562,FMLib:17.11.122.1 definitions=2023-01-16_08,2023-01-13_02,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Now that kernel is clearing parent info that is needed for flush, free the resources in order from leaf to root so that when SMQ flush is called there is always hierarchy present from SMQ till TL1. Signed-off-by: Nithin Dabilpuram --- drivers/common/cnxk/roc_nix_tm.c | 32 +++++++++++++++++++------------- 1 file changed, 19 insertions(+), 13 deletions(-) diff --git a/drivers/common/cnxk/roc_nix_tm.c b/drivers/common/cnxk/roc_nix_tm.c index 4ced7a052f..6d470f424d 100644 --- a/drivers/common/cnxk/roc_nix_tm.c +++ b/drivers/common/cnxk/roc_nix_tm.c @@ -1817,6 +1817,7 @@ nix_tm_free_resources(struct roc_nix *roc_nix, uint32_t tree_mask, bool hw_only) enum roc_nix_tm_tree tree; uint32_t profile_id; int rc = 0; + int hw_lvl; for (tree = 0; tree < ROC_NIX_TM_TREE_MAX; tree++) { if (!(tree_mask & BIT(tree))) @@ -1825,20 +1826,25 @@ nix_tm_free_resources(struct roc_nix *roc_nix, uint32_t tree_mask, bool hw_only) plt_tm_dbg("Freeing resources of tree %u", tree); list = nix_tm_node_list(nix, tree); - next_node = TAILQ_FIRST(list); - while (next_node) { - node = next_node; - next_node = TAILQ_NEXT(node, node); + /* Flush and free resources from leaf */ + for (hw_lvl = NIX_TXSCH_LVL_SMQ; hw_lvl < NIX_TXSCH_LVL_CNT; hw_lvl++) { + next_node = TAILQ_FIRST(list); + while (next_node) { + node = next_node; + next_node = TAILQ_NEXT(node, node); + if (node->hw_lvl != hw_lvl) + continue; - if (!nix_tm_is_leaf(nix, node->lvl) && - node->flags & NIX_TM_NODE_HWRES) { - /* Clear xoff in path for flush to succeed */ - rc = nix_tm_clear_path_xoff(nix, node); - if (rc) - return rc; - rc = nix_tm_free_node_resource(nix, node); - if (rc) - return rc; + if (!nix_tm_is_leaf(nix, node->lvl) && + node->flags & NIX_TM_NODE_HWRES) { + /* Clear xoff in path for flush to succeed */ + rc = nix_tm_clear_path_xoff(nix, node); + if (rc) + return rc; + rc = nix_tm_free_node_resource(nix, node); + if (rc) + return rc; + } } } From patchwork Mon Jan 16 09:39:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nithin Dabilpuram X-Patchwork-Id: 122090 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2F19C423EE; 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Mon, 16 Jan 2023 01:41:06 -0800 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Mon, 16 Jan 2023 01:41:05 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.42 via Frontend Transport; Mon, 16 Jan 2023 01:41:05 -0800 Received: from hyd1588t430.caveonetworks.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 1630E3F7059; Mon, 16 Jan 2023 01:41:02 -0800 (PST) From: Nithin Dabilpuram To: , Nithin Dabilpuram , "Kiran Kumar K" , Sunil Kumar Kori , Satha Rao CC: , Srujana Challa Subject: [PATCH 7/9] common/cnxk: update CPT inbound inline IPsec mailbox Date: Mon, 16 Jan 2023 15:09:52 +0530 Message-ID: <20230116093954.172938-7-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230116093954.172938-1-ndabilpuram@marvell.com> References: <20230116093954.172938-1-ndabilpuram@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: B9PoeAKHFguafZXYyLNAKlfxIS4NHt5z X-Proofpoint-GUID: B9PoeAKHFguafZXYyLNAKlfxIS4NHt5z X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.923,Hydra:6.0.562,FMLib:17.11.122.1 definitions=2023-01-16_08,2023-01-13_02,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Srujana Challa Updates CPT inbound inline configuration mailbox message format to set CPT credit threshold and bpid, which are introduced for CN10KB. This patch also fixes inline inbound config read API. Fixes: 37da58509579 ("common/cnxk: update inbound inline IPsec config mailbox") Cc: schalla@marvell.com Signed-off-by: Srujana Challa --- drivers/common/cnxk/roc_cpt.c | 14 +++++++++++++- drivers/common/cnxk/roc_cpt.h | 14 ++++++++++++-- drivers/common/cnxk/roc_mbox.h | 6 +++++- 3 files changed, 30 insertions(+), 4 deletions(-) diff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c index 48430096dc..6d3052c9be 100644 --- a/drivers/common/cnxk/roc_cpt.c +++ b/drivers/common/cnxk/roc_cpt.c @@ -268,9 +268,10 @@ roc_cpt_inline_ipsec_cfg(struct dev *cpt_dev, uint8_t lf_id, int roc_cpt_inline_ipsec_inb_cfg_read(struct roc_cpt *roc_cpt, - struct nix_inline_ipsec_cfg *inb_cfg) + struct roc_cpt_inline_ipsec_inb_cfg *cfg) { struct cpt *cpt = roc_cpt_to_cpt_priv(roc_cpt); + struct nix_inline_ipsec_cfg *inb_cfg; struct dev *dev = &cpt->dev; struct mbox *mbox = mbox_get(dev->mbox); struct msg_req *req; @@ -283,6 +284,17 @@ roc_cpt_inline_ipsec_inb_cfg_read(struct roc_cpt *roc_cpt, } rc = mbox_process_msg(mbox, (void *)&inb_cfg); + if (rc) { + rc = -EIO; + goto exit; + } + cfg->cpt_credit = inb_cfg->cpt_credit; + cfg->egrp = inb_cfg->gen_cfg.egrp; + cfg->opcode = inb_cfg->gen_cfg.opcode; + cfg->param1 = inb_cfg->gen_cfg.param1; + cfg->param2 = inb_cfg->gen_cfg.param2; + cfg->bpid = inb_cfg->bpid; + cfg->credit_th = inb_cfg->credit_th; exit: mbox_put(mbox); return rc; diff --git a/drivers/common/cnxk/roc_cpt.h b/drivers/common/cnxk/roc_cpt.h index bc9cc19edd..96d066dee3 100644 --- a/drivers/common/cnxk/roc_cpt.h +++ b/drivers/common/cnxk/roc_cpt.h @@ -144,6 +144,16 @@ struct roc_cpt_rxc_time_cfg { uint16_t zombie_thres; }; +struct roc_cpt_inline_ipsec_inb_cfg { + uint32_t cpt_credit; + uint16_t opcode; + uint16_t param1; + uint16_t param2; + uint16_t bpid; + uint32_t credit_th; + uint8_t egrp; +}; + int __roc_api roc_cpt_rxc_time_cfg(struct roc_cpt *roc_cpt, struct roc_cpt_rxc_time_cfg *cfg); int __roc_api roc_cpt_dev_init(struct roc_cpt *roc_cpt); @@ -159,8 +169,8 @@ int __roc_api roc_cpt_lf_ctx_flush(struct roc_cpt_lf *lf, void *cptr, int __roc_api roc_cpt_lf_ctx_reload(struct roc_cpt_lf *lf, void *cptr); int __roc_api roc_cpt_inline_ipsec_cfg(struct dev *dev, uint8_t slot, struct roc_nix *nix); -int __roc_api roc_cpt_inline_ipsec_inb_cfg_read( - struct roc_cpt *roc_cpt, struct nix_inline_ipsec_cfg *inb_cfg); +int __roc_api roc_cpt_inline_ipsec_inb_cfg_read(struct roc_cpt *roc_cpt, + struct roc_cpt_inline_ipsec_inb_cfg *cfg); int __roc_api roc_cpt_inline_ipsec_inb_cfg(struct roc_cpt *roc_cpt, uint16_t param1, uint16_t param2, uint16_t opcode); diff --git a/drivers/common/cnxk/roc_mbox.h b/drivers/common/cnxk/roc_mbox.h index b74eb71275..c1769567b5 100644 --- a/drivers/common/cnxk/roc_mbox.h +++ b/drivers/common/cnxk/roc_mbox.h @@ -266,7 +266,7 @@ struct mbox_msghdr { msg_rsp) \ M(NIX_RX_SW_SYNC, 0x8022, nix_rx_sw_sync, msg_req, msg_rsp) \ M(NIX_READ_INLINE_IPSEC_CFG, 0x8023, nix_read_inline_ipsec_cfg, \ - msg_req, nix_inline_ipsec_cfg) \ + msg_req, nix_inline_ipsec_cfg) \ M(NIX_LF_INLINE_RQ_CFG, 0x8024, nix_lf_inline_rq_cfg, \ nix_rq_cpt_field_mask_cfg_req, msg_rsp) \ M(NIX_SPI_TO_SA_ADD, 0x8026, nix_spi_to_sa_add, nix_spi_to_sa_add_req, \ @@ -1198,6 +1198,8 @@ struct nix_inline_ipsec_cfg { uint8_t __io cpt_slot; } inst_qsel; uint8_t __io enable; + uint16_t __io bpid; + uint32_t __io credit_th; }; /* Per NIX LF inline IPSec configuration */ @@ -1503,6 +1505,8 @@ struct cpt_rx_inline_lf_cfg_msg { uint16_t __io param2; uint16_t __io opcode; uint32_t __io credit; + uint32_t __io credit_th; + uint16_t __io bpid; uint32_t __io reserved; }; From patchwork Mon Jan 16 09:39:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nithin Dabilpuram X-Patchwork-Id: 122091 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1F134423EE; Mon, 16 Jan 2023 10:41:41 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id EEC2142D3B; Mon, 16 Jan 2023 10:41:11 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id B2C6B42D36 for ; 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Mon, 16 Jan 2023 01:41:09 -0800 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Mon, 16 Jan 2023 01:41:08 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.42 via Frontend Transport; Mon, 16 Jan 2023 01:41:08 -0800 Received: from hyd1588t430.caveonetworks.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id EED463F7041; Mon, 16 Jan 2023 01:41:05 -0800 (PST) From: Nithin Dabilpuram To: , Nithin Dabilpuram , "Kiran Kumar K" , Sunil Kumar Kori , Satha Rao CC: , Rakesh Kudurumalla Subject: [PATCH 8/9] net/cnxk: make flow control op for SDP as no-op Date: Mon, 16 Jan 2023 15:09:53 +0530 Message-ID: <20230116093954.172938-8-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230116093954.172938-1-ndabilpuram@marvell.com> References: <20230116093954.172938-1-ndabilpuram@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: GTxxRDahFW17atMUsR846pu_XGj4MCP2 X-Proofpoint-GUID: GTxxRDahFW17atMUsR846pu_XGj4MCP2 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.923,Hydra:6.0.562,FMLib:17.11.122.1 definitions=2023-01-16_08,2023-01-13_02,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Rakesh Kudurumalla no action is taken when application calls rte_eth_dev_flow_ctrl_get(), for sdp port which is inline with rte_eth_dev_flow_ctrl_set() for sdp port Signed-off-by: Rakesh Kudurumalla --- drivers/net/cnxk/cnxk_ethdev_ops.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/net/cnxk/cnxk_ethdev_ops.c b/drivers/net/cnxk/cnxk_ethdev_ops.c index 8f7287161b..a6ab493626 100644 --- a/drivers/net/cnxk/cnxk_ethdev_ops.c +++ b/drivers/net/cnxk/cnxk_ethdev_ops.c @@ -212,6 +212,9 @@ cnxk_nix_flow_ctrl_get(struct rte_eth_dev *eth_dev, struct roc_nix *nix = &dev->nix; int mode; + if (roc_nix_is_sdp(nix)) + return 0; + mode = roc_nix_fc_mode_get(nix); if (mode < 0) return mode; From patchwork Mon Jan 16 09:39:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nithin Dabilpuram X-Patchwork-Id: 122092 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 07F0C423EE; Mon, 16 Jan 2023 10:41:48 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id BCAC942D30; Mon, 16 Jan 2023 10:41:14 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 5E2FF42D3E for ; Mon, 16 Jan 2023 10:41:13 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 30G63V34032538 for ; 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Mon, 16 Jan 2023 01:41:10 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.42 via Frontend Transport; Mon, 16 Jan 2023 01:41:10 -0800 Received: from hyd1588t430.caveonetworks.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id D5A043F7052; Mon, 16 Jan 2023 01:41:08 -0800 (PST) From: Nithin Dabilpuram To: , Nithin Dabilpuram , "Kiran Kumar K" , Sunil Kumar Kori , Satha Rao CC: Subject: [PATCH 9/9] common/cnxk: skip L4 checks on inline IPsec traffic Date: Mon, 16 Jan 2023 15:09:54 +0530 Message-ID: <20230116093954.172938-9-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230116093954.172938-1-ndabilpuram@marvell.com> References: <20230116093954.172938-1-ndabilpuram@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: tsO5EPsuFrg8ugrYiwBI5r19zQ_faV5Z X-Proofpoint-GUID: tsO5EPsuFrg8ugrYiwBI5r19zQ_faV5Z X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.923,Hydra:6.0.562,FMLib:17.11.122.1 definitions=2023-01-16_08,2023-01-13_02,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Skip L4 checks on inline IPsec traffic as even first fragment is set as valid ESP packet in order to send it via CPT. Signed-off-by: Nithin Dabilpuram --- drivers/common/cnxk/roc_nix_inl_dev.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/common/cnxk/roc_nix_inl_dev.c b/drivers/common/cnxk/roc_nix_inl_dev.c index b340b92e77..6f60961bc7 100644 --- a/drivers/common/cnxk/roc_nix_inl_dev.c +++ b/drivers/common/cnxk/roc_nix_inl_dev.c @@ -13,9 +13,7 @@ #define NIX_INL_LF_RX_CFG \ (ROC_NIX_LF_RX_CFG_DROP_RE | ROC_NIX_LF_RX_CFG_L2_LEN_ERR | \ ROC_NIX_LF_RX_CFG_IP6_UDP_OPT | ROC_NIX_LF_RX_CFG_DIS_APAD | \ - ROC_NIX_LF_RX_CFG_CSUM_IL4 | ROC_NIX_LF_RX_CFG_CSUM_OL4 | \ - ROC_NIX_LF_RX_CFG_LEN_IL4 | ROC_NIX_LF_RX_CFG_LEN_IL3 | \ - ROC_NIX_LF_RX_CFG_LEN_OL4 | ROC_NIX_LF_RX_CFG_LEN_OL3) + ROC_NIX_LF_RX_CFG_LEN_IL3 | ROC_NIX_LF_RX_CFG_LEN_OL3) extern uint32_t soft_exp_consumer_cnt; static bool soft_exp_poll_thread_exit = true;