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Thu, 20 Apr 2023 02:43:51 -0700 From: Michael Baum To: CC: Matan Azrad , Raslan Darawsheh , Viacheslav Ovsiienko Subject: [RFC] net/mlx5: add MPLS modify field support Date: Thu, 20 Apr 2023 12:43:47 +0300 Message-ID: <20230420094347.523784-1-michaelba@nvidia.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF0000E642:EE_|MN2PR12MB4255:EE_ X-MS-Office365-Filtering-Correlation-Id: c1c4219a-50e9-4d64-d202-08db4183c76e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: ric0eNL8SMUoGYlGyMsYaKwX0I0KcwiW51vcb0Lh+v8fqgIR9dCrJrrkhTfUmnO4gp1mq6Zsi6NafBdphC55DEVma6KkmhVV9bXUCG9cgCaNhITqks5l+se0CsaXp0PHEHR852F9USTn4zFkj4zVVxZNn2CWLJKSOkn08HuXnrT6QMo1i+cSphN4w7tUw9IWy8yV8RgKhd3bG/ZpotBXYovr2yXDRyuaOznf1m1N/sCEuAYsIkYl4GBxNgLpe3Xny65/cKWri1hPVHTSIl1iz8ODdq6vDdFb1G2Tu5nZsB0BLjfH3LcL2JQ5mLwlDxpi7EjhmLJvdQL0N99nDWDq0cknd7uVPgrjqgnPUCvLpdi2rH2YbeS/2oz1g/taHmGJA+j8xG/FiFMv3+KnyehMFv22wUoNpWrqbmac5D1XWaZ+GL4s9IRrRCRsqgIQeoKxywvsquDbW5DNwkOkaRFJrN+FVXhHnsAuqreTiff0eeb6QL8/Gc37aR2MUhWH8lL5f3juSbdqw92NtPzDB6yP0GpBnLDJ9m6Niiw+L7jDcLDCayjMZ40kVjpx17ScodqRae2EM3fm3weA4l+0ksnd1fuHLNhY3OM4tTqQgbMlkSJpuJ2XhWnEzF9dyuiqTHLsC1YF6TWkgKXcrnGob/nnQzMJGhHe+a4x8IIKAmW3jk0itLidmloOs1udylFYzz2f5dEV8qN+sKjV1aHQJrVF31EMfbcZUResy5FNuuOaa2FDQG0etH0GV1KyfM2YL5sG X-Forefront-Antispam-Report: CIP:216.228.117.160; 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For now it is supported only to copy from. Signed-off-by: Michael Baum --- drivers/common/mlx5/mlx5_prm.h | 5 +++++ drivers/net/mlx5/mlx5_flow_dv.c | 23 +++++++++++++++++++++++ drivers/net/mlx5/mlx5_flow_hw.c | 16 +++++++++------- 3 files changed, 37 insertions(+), 7 deletions(-) diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h index ed3d5efbb7..04c1400a1e 100644 --- a/drivers/common/mlx5/mlx5_prm.h +++ b/drivers/common/mlx5/mlx5_prm.h @@ -787,6 +787,11 @@ enum mlx5_modification_field { MLX5_MODI_TUNNEL_HDR_DW_1 = 0x75, MLX5_MODI_GTPU_FIRST_EXT_DW_0 = 0x76, MLX5_MODI_HASH_RESULT = 0x81, + MLX5_MODI_IN_MPLS_LABEL_0 = 0x8a, + MLX5_MODI_IN_MPLS_LABEL_1, + MLX5_MODI_IN_MPLS_LABEL_2, + MLX5_MODI_IN_MPLS_LABEL_3, + MLX5_MODI_IN_MPLS_LABEL_4, MLX5_MODI_OUT_IPV6_NEXT_HDR = 0x4A, MLX5_MODI_INVALID = INT_MAX, }; diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index f136f43b0a..93cce16a1e 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -1388,6 +1388,7 @@ mlx5_flow_item_field_width(struct rte_eth_dev *dev, case RTE_FLOW_FIELD_GENEVE_VNI: return 24; case RTE_FLOW_FIELD_GTP_TEID: + case RTE_FLOW_FIELD_MPLS: case RTE_FLOW_FIELD_TAG: return 32; case RTE_FLOW_FIELD_MARK: @@ -1435,6 +1436,12 @@ flow_modify_info_mask_32_masked(uint32_t length, uint32_t off, uint32_t post_mas return rte_cpu_to_be_32(mask & post_mask); } +static __rte_always_inline enum mlx5_modification_field +mlx5_mpls_modi_field_get(const struct rte_flow_action_modify_data *data) +{ + return MLX5_MODI_IN_MPLS_LABEL_0 + data->sub_level; +} + static void mlx5_modify_flex_item(const struct rte_eth_dev *dev, const struct mlx5_flex_item *flex, @@ -1893,6 +1900,16 @@ mlx5_flow_field_id_to_modify_info else info[idx].offset = off_be; break; + case RTE_FLOW_FIELD_MPLS: + MLX5_ASSERT(data->offset + width <= 32); + off_be = 32 - (data->offset + width); + info[idx] = (struct field_modify_info){4, 0, + mlx5_mpls_modi_field_get(data)}; + if (mask) + mask[idx] = flow_modify_info_mask_32(width, off_be); + else + info[idx].offset = off_be; + break; case RTE_FLOW_FIELD_TAG: { MLX5_ASSERT(data->offset + width <= 32); @@ -5344,6 +5361,12 @@ flow_dv_validate_action_modify_field(struct rte_eth_dev *dev, RTE_FLOW_ERROR_TYPE_ACTION, action, "modifications of the GENEVE Network" " Identifier is not supported"); + if (action_modify_field->dst.field == RTE_FLOW_FIELD_MPLS || + action_modify_field->src.field == RTE_FLOW_FIELD_MPLS) + return rte_flow_error_set(error, ENOTSUP, + RTE_FLOW_ERROR_TYPE_ACTION, action, + "modifications of the MPLS header " + "is not supported"); if (action_modify_field->dst.field == RTE_FLOW_FIELD_MARK || action_modify_field->src.field == RTE_FLOW_FIELD_MARK) if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY || diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c index 7e0ee8d883..fd2ad3bb58 100644 --- a/drivers/net/mlx5/mlx5_flow_hw.c +++ b/drivers/net/mlx5/mlx5_flow_hw.c @@ -3546,10 +3546,8 @@ flow_hw_validate_action_modify_field(const struct rte_flow_action *action, const struct rte_flow_action *mask, struct rte_flow_error *error) { - const struct rte_flow_action_modify_field *action_conf = - action->conf; - const struct rte_flow_action_modify_field *mask_conf = - mask->conf; + const struct rte_flow_action_modify_field *action_conf = action->conf; + const struct rte_flow_action_modify_field *mask_conf = mask->conf; if (action_conf->operation != mask_conf->operation) return rte_flow_error_set(error, EINVAL, @@ -3604,6 +3602,11 @@ flow_hw_validate_action_modify_field(const struct rte_flow_action *action, return rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION, action, "modifying Geneve VNI is not supported"); + /* Due to HW bug, tunnel MPLS header is read only. */ + if (action_conf->dst.field == RTE_FLOW_FIELD_MPLS) + return rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_ACTION, action, + "MPLS cannot be used as destination"); return 0; } @@ -4134,9 +4137,8 @@ mlx5_flow_hw_actions_validate(struct rte_eth_dev *dev, action_flags |= MLX5_FLOW_ACTION_METER; break; case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD: - ret = flow_hw_validate_action_modify_field(action, - mask, - error); + ret = flow_hw_validate_action_modify_field(action, mask, + error); if (ret < 0) return ret; action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;