From patchwork Thu Jun 1 11:42:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Denis Pryazhennikov X-Patchwork-Id: 127832 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5230B42C02; Thu, 1 Jun 2023 13:42:30 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D52B742B8B; Thu, 1 Jun 2023 13:42:25 +0200 (CEST) Received: from agw.arknetworks.am (agw.arknetworks.am [79.141.165.80]) by mails.dpdk.org (Postfix) with ESMTP id 8AB6D40DDC for ; Thu, 1 Jun 2023 13:42:23 +0200 (CEST) Received: from localhost.localdomain (unknown [37.252.90.53]) (using TLSv1.3 with cipher TLS_CHACHA20_POLY1305_SHA256 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA512) (No client certificate requested) by agw.arknetworks.am (Postfix) with ESMTPSA id E3854E1241; Thu, 1 Jun 2023 15:42:22 +0400 (+04) From: Denis Pryazhennikov To: dev@dpdk.org Cc: Viacheslav Galaktionov , Ferruh Yigit , Andrew Rybchenko , Sandilya Bhagi , Andy Moreton Subject: [PATCH 1/4] common/sfc_efx/base: NIC Partitioning mode discovery using heuristic approach Date: Thu, 1 Jun 2023 15:42:17 +0400 Message-Id: <20230601114220.17796-2-denis.pryazhennikov@arknetworks.am> X-Mailer: git-send-email 2.37.0 (Apple Git-136) In-Reply-To: <20230601114220.17796-1-denis.pryazhennikov@arknetworks.am> References: <20230601114220.17796-1-denis.pryazhennikov@arknetworks.am> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org NIC Partitioning mode in SFN devices means multiple PFs per network port. When NIC Partitioning is configured, apart from the privileged adapter(s) the other unprivileged adapter(s) will share the same physical port. Determining NIC Partitioning mode is required to take necessary action(s) for unprivileged adapter to work seamlessly. NIC Partitioning is determined using heuristic approach - If the physical ports are shared between PFs then either NIC Partitioning or SR-IOV is in use. When NIC Partitioning is in use MAX MTU workaround should be applied so that the unprivileged functions can seamlessly configure any valid MTU. hg-changeset: 7f0abee725a8e9c6524e773e5e5d6286a3b027a4 Signed-off-by: Sandilya Bhagi Signed-off-by: Denis Pryazhennikov Reviewed-by: Andy Moreton --- drivers/common/sfc_efx/base/ef10_nic.c | 109 +++++++++++++++++++++++++ drivers/common/sfc_efx/base/efx.h | 8 ++ 2 files changed, 117 insertions(+) diff --git a/drivers/common/sfc_efx/base/ef10_nic.c b/drivers/common/sfc_efx/base/ef10_nic.c index e1709d120093..db4834a65175 100644 --- a/drivers/common/sfc_efx/base/ef10_nic.c +++ b/drivers/common/sfc_efx/base/ef10_nic.c @@ -1044,6 +1044,89 @@ ef10_mcdi_get_pf_count( return (rc); } +static __checkReturn efx_rc_t +ef10_nic_get_physical_port_usage( + __in efx_nic_t *enp, + __in_ecount(pfs_to_ports_size) uint8_t *pfs_to_ports, + __in size_t pfs_to_ports_size, + __out efx_port_usage_t *port_usagep) +{ + efx_nic_cfg_t *encp = &(enp->en_nic_cfg); + efx_port_usage_t port_usage; + size_t pf; + uint8_t phy_port; + efx_rc_t rc; + + /* + * The sharing of physical ports between functions are determined + * in the following way. + * 1. If VFs are enabled then the physical port is shared. + * 2. Retrieve PFs to ports assignment. + * 3. If PF 0 assignment cannot be retrieved(ACCESS_DENIED), it + * implies this is an unprivileged function. An unprivileged + * function indicates the physical port must be shared with + * another privileged function. + * 4. If PF 0 assignment can be retrieved, it indicates this + * function is privileged. Now, read all other PF's physical + * port number assignment and check if the current PF's physical + * port is shared with any other PF's physical port. + * NOTE: Sharing of physical ports (using heuristic approach) can + * imply either NIC Partitioning or SR-IOV is in use. This info is + * sufficient to apply the max MTU workaround (WIN-628), but should + * not be used for other purposes. + * NOTE: PF 0 is always privileged function. + */ + + if (EFX_PCI_FUNCTION_IS_VF(encp)) { + port_usage = EFX_PORT_USAGE_SHARED; + goto out; + } + + if (pfs_to_ports[0] == + MC_CMD_GET_CAPABILITIES_V2_OUT_ACCESS_NOT_PERMITTED) { + /* + * This is unprivileged function as it do not have sufficient + * privileges to read the value, this implies the physical port + * is shared between this function and another privileged + * function + */ + port_usage = EFX_PORT_USAGE_SHARED; + goto out; + } + + if (encp->enc_pf >= pfs_to_ports_size) { + rc = EINVAL; + goto fail1; + } + phy_port = pfs_to_ports[encp->enc_pf]; + + /* + * This is privileged function as it is able read the value of + * PF 0. Now, check if any other function share the same physical + * port number as this function. + */ + for (pf = 0; pf < pfs_to_ports_size; pf++) { + + if ((encp->enc_pf != pf) && + (phy_port == pfs_to_ports[pf])) { + /* Found match, PFs share the same physical port */ + port_usage = EFX_PORT_USAGE_SHARED; + goto out; + } + } + + port_usage = EFX_PORT_USAGE_EXCLUSIVE; + +out: + *port_usagep = port_usage; + return (0); + +fail1: + EFSYS_PROBE1(fail1, efx_rc_t, rc); + + return (rc); +} + static __checkReturn efx_rc_t ef10_get_datapath_caps( __in efx_nic_t *enp) @@ -1307,6 +1390,32 @@ ef10_get_datapath_caps( encp->enc_tunnel_config_udp_entries_max = 0; } +#define CAP_PFS_TO_PORTS(_n) \ + (MC_CMD_GET_CAPABILITIES_V2_OUT_PFS_TO_PORTS_ASSIGNMENT_ ## _n) + + encp->enc_port_usage = EFX_PORT_USAGE_UNKNOWN; + + if (req.emr_out_length_used >= MC_CMD_GET_CAPABILITIES_V2_OUT_LEN) { + /* PFs to ports assignment */ + uint8_t pfs_to_ports[CAP_PFS_TO_PORTS(NUM)]; + efx_byte_t *bytep; + int i; + + bytep = MCDI_OUT(req, efx_byte_t, CAP_PFS_TO_PORTS(OFST)); + for (i = 0; i < EFX_ARRAY_SIZE(pfs_to_ports); i++) { + pfs_to_ports[i] = EFX_BYTE_FIELD(*bytep, EFX_BYTE_0); + bytep += CAP_PFS_TO_PORTS(LEN); + } + + if (ef10_nic_get_physical_port_usage(enp, + pfs_to_ports, EFX_ARRAY_SIZE(pfs_to_ports), + &encp->enc_port_usage) != 0) { + /* PF to port mapping lookup failed */ + encp->enc_port_usage = EFX_PORT_USAGE_UNKNOWN; + } + } +#undef CAP_PFS_TO_PORTS + /* * Check if firmware reports the VI window mode. * Medford2 has a variable VI window size (8K, 16K or 64K). diff --git a/drivers/common/sfc_efx/base/efx.h b/drivers/common/sfc_efx/base/efx.h index 49e29dcc1c69..93bb4916bfd6 100644 --- a/drivers/common/sfc_efx/base/efx.h +++ b/drivers/common/sfc_efx/base/efx.h @@ -311,6 +311,12 @@ efx_nic_check_pcie_link_speed( __in uint32_t pcie_link_gen, __out efx_pcie_link_performance_t *resultp); +typedef enum efx_port_usage_e { + EFX_PORT_USAGE_UNKNOWN = 0, + EFX_PORT_USAGE_EXCLUSIVE, /* Port only used by this PF */ + EFX_PORT_USAGE_SHARED, /* Port shared with other PFs */ +} efx_port_usage_t; + #define EFX_MAC_ADDR_LEN 6 #if EFSYS_OPT_MCDI @@ -1680,6 +1686,8 @@ typedef struct efx_nic_cfg_s { uint32_t enc_assigned_port; /* NIC DMA mapping type */ efx_nic_dma_mapping_t enc_dma_mapping; + /* Physical ports shared by PFs */ + efx_port_usage_t enc_port_usage; } efx_nic_cfg_t; #define EFX_PCI_VF_INVALID 0xffff From patchwork Thu Jun 1 11:42:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Denis Pryazhennikov X-Patchwork-Id: 127833 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4519A42C02; Thu, 1 Jun 2023 13:42:38 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 649DA42D2C; Thu, 1 Jun 2023 13:42:27 +0200 (CEST) Received: from agw.arknetworks.am (agw.arknetworks.am [79.141.165.80]) by mails.dpdk.org (Postfix) with ESMTP id 2948E40DDC for ; Thu, 1 Jun 2023 13:42:24 +0200 (CEST) Received: from localhost.localdomain (unknown [37.252.90.53]) (using TLSv1.3 with cipher TLS_CHACHA20_POLY1305_SHA256 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA512) (No client certificate requested) by agw.arknetworks.am (Postfix) with ESMTPSA id 944B4E126C; Thu, 1 Jun 2023 15:42:23 +0400 (+04) From: Denis Pryazhennikov To: dev@dpdk.org Cc: Viacheslav Galaktionov , Ferruh Yigit , Andrew Rybchenko , Roman Zhukov Subject: [PATCH 2/4] common/sfc_efx/base: detect and report FCS include support Date: Thu, 1 Jun 2023 15:42:18 +0400 Message-Id: <20230601114220.17796-3-denis.pryazhennikov@arknetworks.am> X-Mailer: git-send-email 2.37.0 (Apple Git-136) In-Reply-To: <20230601114220.17796-1-denis.pryazhennikov@arknetworks.am> References: <20230601114220.17796-1-denis.pryazhennikov@arknetworks.am> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org A new variable was added to efx_nic_cfg_s to detect and report if FCS is supported by FW. Signed-off-by: Roman Zhukov Signed-off-by: Denis Pryazhennikov Reviewed-by: Viacheslav Galaktionov Acked-by: Andrew Rybchenko --- drivers/common/sfc_efx/base/ef10_nic.c | 6 ++++++ drivers/common/sfc_efx/base/efx.h | 1 + drivers/common/sfc_efx/base/siena_nic.c | 1 + 3 files changed, 8 insertions(+) diff --git a/drivers/common/sfc_efx/base/ef10_nic.c b/drivers/common/sfc_efx/base/ef10_nic.c index db4834a65175..d5b19af8e811 100644 --- a/drivers/common/sfc_efx/base/ef10_nic.c +++ b/drivers/common/sfc_efx/base/ef10_nic.c @@ -1250,6 +1250,12 @@ ef10_get_datapath_caps( /* No limit on maximum number of Rx scatter elements per packet. */ encp->enc_rx_scatter_max = -1; + /* Check if the firmware supports include FCS on RX */ + if (CAP_FLAGS1(req, RX_INCLUDE_FCS)) + encp->enc_rx_include_fcs_supported = B_TRUE; + else + encp->enc_rx_include_fcs_supported = B_FALSE; + /* Check if the firmware supports packed stream mode */ if (CAP_FLAGS1(req, RX_PACKED_STREAM)) encp->enc_rx_packed_stream_supported = B_TRUE; diff --git a/drivers/common/sfc_efx/base/efx.h b/drivers/common/sfc_efx/base/efx.h index 93bb4916bfd6..ff281167767d 100644 --- a/drivers/common/sfc_efx/base/efx.h +++ b/drivers/common/sfc_efx/base/efx.h @@ -1629,6 +1629,7 @@ typedef struct efx_nic_cfg_s { /* Datapath firmware vport reconfigure support */ boolean_t enc_vport_reconfigure_supported; boolean_t enc_rx_disable_scatter_supported; + boolean_t enc_rx_include_fcs_supported; /* Maximum number of Rx scatter segments supported by HW */ uint32_t enc_rx_scatter_max; boolean_t enc_allow_set_mac_with_installed_filters; diff --git a/drivers/common/sfc_efx/base/siena_nic.c b/drivers/common/sfc_efx/base/siena_nic.c index 9f14faf27168..c0316676eba2 100644 --- a/drivers/common/sfc_efx/base/siena_nic.c +++ b/drivers/common/sfc_efx/base/siena_nic.c @@ -187,6 +187,7 @@ siena_board_cfg( encp->enc_allow_set_mac_with_installed_filters = B_TRUE; encp->enc_rx_packed_stream_supported = B_FALSE; encp->enc_rx_var_packed_stream_supported = B_FALSE; + encp->enc_rx_include_fcs_supported = B_FALSE; encp->enc_rx_es_super_buffer_supported = B_FALSE; encp->enc_fw_subvariant_no_tx_csum_supported = B_FALSE; From patchwork Thu Jun 1 11:42:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Denis Pryazhennikov X-Patchwork-Id: 127834 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6039342C02; Thu, 1 Jun 2023 13:42:44 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id A8BF242D38; Thu, 1 Jun 2023 13:42:28 +0200 (CEST) Received: from agw.arknetworks.am (agw.arknetworks.am [79.141.165.80]) by mails.dpdk.org (Postfix) with ESMTP id E31A2410D0 for ; Thu, 1 Jun 2023 13:42:24 +0200 (CEST) Received: from localhost.localdomain (unknown [37.252.90.53]) (using TLSv1.3 with cipher TLS_CHACHA20_POLY1305_SHA256 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA512) (No client certificate requested) by agw.arknetworks.am (Postfix) with ESMTPSA id 37EE5E1273; Thu, 1 Jun 2023 15:42:24 +0400 (+04) From: Denis Pryazhennikov To: dev@dpdk.org Cc: Viacheslav Galaktionov , Ferruh Yigit , Andrew Rybchenko , Roman Zhukov , Andy Moreton Subject: [PATCH 3/4] common/sfc_efx/base: add support for configure MAC to keep FCS Date: Thu, 1 Jun 2023 15:42:19 +0400 Message-Id: <20230601114220.17796-4-denis.pryazhennikov@arknetworks.am> X-Mailer: git-send-email 2.37.0 (Apple Git-136) In-Reply-To: <20230601114220.17796-1-denis.pryazhennikov@arknetworks.am> References: <20230601114220.17796-1-denis.pryazhennikov@arknetworks.am> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Drivers cannot determine if received packet includes the FCS or not. Only packets with an external port have the FCS included and functions without link control privilege cannot determine the MAC configuration. This patch is trying to make assumptions that: if PF is the only function (there are no VFs or additional PFs); it can set the MAC configuration and it never expects packets it sends to be looped back then it can assume that changed the MAC configuration to include the FCS is safe and that all received packets will include their FCS. Signed-off-by: Roman Zhukov Signed-off-by: Denis Pryazhennikov Reviewed-by: Andy Moreton Acked-by: Andrew Rybchenko --- drivers/common/sfc_efx/base/ef10_mac.c | 5 +-- drivers/common/sfc_efx/base/efx.h | 5 +++ drivers/common/sfc_efx/base/efx_impl.h | 1 + drivers/common/sfc_efx/base/efx_mac.c | 48 ++++++++++++++++++++++++++ drivers/common/sfc_efx/version.map | 1 + 5 files changed, 58 insertions(+), 2 deletions(-) diff --git a/drivers/common/sfc_efx/base/ef10_mac.c b/drivers/common/sfc_efx/base/ef10_mac.c index 28228a9fb784..bfc82b80c7e5 100644 --- a/drivers/common/sfc_efx/base/ef10_mac.c +++ b/drivers/common/sfc_efx/base/ef10_mac.c @@ -307,9 +307,10 @@ ef10_mac_reconfigure( */ MCDI_IN_SET_DWORD(req, SET_MAC_IN_FCNTL, MC_CMD_FCNTL_AUTO); - /* Do not include the Ethernet frame checksum in RX packets */ + /* Include the Ethernet frame checksum in RX packets if it's required */ MCDI_IN_POPULATE_DWORD_1(req, SET_MAC_IN_FLAGS, - SET_MAC_IN_FLAG_INCLUDE_FCS, 0); + SET_MAC_IN_FLAG_INCLUDE_FCS, + epp->ep_include_fcs ? 1 : 0); efx_mcdi_execute_quiet(enp, &req); diff --git a/drivers/common/sfc_efx/base/efx.h b/drivers/common/sfc_efx/base/efx.h index ff281167767d..b52baaa7a452 100644 --- a/drivers/common/sfc_efx/base/efx.h +++ b/drivers/common/sfc_efx/base/efx.h @@ -747,6 +747,11 @@ efx_mac_fcntl_get( __out unsigned int *fcntl_wantedp, __out unsigned int *fcntl_linkp); +LIBEFX_API +extern __checkReturn efx_rc_t +efx_mac_include_fcs_set( + __in efx_nic_t *enp, + __in boolean_t enabled); #if EFSYS_OPT_MAC_STATS diff --git a/drivers/common/sfc_efx/base/efx_impl.h b/drivers/common/sfc_efx/base/efx_impl.h index 45e99d01c58f..b6461c14399e 100644 --- a/drivers/common/sfc_efx/base/efx_impl.h +++ b/drivers/common/sfc_efx/base/efx_impl.h @@ -363,6 +363,7 @@ typedef struct efx_port_s { uint32_t ep_default_adv_cap_mask; uint32_t ep_phy_cap_mask; boolean_t ep_mac_drain; + boolean_t ep_include_fcs; #if EFSYS_OPT_BIST efx_bist_type_t ep_current_bist; #endif diff --git a/drivers/common/sfc_efx/base/efx_mac.c b/drivers/common/sfc_efx/base/efx_mac.c index c51e86b52c29..13cac5a75130 100644 --- a/drivers/common/sfc_efx/base/efx_mac.c +++ b/drivers/common/sfc_efx/base/efx_mac.c @@ -527,6 +527,54 @@ efx_mac_filter_default_rxq_clear( emop->emo_filter_default_rxq_clear(enp); } + __checkReturn efx_rc_t +efx_mac_include_fcs_set( + __in efx_nic_t *enp, + __in boolean_t enabled) +{ + efx_port_t *epp = &(enp->en_port); + efx_nic_cfg_t *encp = &(enp->en_nic_cfg); + const efx_mac_ops_t *emop = epp->ep_emop; + efx_rc_t rc; + + EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PORT); + EFSYS_ASSERT(emop != NULL); + + if (enabled && !encp->enc_rx_include_fcs_supported) { + rc = ENOTSUP; + goto fail1; + } + + /* + * Enabling 'include FCS' changes link control state and affects + * behaviour for all PCI functions on the port, so to avoid this it + * can be enabled only if the PCI function is exclusive port user + */ + if (enabled && encp->enc_port_usage != EFX_PORT_USAGE_EXCLUSIVE) { + rc = EACCES; + goto fail2; + } + + if (epp->ep_include_fcs != enabled) { + epp->ep_include_fcs = enabled; + + rc = emop->emo_reconfigure(enp); + if (rc != 0) + goto fail3; + } + + return 0; + +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, efx_rc_t, rc); + + return rc; +} #if EFSYS_OPT_MAC_STATS diff --git a/drivers/common/sfc_efx/version.map b/drivers/common/sfc_efx/version.map index d9b04a611d25..a54dba81f578 100644 --- a/drivers/common/sfc_efx/version.map +++ b/drivers/common/sfc_efx/version.map @@ -71,6 +71,7 @@ INTERNAL { efx_mac_drain; efx_mac_fcntl_get; efx_mac_fcntl_set; + efx_mac_include_fcs_set; efx_mac_filter_default_rxq_clear; efx_mac_filter_default_rxq_set; efx_mac_filter_get_all_ucast_mcast; From patchwork Thu Jun 1 11:42:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Denis Pryazhennikov X-Patchwork-Id: 127835 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id EEACB42C02; Thu, 1 Jun 2023 13:42:50 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 023CC42D3A; Thu, 1 Jun 2023 13:42:30 +0200 (CEST) Received: from agw.arknetworks.am (agw.arknetworks.am [79.141.165.80]) by mails.dpdk.org (Postfix) with ESMTP id 769FB4161A for ; Thu, 1 Jun 2023 13:42:25 +0200 (CEST) Received: from localhost.localdomain (unknown [37.252.90.53]) (using TLSv1.3 with cipher TLS_CHACHA20_POLY1305_SHA256 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA512) (No client certificate requested) by agw.arknetworks.am (Postfix) with ESMTPSA id DBF1FE12C3; Thu, 1 Jun 2023 15:42:24 +0400 (+04) From: Denis Pryazhennikov To: dev@dpdk.org Cc: Viacheslav Galaktionov , Ferruh Yigit , Andrew Rybchenko , Roman Zhukov , Andy Moreton Subject: [PATCH 4/4] net/sfc: add configurable Rx CRC stripping Date: Thu, 1 Jun 2023 15:42:20 +0400 Message-Id: <20230601114220.17796-5-denis.pryazhennikov@arknetworks.am> X-Mailer: git-send-email 2.37.0 (Apple Git-136) In-Reply-To: <20230601114220.17796-1-denis.pryazhennikov@arknetworks.am> References: <20230601114220.17796-1-denis.pryazhennikov@arknetworks.am> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Configurable Rx CRC stripping is allowed only if running firmware variant supports it and if NIC is configured with single PF per port and without VFs. Signed-off-by: Roman Zhukov Signed-off-by: Denis Pryazhennikov Reviewed-by: Andy Moreton --- doc/guides/nics/features/sfc.ini | 1 + doc/guides/nics/sfc_efx.rst | 6 ++++-- drivers/net/sfc/sfc.h | 1 + drivers/net/sfc/sfc_ef10_rx.c | 3 ++- drivers/net/sfc/sfc_port.c | 12 ++++++++++++ drivers/net/sfc/sfc_rx.c | 6 +++++- 6 files changed, 25 insertions(+), 4 deletions(-) diff --git a/doc/guides/nics/features/sfc.ini b/doc/guides/nics/features/sfc.ini index f5ac644278ae..c41c47a63d49 100644 --- a/doc/guides/nics/features/sfc.ini +++ b/doc/guides/nics/features/sfc.ini @@ -23,6 +23,7 @@ RSS key update = Y RSS reta update = Y SR-IOV = Y Flow control = Y +CRC offload = Y VLAN offload = P L3 checksum offload = Y L4 checksum offload = Y diff --git a/doc/guides/nics/sfc_efx.rst b/doc/guides/nics/sfc_efx.rst index de0656876b96..b3a44e7ddd92 100644 --- a/doc/guides/nics/sfc_efx.rst +++ b/doc/guides/nics/sfc_efx.rst @@ -114,6 +114,10 @@ SFC EFX PMD has support for: - Loopback +- Configurable Rx CRC stripping (if running firmware variant supports it and + if NIC is configured with single PF per port and without VFs, otherwise + always stripped) + - SR-IOV PF - Port representors (see :ref: switch_representation) @@ -126,8 +130,6 @@ The features not yet supported include: - Priority-based flow control -- Configurable RX CRC stripping (always stripped) - - Header split on receive - VLAN filtering diff --git a/drivers/net/sfc/sfc.h b/drivers/net/sfc/sfc.h index 730d054aea74..5c97d5911eb2 100644 --- a/drivers/net/sfc/sfc.h +++ b/drivers/net/sfc/sfc.h @@ -72,6 +72,7 @@ struct sfc_port { unsigned int flow_ctrl; boolean_t flow_ctrl_autoneg; size_t pdu; + boolean_t include_fcs; /* * Flow API isolated mode overrides promisc and allmulti settings; diff --git a/drivers/net/sfc/sfc_ef10_rx.c b/drivers/net/sfc/sfc_ef10_rx.c index 7be224c9c412..08fe41fe5d94 100644 --- a/drivers/net/sfc/sfc_ef10_rx.c +++ b/drivers/net/sfc/sfc_ef10_rx.c @@ -826,7 +826,8 @@ struct sfc_dp_rx sfc_ef10_rx = { .dev_offload_capa = RTE_ETH_RX_OFFLOAD_CHECKSUM | RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM | RTE_ETH_RX_OFFLOAD_RSS_HASH, - .queue_offload_capa = RTE_ETH_RX_OFFLOAD_SCATTER, + .queue_offload_capa = RTE_ETH_RX_OFFLOAD_SCATTER | + RTE_ETH_RX_OFFLOAD_KEEP_CRC, .get_dev_info = sfc_ef10_rx_get_dev_info, .qsize_up_rings = sfc_ef10_rx_qsize_up_rings, .qcreate = sfc_ef10_rx_qcreate, diff --git a/drivers/net/sfc/sfc_port.c b/drivers/net/sfc/sfc_port.c index 5f312ab1ba83..24d2daf6282b 100644 --- a/drivers/net/sfc/sfc_port.c +++ b/drivers/net/sfc/sfc_port.c @@ -250,6 +250,11 @@ sfc_port_start(struct sfc_adapter *sa) if (rc != 0) goto fail_mac_pdu_set; + sfc_log_init(sa, "set include FCS=%u", port->include_fcs); + rc = efx_mac_include_fcs_set(sa->nic, port->include_fcs); + if (rc != 0) + goto fail_include_fcs_set; + if (!sfc_sa2shared(sa)->isolated) { struct rte_ether_addr *addr = &port->default_mac_addr; @@ -337,6 +342,7 @@ sfc_port_start(struct sfc_adapter *sa) (void)efx_mac_drain(sa->nic, B_TRUE); fail_mac_drain: +fail_include_fcs_set: fail_mac_stats_upload: (void)efx_mac_stats_periodic(sa->nic, &port->mac_stats_dma_mem, 0, B_FALSE); @@ -384,11 +390,17 @@ sfc_port_configure(struct sfc_adapter *sa) { const struct rte_eth_dev_data *dev_data = sa->eth_dev->data; struct sfc_port *port = &sa->port; + const struct rte_eth_rxmode *rxmode = &dev_data->dev_conf.rxmode; sfc_log_init(sa, "entry"); port->pdu = EFX_MAC_PDU(dev_data->mtu); + if (rxmode->offloads & RTE_ETH_RX_OFFLOAD_KEEP_CRC) + port->include_fcs = true; + else + port->include_fcs = false; + return 0; } diff --git a/drivers/net/sfc/sfc_rx.c b/drivers/net/sfc/sfc_rx.c index edd0f0c03842..f80771778c64 100644 --- a/drivers/net/sfc/sfc_rx.c +++ b/drivers/net/sfc/sfc_rx.c @@ -655,7 +655,8 @@ struct sfc_dp_rx sfc_efx_rx = { .features = SFC_DP_RX_FEAT_INTR, .dev_offload_capa = RTE_ETH_RX_OFFLOAD_CHECKSUM | RTE_ETH_RX_OFFLOAD_RSS_HASH, - .queue_offload_capa = RTE_ETH_RX_OFFLOAD_SCATTER, + .queue_offload_capa = RTE_ETH_RX_OFFLOAD_SCATTER | + RTE_ETH_RX_OFFLOAD_KEEP_CRC, .qsize_up_rings = sfc_efx_rx_qsize_up_rings, .qcreate = sfc_efx_rx_qcreate, .qdestroy = sfc_efx_rx_qdestroy, @@ -938,6 +939,9 @@ sfc_rx_get_offload_mask(struct sfc_adapter *sa) if (encp->enc_tunnel_encapsulations_supported == 0) no_caps |= RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM; + if (encp->enc_rx_include_fcs_supported == 0) + no_caps |= RTE_ETH_RX_OFFLOAD_KEEP_CRC; + return ~no_caps; }