From patchwork Thu Oct 31 01:18:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mingjin Ye X-Patchwork-Id: 147848 X-Patchwork-Delegate: bruce.richardson@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id ACD6445C18; Thu, 31 Oct 2024 02:40:53 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 88B8A4350E; Thu, 31 Oct 2024 02:40:53 +0100 (CET) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.9]) by mails.dpdk.org (Postfix) with ESMTP id B0B5B433A9 for ; Thu, 31 Oct 2024 02:40:52 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1730338853; x=1761874853; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=HF8GkHYc+XqZvLMNH+wCDzqH/mSv+H1s+a7dPg2fzks=; b=hOv0VmSOmbeuoLcpxdbwPubonqu3vZ0wbnByolknqkhbs0hhgAJUYQkF zCm725e0seumjOIbRLpza1KrKCZx6CN4ltwI3aPZPgis6Ei77DeQyu7SN rvVKDzg0WaZLza2++RVFTnkEcLe0OczWn1MALVLEQ2QMehbSiQ4TWb+xB aeY13xTjHEXOP82RhQW8M8RwakChmy/pbbtazkm1WP87PqzC2ds+Ex9z7 zDHO5LasSAAAZ5nexgytWZx3FaEDTY3v/r5HHst1pLiURzcFlrpWbYgwu /z04SuwGJB0uZXCcDLTcIT5XKhBVtVB0uCUuvHYhigx89LctB7p6A/qky Q==; X-CSE-ConnectionGUID: BfVH+8ltQTWdmaCbiTLrmA== X-CSE-MsgGUID: 6WCLQ9RDQvW1s5MKLMwsRw== X-IronPort-AV: E=McAfee;i="6700,10204,11241"; a="40675971" X-IronPort-AV: E=Sophos;i="6.11,246,1725346800"; d="scan'208";a="40675971" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by fmvoesa103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Oct 2024 18:40:52 -0700 X-CSE-ConnectionGUID: QyYWWLkBTXy7HBABMdLWXw== X-CSE-MsgGUID: usLbHMEUSdCixhfQohXfZQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,246,1725346800"; d="scan'208";a="113345768" Received: from unknown (HELO localhost.localdomain) ([10.239.252.253]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Oct 2024 18:40:50 -0700 From: Mingjin Ye To: dev@dpdk.org Cc: Mingjin Ye , Bruce Richardson , Anatoly Burakov Subject: [PATCH] net/ice: enable link speed 200G Date: Thu, 31 Oct 2024 01:18:19 +0000 Message-Id: <20241031011819.2020557-1-mingjinx.ye@intel.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org ICE Enable 200G link speed capability. Fixes: 36afbc269081 ("net/ice: support link speed change") Signed-off-by: Mingjin Ye Acked-by: Bruce Richardson --- drivers/net/ice/ice_ethdev.c | 11 ++++++++++- drivers/net/ice/ice_ethdev.h | 12 ++++++++++++ 2 files changed, 22 insertions(+), 1 deletion(-) diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c index d5e94a6685..ce955ebbc2 100644 --- a/drivers/net/ice/ice_ethdev.c +++ b/drivers/net/ice/ice_ethdev.c @@ -4160,6 +4160,9 @@ ice_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) ICE_PHY_TYPE_SUPPORT_100G_HIGH(phy_type_high)) dev_info->speed_capa |= RTE_ETH_LINK_SPEED_100G; + if (ICE_PHY_TYPE_SUPPORT_200G_HIGH(phy_type_high)) + dev_info->speed_capa |= RTE_ETH_LINK_SPEED_200G; + dev_info->nb_rx_queues = dev->data->nb_rx_queues; dev_info->nb_tx_queues = dev->data->nb_tx_queues; @@ -4285,6 +4288,9 @@ ice_link_update(struct rte_eth_dev *dev, int wait_to_complete) case ICE_AQ_LINK_SPEED_100GB: link.link_speed = RTE_ETH_SPEED_NUM_100G; break; + case ICE_AQ_LINK_SPEED_200GB: + link.link_speed = RTE_ETH_SPEED_NUM_200G; + break; case ICE_AQ_LINK_SPEED_UNKNOWN: PMD_DRV_LOG(ERR, "Unknown link speed"); link.link_speed = RTE_ETH_SPEED_NUM_UNKNOWN; @@ -4311,6 +4317,8 @@ ice_parse_link_speeds(uint16_t link_speeds) { uint16_t link_speed = ICE_AQ_LINK_SPEED_UNKNOWN; + if (link_speeds & RTE_ETH_LINK_SPEED_200G) + link_speed |= ICE_AQ_LINK_SPEED_200GB; if (link_speeds & RTE_ETH_LINK_SPEED_100G) link_speed |= ICE_AQ_LINK_SPEED_100GB; if (link_speeds & RTE_ETH_LINK_SPEED_50G) @@ -4343,7 +4351,8 @@ ice_apply_link_speed(struct rte_eth_dev *dev) struct rte_eth_conf *conf = &dev->data->dev_conf; if (conf->link_speeds == RTE_ETH_LINK_SPEED_AUTONEG) { - conf->link_speeds = RTE_ETH_LINK_SPEED_100G | + conf->link_speeds = RTE_ETH_LINK_SPEED_200G | + RTE_ETH_LINK_SPEED_100G | RTE_ETH_LINK_SPEED_50G | RTE_ETH_LINK_SPEED_40G | RTE_ETH_LINK_SPEED_25G | diff --git a/drivers/net/ice/ice_ethdev.h b/drivers/net/ice/ice_ethdev.h index 076cf595e8..61d8c275cf 100644 --- a/drivers/net/ice/ice_ethdev.h +++ b/drivers/net/ice/ice_ethdev.h @@ -741,6 +741,18 @@ ice_align_floor(int n) ((phy_type) & ICE_PHY_TYPE_HIGH_100G_AUI2_AOC_ACC) || \ ((phy_type) & ICE_PHY_TYPE_HIGH_100G_AUI2)) +#define ICE_PHY_TYPE_SUPPORT_200G_HIGH(phy_type) \ + (((phy_type) & ICE_PHY_TYPE_HIGH_200G_CR4_PAM4) || \ + ((phy_type) & ICE_PHY_TYPE_HIGH_200G_SR4) || \ + ((phy_type) & ICE_PHY_TYPE_HIGH_200G_FR4) || \ + ((phy_type) & ICE_PHY_TYPE_HIGH_200G_LR4) || \ + ((phy_type) & ICE_PHY_TYPE_HIGH_200G_DR4) || \ + ((phy_type) & ICE_PHY_TYPE_HIGH_200G_KR4_PAM4) || \ + ((phy_type) & ICE_PHY_TYPE_HIGH_200G_AUI4_AOC_ACC) || \ + ((phy_type) & ICE_PHY_TYPE_HIGH_200G_AUI4) || \ + ((phy_type) & ICE_PHY_TYPE_HIGH_200G_AUI8_AOC_ACC) || \ + ((phy_type) & ICE_PHY_TYPE_HIGH_200G_AUI8)) + __rte_experimental int rte_pmd_ice_dump_package(uint16_t port, uint8_t **buff, uint32_t *size);