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GET /api/patches/104856/?format=api
{ "id": 104856, "url": "http://patchwork.dpdk.org/api/patches/104856/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20211203163627.3254236-1-rbhansali@marvell.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20211203163627.3254236-1-rbhansali@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20211203163627.3254236-1-rbhansali@marvell.com", "date": "2021-12-03T16:36:26", "name": "[1/2] common/cnxk: get head-tail of Rx and Tx queues", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "e61c6cbd89d0168e075f881db75e53adc40c8031", "submitter": { "id": 2436, "url": "http://patchwork.dpdk.org/api/people/2436/?format=api", "name": "Rahul Bhansali", "email": "rbhansali@marvell.com" }, "delegate": { "id": 310, "url": "http://patchwork.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20211203163627.3254236-1-rbhansali@marvell.com/mbox/", "series": [ { "id": 20851, "url": "http://patchwork.dpdk.org/api/series/20851/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=20851", "date": "2021-12-03T16:36:26", "name": "[1/2] common/cnxk: get head-tail of Rx and Tx queues", "version": 1, "mbox": "http://patchwork.dpdk.org/series/20851/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/104856/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/104856/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 327C2A0C41;\n\tFri, 3 Dec 2021 17:36:42 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id BAE6F4067B;\n\tFri, 3 Dec 2021 17:36:41 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id 4835740041\n for <dev@dpdk.org>; Fri, 3 Dec 2021 17:36:40 +0100 (CET)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id\n 1B38QB75014937;\n Fri, 3 Dec 2021 08:36:34 -0800", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3cqfqq9q4w-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Fri, 03 Dec 2021 08:36:34 -0800", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Fri, 3 Dec 2021 08:36:32 -0800", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Fri, 3 Dec 2021 08:36:32 -0800", "from localhost.localdomain (unknown [10.28.48.107])\n by maili.marvell.com (Postfix) with ESMTP id 5831A3F703F;\n Fri, 3 Dec 2021 08:36:30 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : mime-version : content-transfer-encoding :\n content-type; s=pfpt0220; bh=anv6kiX5WwOFNn93+WCMkKvFnZYV2X/EgAv+wCGWRkA=;\n b=SMQiosX+DefKhpPRX/WFl7/B51MyZ2ol+oHdVO0B+fMhby35DLX421aV0uDL+C5Z3TS7\n 8W2OwgARwRzrYA10QRlMnmLt0F4r6P29W1+g2W+Rq9uBwAfsO3jHhnQuVzWTsykaUdWW\n 6x5+AuoexHMVQfDcWYwr4OaWmpo3KHYpPMHk+J1oIQySWJrhqbO4RjdtFqNFs7yVqml0\n Z2GyKHQBhPfbog8iMlQkJuN6w91tNJrQsx9xrYP9uH6xPcDXS0eAiwGoZpGk8LYTvOvS\n 0cc8Y6BHGRTTg05Wu8Sq50PgHXa2PQkmLRJGYtw2t9tyj+9xLSyrLYeos94YcnsizrPp nw==", "From": "Rahul Bhansali <rbhansali@marvell.com>", "To": "<dev@dpdk.org>, Nithin Dabilpuram <ndabilpuram@marvell.com>, Kiran Kumar K\n <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>, Satha Rao\n <skoteshwar@marvell.com>, Ray Kinsella <mdr@ashroe.eu>", "CC": "<jerinj@marvell.com>, Rahul Bhansali <rbhansali@marvell.com>", "Subject": "[PATCH 1/2] common/cnxk: get head-tail of Rx and Tx queues", "Date": "Fri, 3 Dec 2021 22:06:26 +0530", "Message-ID": "<20211203163627.3254236-1-rbhansali@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "uY0sgiNIBo7IRMSeFzUSoiktuu6GcAbJ", "X-Proofpoint-ORIG-GUID": "uY0sgiNIBo7IRMSeFzUSoiktuu6GcAbJ", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513\n definitions=2021-12-03_07,2021-12-02_01,2021-12-02_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Adds roc APIs roc_nix_cq_head_tail_get, roc_nix_sq_head_tail_get\nto get head-tail of receive and transmit queue respectively.\n\nSigned-off-by: Rahul Bhansali <rbhansali@marvell.com>\n---\n drivers/common/cnxk/roc_nix.h | 4 +++\n drivers/common/cnxk/roc_nix_queue.c | 53 +++++++++++++++++++++++++++++\n drivers/common/cnxk/version.map | 2 ++\n 3 files changed, 59 insertions(+)", "diff": "diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h\nindex 69a5e8e7b4..d79abfef9f 100644\n--- a/drivers/common/cnxk/roc_nix.h\n+++ b/drivers/common/cnxk/roc_nix.h\n@@ -795,8 +795,12 @@ int __roc_api roc_nix_rq_ena_dis(struct roc_nix_rq *rq, bool enable);\n int __roc_api roc_nix_rq_fini(struct roc_nix_rq *rq);\n int __roc_api roc_nix_cq_init(struct roc_nix *roc_nix, struct roc_nix_cq *cq);\n int __roc_api roc_nix_cq_fini(struct roc_nix_cq *cq);\n+void __roc_api roc_nix_cq_head_tail_get(struct roc_nix *roc_nix, uint16_t qid,\n+\t\t\t\t\tuint32_t *head, uint32_t *tail);\n int __roc_api roc_nix_sq_init(struct roc_nix *roc_nix, struct roc_nix_sq *sq);\n int __roc_api roc_nix_sq_fini(struct roc_nix_sq *sq);\n+void __roc_api roc_nix_sq_head_tail_get(struct roc_nix *roc_nix, uint16_t qid,\n+\t\t\t\t\tuint32_t *head, uint32_t *tail);\n \n /* PTP */\n int __roc_api roc_nix_ptp_rx_ena_dis(struct roc_nix *roc_nix, int enable);\ndiff --git a/drivers/common/cnxk/roc_nix_queue.c b/drivers/common/cnxk/roc_nix_queue.c\nindex c8c8401d81..9fc26da5c6 100644\n--- a/drivers/common/cnxk/roc_nix_queue.c\n+++ b/drivers/common/cnxk/roc_nix_queue.c\n@@ -959,3 +959,56 @@ roc_nix_sq_fini(struct roc_nix_sq *sq)\n \n \treturn rc;\n }\n+\n+void\n+roc_nix_cq_head_tail_get(struct roc_nix *roc_nix, uint16_t qid, uint32_t *head,\n+\t\t\t uint32_t *tail)\n+{\n+\tstruct nix *nix = roc_nix_to_nix_priv(roc_nix);\n+\tuint64_t reg, val;\n+\tint64_t *addr;\n+\n+\tif (head == NULL || tail == NULL)\n+\t\treturn;\n+\n+\treg = (((uint64_t)qid) << 32);\n+\taddr = (int64_t *)(nix->base + NIX_LF_CQ_OP_STATUS);\n+\tval = roc_atomic64_add_nosync(reg, addr);\n+\tif (val &\n+\t (BIT_ULL(NIX_CQ_OP_STAT_OP_ERR) | BIT_ULL(NIX_CQ_OP_STAT_CQ_ERR)))\n+\t\tval = 0;\n+\n+\t*tail = (uint32_t)(val & 0xFFFFF);\n+\t*head = (uint32_t)((val >> 20) & 0xFFFFF);\n+}\n+\n+void\n+roc_nix_sq_head_tail_get(struct roc_nix *roc_nix, uint16_t qid, uint32_t *head,\n+\t\t\t uint32_t *tail)\n+{\n+\tstruct nix *nix = roc_nix_to_nix_priv(roc_nix);\n+\tstruct roc_nix_sq *sq = nix->sqs[qid];\n+\tuint16_t sqes_per_sqb, sqb_cnt;\n+\tuint64_t reg, val;\n+\tint64_t *addr;\n+\n+\tif (head == NULL || tail == NULL)\n+\t\treturn;\n+\n+\treg = (((uint64_t)qid) << 32);\n+\taddr = (int64_t *)(nix->base + NIX_LF_SQ_OP_STATUS);\n+\tval = roc_atomic64_add_nosync(reg, addr);\n+\tif (val & BIT_ULL(NIX_CQ_OP_STAT_OP_ERR)) {\n+\t\tval = 0;\n+\t\treturn;\n+\t}\n+\n+\t*tail = (uint32_t)((val >> 28) & 0x3F);\n+\t*head = (uint32_t)((val >> 20) & 0x3F);\n+\tsqb_cnt = (uint16_t)(val & 0xFFFF);\n+\n+\tsqes_per_sqb = 1 << sq->sqes_per_sqb_log2;\n+\n+\t/* Update tail index as per used sqb count */\n+\t*tail += (sqes_per_sqb * (sqb_cnt - 1));\n+}\ndiff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map\nindex 07c6720f0c..a9dba47e0e 100644\n--- a/drivers/common/cnxk/version.map\n+++ b/drivers/common/cnxk/version.map\n@@ -107,6 +107,7 @@ INTERNAL {\n \troc_nix_bpf_timeunit_get;\n \troc_nix_cq_dump;\n \troc_nix_cq_fini;\n+\troc_nix_cq_head_tail_get;\n \troc_nix_cq_init;\n \troc_nix_cqe_dump;\n \troc_nix_dev_fini;\n@@ -222,6 +223,7 @@ INTERNAL {\n \troc_nix_rx_queue_intr_enable;\n \troc_nix_sq_dump;\n \troc_nix_sq_fini;\n+\troc_nix_sq_head_tail_get;\n \troc_nix_sq_init;\n \troc_nix_stats_get;\n \troc_nix_stats_queue_get;\n", "prefixes": [ "1/2" ] }