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GET /api/patches/105046/?format=api
{ "id": 105046, "url": "http://patchwork.dpdk.org/api/patches/105046/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20211209091342.27017-7-ndabilpuram@marvell.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20211209091342.27017-7-ndabilpuram@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20211209091342.27017-7-ndabilpuram@marvell.com", "date": "2021-12-09T09:13:41", "name": "[7/8] net/cnxk: improve inbound inline error handling for cn9k", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "57e814f406f721460a78a6401482915598da1484", "submitter": { "id": 1202, "url": "http://patchwork.dpdk.org/api/people/1202/?format=api", "name": "Nithin Dabilpuram", "email": "ndabilpuram@marvell.com" }, "delegate": { "id": 310, "url": "http://patchwork.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20211209091342.27017-7-ndabilpuram@marvell.com/mbox/", "series": [ { "id": 20897, "url": "http://patchwork.dpdk.org/api/series/20897/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=20897", "date": "2021-12-09T09:13:35", "name": "[1/8] common/cnxk: fix shift offset for tl3 length disable", "version": 1, "mbox": "http://patchwork.dpdk.org/series/20897/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/105046/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/105046/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 23A66A00C2;\n\tThu, 9 Dec 2021 10:14:33 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 23863426DD;\n\tThu, 9 Dec 2021 10:14:11 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 1B91E42707\n for <dev@dpdk.org>; Thu, 9 Dec 2021 10:14:09 +0100 (CET)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id\n 1B97bEvn009585\n for <dev@dpdk.org>; Thu, 9 Dec 2021 01:14:08 -0800", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3cudjt0aq7-2\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Thu, 09 Dec 2021 01:14:08 -0800", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Thu, 9 Dec 2021 01:14:06 -0800", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Thu, 9 Dec 2021 01:14:06 -0800", "from hyd1588t430.marvell.com (unknown [10.29.52.204])\n by maili.marvell.com (Postfix) with ESMTP id 4DB873F7054;\n Thu, 9 Dec 2021 01:14:05 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=lCHGoeacr4/DihoB20gvprz62Bj47ofupmSvtvFcFUQ=;\n b=C4IICYtdUSRW6sq7TD1ZSvmhIE+hXziQ9sZrQolXRslmUfrmH73Ov8hvQvlSLDmiVHfB\n lXJr/DKPcSQGdDfVjEYf5GVUYkRMAb42fEBW6kJBJWYi/tQQ2/gQkkOhMnaKAEgsuwzv\n hykl2KVn5DsuWC4ldqsRUqcDeasNhn/VwZge0TqXdAA6lDF3+jc6dRXJNQu+giAqzonN\n OXFyV/RSSs0QC5tRdD4oM7JvqXg9dHtItYhlMdbvY2Ym/NWkfmzDNdRLeafJaaNk+619\n hTPYRhcybN9WGg96jX+j3U1wNTh5FzXiVW9RM+VLI7Kw3LFk/Ctb7c4haBVloXHcAqE8 eA==", "From": "Nithin Dabilpuram <ndabilpuram@marvell.com>", "To": "<jerinj@marvell.com>, Nithin Dabilpuram <ndabilpuram@marvell.com>, \"Kiran\n Kumar K\" <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>,\n Satha Rao <skoteshwar@marvell.com>", "CC": "<dev@dpdk.org>", "Subject": "[PATCH 7/8] net/cnxk: improve inbound inline error handling for cn9k", "Date": "Thu, 9 Dec 2021 14:43:41 +0530", "Message-ID": "<20211209091342.27017-7-ndabilpuram@marvell.com>", "X-Mailer": "git-send-email 2.8.4", "In-Reply-To": "<20211209091342.27017-1-ndabilpuram@marvell.com>", "References": "<20211209091342.27017-1-ndabilpuram@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "F8C90PqQX89b-vltpNg9grZfgn_l08lV", "X-Proofpoint-GUID": "F8C90PqQX89b-vltpNg9grZfgn_l08lV", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513\n definitions=2021-12-09_04,2021-12-08_01,2021-12-02_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Improve inbound inline error handling for CN9K in terms of\npacket delivered to application for different kinds of errors.\n\nAlso update udp ports to be used for UDP encapsulation support.\n\nSigned-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>\n---\n drivers/common/cnxk/cnxk_security.c | 6 +++++\n drivers/common/cnxk/roc_ie_on.h | 16 +++++++++++-\n drivers/net/cnxk/cn9k_rx.h | 50 +++++++++++++++++++++++++++++++++++--\n 3 files changed, 69 insertions(+), 3 deletions(-)", "diff": "diff --git a/drivers/common/cnxk/cnxk_security.c b/drivers/common/cnxk/cnxk_security.c\nindex 30562b4..8b4dd1c 100644\n--- a/drivers/common/cnxk/cnxk_security.c\n+++ b/drivers/common/cnxk/cnxk_security.c\n@@ -710,6 +710,12 @@ cnxk_onf_ipsec_outb_sa_fill(struct roc_onf_ipsec_outb_sa *sa,\n \t\treturn -EINVAL;\n \t}\n \n+\t/* Update udp encap ports */\n+\tif (ipsec_xfrm->options.udp_encap == 1) {\n+\t\tsa->udp_src = 4500;\n+\t\tsa->udp_dst = 4500;\n+\t}\n+\n skip_tunnel_info:\n \trte_wmb();\n \ndiff --git a/drivers/common/cnxk/roc_ie_on.h b/drivers/common/cnxk/roc_ie_on.h\nindex 53591c6..376e698 100644\n--- a/drivers/common/cnxk/roc_ie_on.h\n+++ b/drivers/common/cnxk/roc_ie_on.h\n@@ -188,7 +188,21 @@ struct roc_ie_on_inb_sa {\n #define ROC_IE_ONF_MAJOR_OP_PROCESS_INBOUND_IPSEC 0x26UL\n \n /* Ucode completion codes */\n-#define ROC_IE_ONF_UCC_SUCCESS 0\n+#define ROC_IE_ON_UCC_SUCCESS\t\t 0\n+#define ROC_IE_ON_UCC_ENC_TYPE_ERR\t 0xB1\n+#define ROC_IE_ON_UCC_IP_VER_ERR\t 0xB2\n+#define ROC_IE_ON_UCC_PROTO_ERR\t\t 0xB3\n+#define ROC_IE_ON_UCC_CTX_INVALID\t 0xB4\n+#define ROC_IE_ON_UCC_CTX_DIR_MISMATCH\t 0xB5\n+#define ROC_IE_ON_UCC_IP_PAYLOAD_TYPE_ERR 0xB6\n+#define ROC_IE_ON_UCC_CTX_FLAG_MISMATCH\t 0xB7\n+#define ROC_IE_ON_UCC_SPI_MISMATCH\t 0xBE\n+#define ROC_IE_ON_UCC_IP_CHKSUM_ERR\t 0xBF\n+#define ROC_IE_ON_UCC_AUTH_ERR\t\t 0xC3\n+#define ROC_IE_ON_UCC_PADDING_INVALID\t 0xC4\n+#define ROC_IE_ON_UCC_SA_MISMATCH\t 0xCC\n+#define ROC_IE_ON_UCC_L2_HDR_INFO_ERR\t 0xCF\n+#define ROC_IE_ON_UCC_L2_HDR_LEN_ERR\t 0xE0\n \n struct roc_ie_onf_sa_ctl {\n \tuint32_t spi;\ndiff --git a/drivers/net/cnxk/cn9k_rx.h b/drivers/net/cnxk/cn9k_rx.h\nindex 225bb41..cbb6299 100644\n--- a/drivers/net/cnxk/cn9k_rx.h\n+++ b/drivers/net/cnxk/cn9k_rx.h\n@@ -211,6 +211,52 @@ ipsec_antireplay_check(struct roc_onf_ipsec_inb_sa *sa,\n \treturn rc;\n }\n \n+static inline uint64_t\n+nix_rx_sec_mbuf_err_update(const union nix_rx_parse_u *rx, uint16_t res,\n+\t\t\t uint64_t *rearm_val, uint16_t *len)\n+{\n+\tuint8_t uc_cc = res >> 8;\n+\tuint8_t cc = res & 0xFF;\n+\tuint64_t data_off;\n+\tuint64_t ol_flags;\n+\tuint16_t m_len;\n+\n+\tif (unlikely(cc != CPT_COMP_GOOD))\n+\t\treturn RTE_MBUF_F_RX_SEC_OFFLOAD |\n+\t\t RTE_MBUF_F_RX_SEC_OFFLOAD_FAILED;\n+\n+\tdata_off = *rearm_val & (BIT_ULL(16) - 1);\n+\tm_len = rx->cn9k.pkt_lenm1 + 1;\n+\n+\tswitch (uc_cc) {\n+\tcase ROC_IE_ON_UCC_IP_PAYLOAD_TYPE_ERR:\n+\tcase ROC_IE_ON_UCC_AUTH_ERR:\n+\tcase ROC_IE_ON_UCC_PADDING_INVALID:\n+\t\t/* Adjust data offset to start at copied L2 */\n+\t\tdata_off += ROC_ONF_IPSEC_INB_SPI_SEQ_SZ +\n+\t\t\t ROC_ONF_IPSEC_INB_MAX_L2_SZ;\n+\t\tol_flags = RTE_MBUF_F_RX_SEC_OFFLOAD |\n+\t\t\t RTE_MBUF_F_RX_SEC_OFFLOAD_FAILED;\n+\t\tbreak;\n+\tcase ROC_IE_ON_UCC_CTX_INVALID:\n+\tcase ROC_IE_ON_UCC_SPI_MISMATCH:\n+\tcase ROC_IE_ON_UCC_SA_MISMATCH:\n+\t\t/* Return as normal packet */\n+\t\tol_flags = 0;\n+\t\tbreak;\n+\tdefault:\n+\t\t/* Return as error packet after updating packet lengths */\n+\t\tol_flags = RTE_MBUF_F_RX_SEC_OFFLOAD |\n+\t\t\t RTE_MBUF_F_RX_SEC_OFFLOAD_FAILED;\n+\t\tbreak;\n+\t}\n+\n+\t*len = m_len;\n+\t*rearm_val = *rearm_val & ~(BIT_ULL(16) - 1);\n+\t*rearm_val |= data_off;\n+\treturn ol_flags;\n+}\n+\n static __rte_always_inline uint64_t\n nix_rx_sec_mbuf_update(const struct nix_cqe_hdr_s *cq, struct rte_mbuf *m,\n \t\t uintptr_t sa_base, uint64_t *rearm_val, uint16_t *len)\n@@ -236,8 +282,8 @@ nix_rx_sec_mbuf_update(const struct nix_cqe_hdr_s *cq, struct rte_mbuf *m,\n \n \trte_prefetch0((void *)data);\n \n-\tif (unlikely(res != (CPT_COMP_GOOD | ROC_IE_ONF_UCC_SUCCESS << 8)))\n-\t\treturn RTE_MBUF_F_RX_SEC_OFFLOAD | RTE_MBUF_F_RX_SEC_OFFLOAD_FAILED;\n+\tif (unlikely(res != (CPT_COMP_GOOD | ROC_IE_ON_UCC_SUCCESS << 8)))\n+\t\treturn nix_rx_sec_mbuf_err_update(rx, res, rearm_val, len);\n \n \tdata += lcptr;\n \t/* 20 bits of tag would have the SPI */\n", "prefixes": [ "7/8" ] }