Patch Detail
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Show a patch.
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Update a patch.
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Update a patch.
GET /api/patches/105586/?format=api
{ "id": 105586, "url": "http://patchwork.dpdk.org/api/patches/105586/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20220103160149.1715058-3-gakhil@marvell.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220103160149.1715058-3-gakhil@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220103160149.1715058-3-gakhil@marvell.com", "date": "2022-01-03T16:01:46", "name": "[2/5] net/cnxk: reassembly support", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "b6c796e2a18d5bb4295ab01ea0537dbcf6238823", "submitter": { "id": 2094, "url": "http://patchwork.dpdk.org/api/people/2094/?format=api", "name": "Akhil Goyal", "email": "gakhil@marvell.com" }, "delegate": { "id": 310, "url": "http://patchwork.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20220103160149.1715058-3-gakhil@marvell.com/mbox/", "series": [ { "id": 21053, "url": "http://patchwork.dpdk.org/api/series/21053/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=21053", "date": "2022-01-03T16:01:44", "name": "net/cnxk: support IP reassembly offload", "version": 1, "mbox": "http://patchwork.dpdk.org/series/21053/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/105586/comments/", "check": "warning", "checks": "http://patchwork.dpdk.org/api/patches/105586/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 918A4A04A3;\n\tMon, 3 Jan 2022 17:02:30 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 982A841140;\n\tMon, 3 Jan 2022 17:02:22 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id 8C22A41140\n for <dev@dpdk.org>; Mon, 3 Jan 2022 17:02:20 +0100 (CET)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id\n 203CCe6d013971;\n Mon, 3 Jan 2022 08:02:18 -0800", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3dbmvswuvp-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Mon, 03 Jan 2022 08:02:17 -0800", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Mon, 3 Jan 2022 08:02:15 -0800", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Mon, 3 Jan 2022 08:02:15 -0800", "from localhost.localdomain (unknown [10.28.48.55])\n by maili.marvell.com (Postfix) with ESMTP id 16BE13F705F;\n Mon, 3 Jan 2022 08:02:11 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=Agdj2slaYhBXSyZ4piYBwkNosW8Cx51cvzHhlwIr2cw=;\n b=a00S7sqAWhAtdWFfwPin5lM8RmGLyWdAjXGBlES8ztST0tB5WAOcc2A4ArUi8WEFfWE9\n tmKW18gkC/uT9bOEIa7dYyb0/ua000TnyuMH8l1+EQEG+o1nAh2Zm+uW9gWdDvfhI54Z\n D786e6Uf64iNkagkStSQ0bM/jTEXVxeCw/ZKKOeHMGJMW3gd4AGKnRGxKbytEAesJY4w\n aQ2rEj8WTnFhghrN/ymFk7STmmXDrVJkkD2G+gDf2lYOT9FJwbpJxGPv5ASA2kp3rXGJ\n JCRn+oRJ7CHp0wHiGiRvWzWEexpM6Uxu0GPSCaOJCDB7vPPAsijo7N4bhY4Og0Bpkuhb wQ==", "From": "Akhil Goyal <gakhil@marvell.com>", "To": "<dev@dpdk.org>", "CC": "<anoobj@marvell.com>, <thomas@monjalon.net>, <ferruh.yigit@intel.com>,\n <andrew.rybchenko@oktetlabs.ru>, <olivier.matz@6wind.com>,\n <rosen.xu@intel.com>, <jerinj@marvell.com>, <vvelumuri@marvell.com>,\n <ndabilpuram@marvell.com>", "Subject": "[PATCH 2/5] net/cnxk: reassembly support", "Date": "Mon, 3 Jan 2022 21:31:46 +0530", "Message-ID": "<20220103160149.1715058-3-gakhil@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20220103160149.1715058-1-gakhil@marvell.com>", "References": "<20220103160149.1715058-1-gakhil@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "krj2wJlLmQHMGQEHfzhA8_IZxAJVxBPD", "X-Proofpoint-GUID": "krj2wJlLmQHMGQEHfzhA8_IZxAJVxBPD", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513\n definitions=2022-01-03_06,2022-01-01_01,2021-12-02_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Vidya Sagar Velumuri <vvelumuri@marvell.com>\n\nAdd capability and support for inbound reassembly\nin cnxk driver.\n\nSigned-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>\n---\n drivers/common/cnxk/roc_nix_inl.c | 15 +-\n drivers/event/cnxk/cn10k_eventdev.c | 1 -\n drivers/event/cnxk/cn10k_worker.h | 12 +-\n drivers/event/cnxk/deq/cn10k/deq_128_143.c | 12 +\n .../event/cnxk/deq/cn10k/deq_128_143_burst.c | 14 +\n drivers/event/cnxk/deq/cn10k/deq_128_143_ca.c | 12 +\n .../cnxk/deq/cn10k/deq_128_143_ca_burst.c | 14 +\n .../event/cnxk/deq/cn10k/deq_128_143_ca_seg.c | 12 +\n .../cnxk/deq/cn10k/deq_128_143_ca_seg_burst.c | 14 +\n .../event/cnxk/deq/cn10k/deq_128_143_ca_tmo.c | 12 +\n .../cnxk/deq/cn10k/deq_128_143_ca_tmo_burst.c | 14 +\n .../cnxk/deq/cn10k/deq_128_143_ca_tmo_seg.c | 13 +\n .../deq/cn10k/deq_128_143_ca_tmo_seg_burst.c | 14 +\n .../event/cnxk/deq/cn10k/deq_128_143_dual.c | 12 +\n .../event/cnxk/deq/cn10k/deq_128_143_seg.c | 12 +\n .../cnxk/deq/cn10k/deq_128_143_seg_burst.c | 14 +\n .../event/cnxk/deq/cn10k/deq_128_143_tmo.c | 12 +\n .../cnxk/deq/cn10k/deq_128_143_tmo_burst.c | 14 +\n .../cnxk/deq/cn10k/deq_128_143_tmo_seg.c | 12 +\n .../deq/cn10k/deq_128_143_tmo_seg_burst.c | 14 +\n drivers/event/cnxk/deq/cn10k/deq_144_159.c | 12 +\n .../event/cnxk/deq/cn10k/deq_144_159_burst.c | 14 +\n drivers/event/cnxk/deq/cn10k/deq_144_159_ca.c | 12 +\n .../cnxk/deq/cn10k/deq_144_159_ca_burst.c | 14 +\n .../event/cnxk/deq/cn10k/deq_144_159_ca_seg.c | 12 +\n .../cnxk/deq/cn10k/deq_144_159_ca_seg_burst.c | 14 +\n .../event/cnxk/deq/cn10k/deq_144_159_ca_tmo.c | 12 +\n .../cnxk/deq/cn10k/deq_144_159_ca_tmo_burst.c | 14 +\n .../cnxk/deq/cn10k/deq_144_159_ca_tmo_seg.c | 13 +\n .../deq/cn10k/deq_144_159_ca_tmo_seg_burst.c | 14 +\n .../event/cnxk/deq/cn10k/deq_144_159_dual.c | 12 +\n .../event/cnxk/deq/cn10k/deq_144_159_seg.c | 12 +\n .../cnxk/deq/cn10k/deq_144_159_seg_burst.c | 14 +\n .../event/cnxk/deq/cn10k/deq_144_159_tmo.c | 12 +\n .../cnxk/deq/cn10k/deq_144_159_tmo_burst.c | 14 +\n .../cnxk/deq/cn10k/deq_144_159_tmo_seg.c | 12 +\n .../deq/cn10k/deq_144_159_tmo_seg_burst.c | 14 +\n drivers/event/cnxk/deq/cn10k/deq_160_175.c | 12 +\n .../event/cnxk/deq/cn10k/deq_160_175_burst.c | 14 +\n drivers/event/cnxk/deq/cn10k/deq_160_175_ca.c | 12 +\n .../cnxk/deq/cn10k/deq_160_175_ca_burst.c | 14 +\n .../event/cnxk/deq/cn10k/deq_160_175_ca_seg.c | 12 +\n .../cnxk/deq/cn10k/deq_160_175_ca_seg_burst.c | 14 +\n .../event/cnxk/deq/cn10k/deq_160_175_ca_tmo.c | 12 +\n .../cnxk/deq/cn10k/deq_160_175_ca_tmo_burst.c | 14 +\n .../cnxk/deq/cn10k/deq_160_175_ca_tmo_seg.c | 13 +\n .../deq/cn10k/deq_160_175_ca_tmo_seg_burst.c | 14 +\n .../event/cnxk/deq/cn10k/deq_160_175_dual.c | 12 +\n .../event/cnxk/deq/cn10k/deq_160_175_seg.c | 12 +\n .../cnxk/deq/cn10k/deq_160_175_seg_burst.c | 14 +\n .../event/cnxk/deq/cn10k/deq_160_175_tmo.c | 12 +\n .../cnxk/deq/cn10k/deq_160_175_tmo_burst.c | 14 +\n .../cnxk/deq/cn10k/deq_160_175_tmo_seg.c | 12 +\n .../deq/cn10k/deq_160_175_tmo_seg_burst.c | 14 +\n drivers/event/cnxk/deq/cn10k/deq_176_191.c | 12 +\n .../event/cnxk/deq/cn10k/deq_176_191_burst.c | 14 +\n drivers/event/cnxk/deq/cn10k/deq_176_191_ca.c | 12 +\n .../cnxk/deq/cn10k/deq_176_191_ca_burst.c | 14 +\n .../event/cnxk/deq/cn10k/deq_176_191_ca_seg.c | 12 +\n .../cnxk/deq/cn10k/deq_176_191_ca_seg_burst.c | 14 +\n .../event/cnxk/deq/cn10k/deq_176_191_ca_tmo.c | 12 +\n .../cnxk/deq/cn10k/deq_176_191_ca_tmo_burst.c | 14 +\n .../cnxk/deq/cn10k/deq_176_191_ca_tmo_seg.c | 13 +\n .../deq/cn10k/deq_176_191_ca_tmo_seg_burst.c | 14 +\n .../event/cnxk/deq/cn10k/deq_176_191_dual.c | 12 +\n .../event/cnxk/deq/cn10k/deq_176_191_seg.c | 12 +\n .../cnxk/deq/cn10k/deq_176_191_seg_burst.c | 14 +\n .../event/cnxk/deq/cn10k/deq_176_191_tmo.c | 12 +\n .../cnxk/deq/cn10k/deq_176_191_tmo_burst.c | 14 +\n .../cnxk/deq/cn10k/deq_176_191_tmo_seg.c | 12 +\n .../deq/cn10k/deq_176_191_tmo_seg_burst.c | 14 +\n drivers/event/cnxk/deq/cn10k/deq_192_207.c | 12 +\n .../event/cnxk/deq/cn10k/deq_192_207_burst.c | 14 +\n drivers/event/cnxk/deq/cn10k/deq_192_207_ca.c | 12 +\n .../cnxk/deq/cn10k/deq_192_207_ca_burst.c | 14 +\n .../event/cnxk/deq/cn10k/deq_192_207_ca_seg.c | 12 +\n .../cnxk/deq/cn10k/deq_192_207_ca_seg_burst.c | 14 +\n .../event/cnxk/deq/cn10k/deq_192_207_ca_tmo.c | 12 +\n .../cnxk/deq/cn10k/deq_192_207_ca_tmo_burst.c | 14 +\n .../cnxk/deq/cn10k/deq_192_207_ca_tmo_seg.c | 13 +\n .../deq/cn10k/deq_192_207_ca_tmo_seg_burst.c | 14 +\n .../event/cnxk/deq/cn10k/deq_192_207_dual.c | 12 +\n .../event/cnxk/deq/cn10k/deq_192_207_seg.c | 12 +\n .../cnxk/deq/cn10k/deq_192_207_seg_burst.c | 14 +\n .../event/cnxk/deq/cn10k/deq_192_207_tmo.c | 12 +\n .../cnxk/deq/cn10k/deq_192_207_tmo_burst.c | 14 +\n .../cnxk/deq/cn10k/deq_192_207_tmo_seg.c | 12 +\n .../deq/cn10k/deq_192_207_tmo_seg_burst.c | 14 +\n drivers/event/cnxk/deq/cn10k/deq_208_223.c | 12 +\n .../event/cnxk/deq/cn10k/deq_208_223_burst.c | 14 +\n drivers/event/cnxk/deq/cn10k/deq_208_223_ca.c | 12 +\n .../cnxk/deq/cn10k/deq_208_223_ca_burst.c | 14 +\n .../event/cnxk/deq/cn10k/deq_208_223_ca_seg.c | 12 +\n .../cnxk/deq/cn10k/deq_208_223_ca_seg_burst.c | 14 +\n .../event/cnxk/deq/cn10k/deq_208_223_ca_tmo.c | 12 +\n .../cnxk/deq/cn10k/deq_208_223_ca_tmo_burst.c | 14 +\n .../cnxk/deq/cn10k/deq_208_223_ca_tmo_seg.c | 13 +\n .../deq/cn10k/deq_208_223_ca_tmo_seg_burst.c | 14 +\n .../event/cnxk/deq/cn10k/deq_208_223_dual.c | 12 +\n .../event/cnxk/deq/cn10k/deq_208_223_seg.c | 12 +\n .../cnxk/deq/cn10k/deq_208_223_seg_burst.c | 14 +\n .../event/cnxk/deq/cn10k/deq_208_223_tmo.c | 12 +\n .../cnxk/deq/cn10k/deq_208_223_tmo_burst.c | 14 +\n .../cnxk/deq/cn10k/deq_208_223_tmo_seg.c | 12 +\n .../deq/cn10k/deq_208_223_tmo_seg_burst.c | 14 +\n drivers/event/cnxk/deq/cn10k/deq_224_239.c | 12 +\n .../event/cnxk/deq/cn10k/deq_224_239_burst.c | 14 +\n drivers/event/cnxk/deq/cn10k/deq_224_239_ca.c | 12 +\n .../cnxk/deq/cn10k/deq_224_239_ca_burst.c | 14 +\n .../event/cnxk/deq/cn10k/deq_224_239_ca_seg.c | 12 +\n .../cnxk/deq/cn10k/deq_224_239_ca_seg_burst.c | 14 +\n .../event/cnxk/deq/cn10k/deq_224_239_ca_tmo.c | 12 +\n .../cnxk/deq/cn10k/deq_224_239_ca_tmo_burst.c | 14 +\n .../cnxk/deq/cn10k/deq_224_239_ca_tmo_seg.c | 13 +\n .../deq/cn10k/deq_224_239_ca_tmo_seg_burst.c | 14 +\n .../event/cnxk/deq/cn10k/deq_224_239_dual.c | 12 +\n .../event/cnxk/deq/cn10k/deq_224_239_seg.c | 12 +\n .../cnxk/deq/cn10k/deq_224_239_seg_burst.c | 14 +\n .../event/cnxk/deq/cn10k/deq_224_239_tmo.c | 12 +\n .../cnxk/deq/cn10k/deq_224_239_tmo_burst.c | 14 +\n .../cnxk/deq/cn10k/deq_224_239_tmo_seg.c | 12 +\n .../deq/cn10k/deq_224_239_tmo_seg_burst.c | 14 +\n drivers/event/cnxk/deq/cn10k/deq_240_255.c | 12 +\n .../event/cnxk/deq/cn10k/deq_240_255_burst.c | 14 +\n drivers/event/cnxk/deq/cn10k/deq_240_255_ca.c | 12 +\n .../cnxk/deq/cn10k/deq_240_255_ca_burst.c | 14 +\n .../event/cnxk/deq/cn10k/deq_240_255_ca_seg.c | 12 +\n .../cnxk/deq/cn10k/deq_240_255_ca_seg_burst.c | 14 +\n .../event/cnxk/deq/cn10k/deq_240_255_ca_tmo.c | 12 +\n .../cnxk/deq/cn10k/deq_240_255_ca_tmo_burst.c | 14 +\n .../cnxk/deq/cn10k/deq_240_255_ca_tmo_seg.c | 13 +\n .../deq/cn10k/deq_240_255_ca_tmo_seg_burst.c | 14 +\n .../event/cnxk/deq/cn10k/deq_240_255_dual.c | 12 +\n .../event/cnxk/deq/cn10k/deq_240_255_seg.c | 12 +\n .../cnxk/deq/cn10k/deq_240_255_seg_burst.c | 14 +\n .../event/cnxk/deq/cn10k/deq_240_255_tmo.c | 12 +\n .../cnxk/deq/cn10k/deq_240_255_tmo_burst.c | 14 +\n .../cnxk/deq/cn10k/deq_240_255_tmo_seg.c | 12 +\n .../deq/cn10k/deq_240_255_tmo_seg_burst.c | 14 +\n drivers/event/cnxk/meson.build | 128 ++++\n drivers/net/cnxk/cn10k_ethdev.c | 16 +\n drivers/net/cnxk/cn10k_rx.c | 35 +-\n drivers/net/cnxk/cn10k_rx.h | 664 +++++++++++++++++-\n drivers/net/cnxk/cnxk_ethdev.c | 3 +\n drivers/net/cnxk/cnxk_ethdev_ops.c | 5 +\n drivers/net/cnxk/meson.build | 32 +\n drivers/net/cnxk/rx/cn10k/rx_128_143.c | 11 +\n drivers/net/cnxk/rx/cn10k/rx_128_143_mseg.c | 11 +\n drivers/net/cnxk/rx/cn10k/rx_128_143_vec.c | 11 +\n .../net/cnxk/rx/cn10k/rx_128_143_vec_mseg.c | 12 +\n drivers/net/cnxk/rx/cn10k/rx_144_159.c | 11 +\n drivers/net/cnxk/rx/cn10k/rx_144_159_mseg.c | 11 +\n drivers/net/cnxk/rx/cn10k/rx_144_159_vec.c | 11 +\n .../net/cnxk/rx/cn10k/rx_144_159_vec_mseg.c | 12 +\n drivers/net/cnxk/rx/cn10k/rx_160_175.c | 11 +\n drivers/net/cnxk/rx/cn10k/rx_160_175_mseg.c | 11 +\n drivers/net/cnxk/rx/cn10k/rx_160_175_vec.c | 11 +\n .../net/cnxk/rx/cn10k/rx_160_175_vec_mseg.c | 12 +\n drivers/net/cnxk/rx/cn10k/rx_176_191.c | 11 +\n drivers/net/cnxk/rx/cn10k/rx_176_191_mseg.c | 11 +\n drivers/net/cnxk/rx/cn10k/rx_176_191_vec.c | 11 +\n .../net/cnxk/rx/cn10k/rx_176_191_vec_mseg.c | 12 +\n drivers/net/cnxk/rx/cn10k/rx_192_207.c | 11 +\n drivers/net/cnxk/rx/cn10k/rx_192_207_mseg.c | 11 +\n drivers/net/cnxk/rx/cn10k/rx_192_207_vec.c | 11 +\n .../net/cnxk/rx/cn10k/rx_192_207_vec_mseg.c | 12 +\n drivers/net/cnxk/rx/cn10k/rx_208_223.c | 11 +\n drivers/net/cnxk/rx/cn10k/rx_208_223_mseg.c | 11 +\n drivers/net/cnxk/rx/cn10k/rx_208_223_vec.c | 11 +\n .../net/cnxk/rx/cn10k/rx_208_223_vec_mseg.c | 12 +\n drivers/net/cnxk/rx/cn10k/rx_224_239.c | 11 +\n drivers/net/cnxk/rx/cn10k/rx_224_239_mseg.c | 11 +\n drivers/net/cnxk/rx/cn10k/rx_224_239_vec.c | 11 +\n .../net/cnxk/rx/cn10k/rx_224_239_vec_mseg.c | 12 +\n drivers/net/cnxk/rx/cn10k/rx_240_255.c | 11 +\n drivers/net/cnxk/rx/cn10k/rx_240_255_mseg.c | 11 +\n drivers/net/cnxk/rx/cn10k/rx_240_255_vec.c | 11 +\n .../net/cnxk/rx/cn10k/rx_240_255_vec_mseg.c | 12 +\n 178 files changed, 2987 insertions(+), 52 deletions(-)\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_128_143.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_128_143_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_128_143_ca.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_128_143_ca_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_128_143_ca_seg.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_128_143_ca_seg_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_128_143_ca_tmo.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_128_143_ca_tmo_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_128_143_ca_tmo_seg.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_128_143_ca_tmo_seg_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_128_143_dual.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_128_143_seg.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_128_143_seg_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_128_143_tmo.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_128_143_tmo_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_128_143_tmo_seg.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_128_143_tmo_seg_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_144_159.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_144_159_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_144_159_ca.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_144_159_ca_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_144_159_ca_seg.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_144_159_ca_seg_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_144_159_ca_tmo.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_144_159_ca_tmo_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_144_159_ca_tmo_seg.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_144_159_ca_tmo_seg_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_144_159_dual.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_144_159_seg.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_144_159_seg_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_144_159_tmo.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_144_159_tmo_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_144_159_tmo_seg.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_144_159_tmo_seg_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_160_175.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_160_175_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_160_175_ca.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_160_175_ca_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_160_175_ca_seg.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_160_175_ca_seg_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_160_175_ca_tmo.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_160_175_ca_tmo_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_160_175_ca_tmo_seg.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_160_175_ca_tmo_seg_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_160_175_dual.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_160_175_seg.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_160_175_seg_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_160_175_tmo.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_160_175_tmo_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_160_175_tmo_seg.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_160_175_tmo_seg_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_176_191.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_176_191_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_176_191_ca.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_176_191_ca_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_176_191_ca_seg.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_176_191_ca_seg_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_176_191_ca_tmo.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_176_191_ca_tmo_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_176_191_ca_tmo_seg.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_176_191_ca_tmo_seg_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_176_191_dual.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_176_191_seg.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_176_191_seg_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_176_191_tmo.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_176_191_tmo_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_176_191_tmo_seg.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_176_191_tmo_seg_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_192_207.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_192_207_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_192_207_ca.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_192_207_ca_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_192_207_ca_seg.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_192_207_ca_seg_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_192_207_ca_tmo.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_192_207_ca_tmo_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_192_207_ca_tmo_seg.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_192_207_ca_tmo_seg_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_192_207_dual.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_192_207_seg.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_192_207_seg_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_192_207_tmo.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_192_207_tmo_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_192_207_tmo_seg.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_192_207_tmo_seg_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_208_223.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_208_223_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_208_223_ca.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_208_223_ca_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_208_223_ca_seg.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_208_223_ca_seg_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_208_223_ca_tmo.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_208_223_ca_tmo_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_208_223_ca_tmo_seg.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_208_223_ca_tmo_seg_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_208_223_dual.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_208_223_seg.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_208_223_seg_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_208_223_tmo.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_208_223_tmo_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_208_223_tmo_seg.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_208_223_tmo_seg_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_224_239.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_224_239_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_224_239_ca.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_224_239_ca_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_224_239_ca_seg.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_224_239_ca_seg_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_224_239_ca_tmo.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_224_239_ca_tmo_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_224_239_ca_tmo_seg.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_224_239_ca_tmo_seg_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_224_239_dual.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_224_239_seg.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_224_239_seg_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_224_239_tmo.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_224_239_tmo_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_224_239_tmo_seg.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_224_239_tmo_seg_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_240_255.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_240_255_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_240_255_ca.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_240_255_ca_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_240_255_ca_seg.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_240_255_ca_seg_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_240_255_ca_tmo.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_240_255_ca_tmo_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_240_255_ca_tmo_seg.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_240_255_ca_tmo_seg_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_240_255_dual.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_240_255_seg.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_240_255_seg_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_240_255_tmo.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_240_255_tmo_burst.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_240_255_tmo_seg.c\n create mode 100644 drivers/event/cnxk/deq/cn10k/deq_240_255_tmo_seg_burst.c\n create mode 100644 drivers/net/cnxk/rx/cn10k/rx_128_143.c\n create mode 100644 drivers/net/cnxk/rx/cn10k/rx_128_143_mseg.c\n create mode 100644 drivers/net/cnxk/rx/cn10k/rx_128_143_vec.c\n create mode 100644 drivers/net/cnxk/rx/cn10k/rx_128_143_vec_mseg.c\n create mode 100644 drivers/net/cnxk/rx/cn10k/rx_144_159.c\n create mode 100644 drivers/net/cnxk/rx/cn10k/rx_144_159_mseg.c\n create mode 100644 drivers/net/cnxk/rx/cn10k/rx_144_159_vec.c\n create mode 100644 drivers/net/cnxk/rx/cn10k/rx_144_159_vec_mseg.c\n create mode 100644 drivers/net/cnxk/rx/cn10k/rx_160_175.c\n create mode 100644 drivers/net/cnxk/rx/cn10k/rx_160_175_mseg.c\n create mode 100644 drivers/net/cnxk/rx/cn10k/rx_160_175_vec.c\n create mode 100644 drivers/net/cnxk/rx/cn10k/rx_160_175_vec_mseg.c\n create mode 100644 drivers/net/cnxk/rx/cn10k/rx_176_191.c\n create mode 100644 drivers/net/cnxk/rx/cn10k/rx_176_191_mseg.c\n create mode 100644 drivers/net/cnxk/rx/cn10k/rx_176_191_vec.c\n create mode 100644 drivers/net/cnxk/rx/cn10k/rx_176_191_vec_mseg.c\n create mode 100644 drivers/net/cnxk/rx/cn10k/rx_192_207.c\n create mode 100644 drivers/net/cnxk/rx/cn10k/rx_192_207_mseg.c\n create mode 100644 drivers/net/cnxk/rx/cn10k/rx_192_207_vec.c\n create mode 100644 drivers/net/cnxk/rx/cn10k/rx_192_207_vec_mseg.c\n create mode 100644 drivers/net/cnxk/rx/cn10k/rx_208_223.c\n create mode 100644 drivers/net/cnxk/rx/cn10k/rx_208_223_mseg.c\n create mode 100644 drivers/net/cnxk/rx/cn10k/rx_208_223_vec.c\n create mode 100644 drivers/net/cnxk/rx/cn10k/rx_208_223_vec_mseg.c\n create mode 100644 drivers/net/cnxk/rx/cn10k/rx_224_239.c\n create mode 100644 drivers/net/cnxk/rx/cn10k/rx_224_239_mseg.c\n create mode 100644 drivers/net/cnxk/rx/cn10k/rx_224_239_vec.c\n create mode 100644 drivers/net/cnxk/rx/cn10k/rx_224_239_vec_mseg.c\n create mode 100644 drivers/net/cnxk/rx/cn10k/rx_240_255.c\n create mode 100644 drivers/net/cnxk/rx/cn10k/rx_240_255_mseg.c\n create mode 100644 drivers/net/cnxk/rx/cn10k/rx_240_255_vec.c\n create mode 100644 drivers/net/cnxk/rx/cn10k/rx_240_255_vec_mseg.c", "diff": "diff --git a/drivers/common/cnxk/roc_nix_inl.c b/drivers/common/cnxk/roc_nix_inl.c\nindex 6bfd10adde..a06872f6f3 100644\n--- a/drivers/common/cnxk/roc_nix_inl.c\n+++ b/drivers/common/cnxk/roc_nix_inl.c\n@@ -205,21 +205,22 @@ roc_nix_reass_configure(uint32_t max_wait_time, uint16_t max_frags)\n {\n \tstruct idev_cfg *idev = idev_get_cfg();\n \tstruct roc_cpt *roc_cpt;\n-\tstruct roc_cpt_rxc_time_cfg *cfg;\n+\tstruct roc_cpt_rxc_time_cfg cfg;\n \n+\t(void)max_frags;\n \troc_cpt = idev->cpt;\n \tif (!roc_cpt) {\n \t\tplt_err(\"Cannot support inline inbound, cryptodev not probed\");\n \t\treturn -ENOTSUP;\n \t}\n \n-\tcfg->step = (max_wait_time / ROC_NIX_INL_REAS_ACTIVE_LIMIT) * 1000;\n-\tcfg->zombie_limit = ROC_NIX_INL_REAS_ZOMBIE_LIMIT;\n-\tcfg->zombie_thres = ROC_NIX_INL_REAS_ZOMBIE_THRESHOLD;\n-\tcfg->active_limit = ROC_NIX_INL_REAS_ACTIVE_LIMIT;\n-\tcfg->active_thres = ROC_NIX_INL_REAS_ACTIVE_THRESHOLD;\n+\tcfg.step = (max_wait_time / ROC_NIX_INL_REAS_ACTIVE_LIMIT) * 1000;\n+\tcfg.zombie_limit = ROC_NIX_INL_REAS_ZOMBIE_LIMIT;\n+\tcfg.zombie_thres = ROC_NIX_INL_REAS_ZOMBIE_THRESHOLD;\n+\tcfg.active_limit = ROC_NIX_INL_REAS_ACTIVE_LIMIT;\n+\tcfg.active_thres = ROC_NIX_INL_REAS_ACTIVE_THRESHOLD;\n \n-\troc_cpt_rxc_time_cfg(roc_cpt, cfg);\n+\troc_cpt_rxc_time_cfg(roc_cpt, &cfg);\n \treturn 0;\n }\n \ndiff --git a/drivers/event/cnxk/cn10k_eventdev.c b/drivers/event/cnxk/cn10k_eventdev.c\nindex b56426960a..fa5fa518c5 100644\n--- a/drivers/event/cnxk/cn10k_eventdev.c\n+++ b/drivers/event/cnxk/cn10k_eventdev.c\n@@ -330,7 +330,6 @@ cn10k_sso_fp_fns_set(struct rte_eventdev *event_dev)\n \n \tconst event_dequeue_t sso_hws_deq_seg[NIX_RX_OFFLOAD_MAX] = {\n #define R(name, flags) [flags] = cn10k_sso_hws_deq_seg_##name,\n-\n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\ndiff --git a/drivers/event/cnxk/cn10k_worker.h b/drivers/event/cnxk/cn10k_worker.h\nindex 78d029baaa..41ec238ecf 100644\n--- a/drivers/event/cnxk/cn10k_worker.h\n+++ b/drivers/event/cnxk/cn10k_worker.h\n@@ -157,9 +157,11 @@ cn10k_process_vwqe(uintptr_t vwqe, uint16_t port_id, const uint32_t flags,\n \t\t/* Translate meta to mbuf */\n \t\tif (flags & NIX_RX_OFFLOAD_SECURITY_F) {\n \t\t\tconst uint64_t cq_w1 = *((const uint64_t *)cqe + 1);\n+\t\t\tconst uint64_t cq_w5 = *((const uint64_t *)cqe + 5);\n \n-\t\t\tmbuf = nix_sec_meta_to_mbuf_sc(cq_w1, sa_base, laddr,\n-\t\t\t\t\t\t &loff, mbuf, d_off);\n+\t\t\tmbuf = nix_sec_meta_to_mbuf_sc(cq_w1, cq_w5, sa_base, laddr,\n+\t\t\t\t\t\t &loff, mbuf, d_off,\n+\t\t\t\t\t\t flags);\n \t\t}\n \n \t\tcn10k_nix_cqe_to_mbuf(cqe, cqe->tag, mbuf, lookup_mem,\n@@ -231,20 +233,22 @@ cn10k_sso_hws_get_work(struct cn10k_sso_hws *ws, struct rte_event *ev,\n \t\t\t\tuint8_t loff = 0;\n \t\t\t\tuint16_t d_off;\n \t\t\t\tuint64_t cq_w1;\n+\t\t\t\tuint64_t cq_w5;\n \n \t\t\t\tm = (struct rte_mbuf *)mbuf;\n \t\t\t\td_off = (uintptr_t)(m->buf_addr) - (uintptr_t)m;\n \t\t\t\td_off += RTE_PKTMBUF_HEADROOM;\n \n \t\t\t\tcq_w1 = *(uint64_t *)(gw.u64[1] + 8);\n+\t\t\t\tcq_w5 = *(uint64_t *)(gw.u64[1] + 40);\n \n \t\t\t\tsa_base =\n \t\t\t\t\tcnxk_nix_sa_base_get(port, lookup_mem);\n \t\t\t\tsa_base &= ~(ROC_NIX_INL_SA_BASE_ALIGN - 1);\n \n \t\t\t\tmbuf = (uint64_t)nix_sec_meta_to_mbuf_sc(\n-\t\t\t\t\tcq_w1, sa_base, (uintptr_t)&iova, &loff,\n-\t\t\t\t\t(struct rte_mbuf *)mbuf, d_off);\n+\t\t\t\t\tcq_w1, cq_w5, sa_base, (uintptr_t)&iova, &loff,\n+\t\t\t\t\t(struct rte_mbuf *)mbuf, d_off, flags);\n \t\t\t\tif (loff)\n \t\t\t\t\troc_npa_aura_op_free(m->pool->pool_id,\n \t\t\t\t\t\t\t 0, iova);\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_128_143.c b/drivers/event/cnxk/deq/cn10k/deq_128_143.c\nnew file mode 100644\nindex 0000000000..b3bc4f195d\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_128_143.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ(cn10k_sso_hws_deq_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_128_143\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_128_143_burst.c b/drivers/event/cnxk/deq/cn10k/deq_128_143_burst.c\nnew file mode 100644\nindex 0000000000..ebc1e20eec\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_128_143_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_128_143\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_128_143_ca.c b/drivers/event/cnxk/deq/cn10k/deq_128_143_ca.c\nnew file mode 100644\nindex 0000000000..f13499f490\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_128_143_ca.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_CA(cn10k_sso_hws_deq_ca_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_128_143\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_128_143_ca_burst.c b/drivers/event/cnxk/deq/cn10k/deq_128_143_ca_burst.c\nnew file mode 100644\nindex 0000000000..a0fad1ad9b\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_128_143_ca_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_ca_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_ca_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_128_143\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_128_143_ca_seg.c b/drivers/event/cnxk/deq/cn10k/deq_128_143_ca_seg.c\nnew file mode 100644\nindex 0000000000..4cec0c7db5\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_128_143_ca_seg.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_CA_SEG(cn10k_sso_hws_deq_ca_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_128_143\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_128_143_ca_seg_burst.c b/drivers/event/cnxk/deq/cn10k/deq_128_143_ca_seg_burst.c\nnew file mode 100644\nindex 0000000000..728a48cd75\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_128_143_ca_seg_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_ca_seg_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_ca_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_128_143\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_128_143_ca_tmo.c b/drivers/event/cnxk/deq/cn10k/deq_128_143_ca_tmo.c\nnew file mode 100644\nindex 0000000000..cc98821998\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_128_143_ca_tmo.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_TMO_CA(cn10k_sso_hws_deq_tmo_ca_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_128_143\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_128_143_ca_tmo_burst.c b/drivers/event/cnxk/deq/cn10k/deq_128_143_ca_tmo_burst.c\nnew file mode 100644\nindex 0000000000..3d03c71ea2\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_128_143_ca_tmo_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_tmo_ca_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_tmo_ca_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_128_143\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_128_143_ca_tmo_seg.c b/drivers/event/cnxk/deq/cn10k/deq_128_143_ca_tmo_seg.c\nnew file mode 100644\nindex 0000000000..e2788d2d82\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_128_143_ca_tmo_seg.c\n@@ -0,0 +1,13 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_DEQ_TMO_CA_SEG(cn10k_sso_hws_deq_tmo_ca_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_128_143\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_128_143_ca_tmo_seg_burst.c b/drivers/event/cnxk/deq/cn10k/deq_128_143_ca_tmo_seg_burst.c\nnew file mode 100644\nindex 0000000000..3c11c33879\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_128_143_ca_tmo_seg_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_tmo_ca_seg_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_tmo_ca_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_128_143\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_128_143_dual.c b/drivers/event/cnxk/deq/cn10k/deq_128_143_dual.c\nnew file mode 100644\nindex 0000000000..f495bbb02c\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_128_143_dual.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DUAL_DEQ(cn10k_sso_hws_dual_deq_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_128_143\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_128_143_seg.c b/drivers/event/cnxk/deq/cn10k/deq_128_143_seg.c\nnew file mode 100644\nindex 0000000000..9e8226c7af\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_128_143_seg.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_SEG(cn10k_sso_hws_deq_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_128_143\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_128_143_seg_burst.c b/drivers/event/cnxk/deq/cn10k/deq_128_143_seg_burst.c\nnew file mode 100644\nindex 0000000000..c150a758c4\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_128_143_seg_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_SEG_BURST(cn10k_sso_hws_deq_seg_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_128_143\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_128_143_tmo.c b/drivers/event/cnxk/deq/cn10k/deq_128_143_tmo.c\nnew file mode 100644\nindex 0000000000..611bd35f84\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_128_143_tmo.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_TMO(cn10k_sso_hws_deq_tmo_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_128_143\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_128_143_tmo_burst.c b/drivers/event/cnxk/deq/cn10k/deq_128_143_tmo_burst.c\nnew file mode 100644\nindex 0000000000..7c91e0c842\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_128_143_tmo_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_tmo_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_tmo_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_128_143\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_128_143_tmo_seg.c b/drivers/event/cnxk/deq/cn10k/deq_128_143_tmo_seg.c\nnew file mode 100644\nindex 0000000000..7f2d789efc\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_128_143_tmo_seg.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_TMO_SEG(cn10k_sso_hws_deq_tmo_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_128_143\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_128_143_tmo_seg_burst.c b/drivers/event/cnxk/deq/cn10k/deq_128_143_tmo_seg_burst.c\nnew file mode 100644\nindex 0000000000..994fbc17a7\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_128_143_tmo_seg_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_tmo_seg_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_tmo_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_128_143\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_144_159.c b/drivers/event/cnxk/deq/cn10k/deq_144_159.c\nnew file mode 100644\nindex 0000000000..483fa7c372\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_144_159.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ(cn10k_sso_hws_deq_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_144_159\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_144_159_burst.c b/drivers/event/cnxk/deq/cn10k/deq_144_159_burst.c\nnew file mode 100644\nindex 0000000000..e9c2eae8fa\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_144_159_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_144_159\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_144_159_ca.c b/drivers/event/cnxk/deq/cn10k/deq_144_159_ca.c\nnew file mode 100644\nindex 0000000000..eaae80b696\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_144_159_ca.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_CA(cn10k_sso_hws_deq_ca_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_144_159\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_144_159_ca_burst.c b/drivers/event/cnxk/deq/cn10k/deq_144_159_ca_burst.c\nnew file mode 100644\nindex 0000000000..203a8cbb92\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_144_159_ca_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_ca_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_ca_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_144_159\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_144_159_ca_seg.c b/drivers/event/cnxk/deq/cn10k/deq_144_159_ca_seg.c\nnew file mode 100644\nindex 0000000000..b341368d85\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_144_159_ca_seg.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_CA_SEG(cn10k_sso_hws_deq_ca_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_144_159\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_144_159_ca_seg_burst.c b/drivers/event/cnxk/deq/cn10k/deq_144_159_ca_seg_burst.c\nnew file mode 100644\nindex 0000000000..251b13199b\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_144_159_ca_seg_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_ca_seg_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_ca_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_144_159\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_144_159_ca_tmo.c b/drivers/event/cnxk/deq/cn10k/deq_144_159_ca_tmo.c\nnew file mode 100644\nindex 0000000000..16fde955cd\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_144_159_ca_tmo.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_TMO_CA(cn10k_sso_hws_deq_tmo_ca_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_144_159\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_144_159_ca_tmo_burst.c b/drivers/event/cnxk/deq/cn10k/deq_144_159_ca_tmo_burst.c\nnew file mode 100644\nindex 0000000000..f7615615c9\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_144_159_ca_tmo_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_tmo_ca_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_tmo_ca_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_144_159\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_144_159_ca_tmo_seg.c b/drivers/event/cnxk/deq/cn10k/deq_144_159_ca_tmo_seg.c\nnew file mode 100644\nindex 0000000000..d191b1f44f\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_144_159_ca_tmo_seg.c\n@@ -0,0 +1,13 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_DEQ_TMO_CA_SEG(cn10k_sso_hws_deq_tmo_ca_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_144_159\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_144_159_ca_tmo_seg_burst.c b/drivers/event/cnxk/deq/cn10k/deq_144_159_ca_tmo_seg_burst.c\nnew file mode 100644\nindex 0000000000..802e0dbb74\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_144_159_ca_tmo_seg_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_tmo_ca_seg_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_tmo_ca_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_144_159\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_144_159_dual.c b/drivers/event/cnxk/deq/cn10k/deq_144_159_dual.c\nnew file mode 100644\nindex 0000000000..81e6e57717\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_144_159_dual.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DUAL_DEQ(cn10k_sso_hws_dual_deq_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_144_159\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_144_159_seg.c b/drivers/event/cnxk/deq/cn10k/deq_144_159_seg.c\nnew file mode 100644\nindex 0000000000..fbeef19451\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_144_159_seg.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_SEG(cn10k_sso_hws_deq_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_144_159\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_144_159_seg_burst.c b/drivers/event/cnxk/deq/cn10k/deq_144_159_seg_burst.c\nnew file mode 100644\nindex 0000000000..450ccd018c\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_144_159_seg_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_SEG_BURST(cn10k_sso_hws_deq_seg_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_144_159\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_144_159_tmo.c b/drivers/event/cnxk/deq/cn10k/deq_144_159_tmo.c\nnew file mode 100644\nindex 0000000000..ecd8a62195\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_144_159_tmo.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_TMO(cn10k_sso_hws_deq_tmo_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_144_159\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_144_159_tmo_burst.c b/drivers/event/cnxk/deq/cn10k/deq_144_159_tmo_burst.c\nnew file mode 100644\nindex 0000000000..52de6b545e\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_144_159_tmo_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_tmo_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_tmo_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_144_159\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_144_159_tmo_seg.c b/drivers/event/cnxk/deq/cn10k/deq_144_159_tmo_seg.c\nnew file mode 100644\nindex 0000000000..e1ce1e00bf\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_144_159_tmo_seg.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_TMO_SEG(cn10k_sso_hws_deq_tmo_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_144_159\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_144_159_tmo_seg_burst.c b/drivers/event/cnxk/deq/cn10k/deq_144_159_tmo_seg_burst.c\nnew file mode 100644\nindex 0000000000..22ec66cf7f\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_144_159_tmo_seg_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_tmo_seg_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_tmo_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_144_159\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_160_175.c b/drivers/event/cnxk/deq/cn10k/deq_160_175.c\nnew file mode 100644\nindex 0000000000..225d234ebe\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_160_175.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ(cn10k_sso_hws_deq_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_160_175\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_160_175_burst.c b/drivers/event/cnxk/deq/cn10k/deq_160_175_burst.c\nnew file mode 100644\nindex 0000000000..c8ef1a144e\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_160_175_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_160_175\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_160_175_ca.c b/drivers/event/cnxk/deq/cn10k/deq_160_175_ca.c\nnew file mode 100644\nindex 0000000000..b304de6e5c\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_160_175_ca.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_CA(cn10k_sso_hws_deq_ca_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_160_175\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_160_175_ca_burst.c b/drivers/event/cnxk/deq/cn10k/deq_160_175_ca_burst.c\nnew file mode 100644\nindex 0000000000..ef8442af7d\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_160_175_ca_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_ca_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_ca_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_160_175\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_160_175_ca_seg.c b/drivers/event/cnxk/deq/cn10k/deq_160_175_ca_seg.c\nnew file mode 100644\nindex 0000000000..272d9a6126\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_160_175_ca_seg.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_CA_SEG(cn10k_sso_hws_deq_ca_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_160_175\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_160_175_ca_seg_burst.c b/drivers/event/cnxk/deq/cn10k/deq_160_175_ca_seg_burst.c\nnew file mode 100644\nindex 0000000000..452476e478\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_160_175_ca_seg_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_ca_seg_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_ca_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_160_175\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_160_175_ca_tmo.c b/drivers/event/cnxk/deq/cn10k/deq_160_175_ca_tmo.c\nnew file mode 100644\nindex 0000000000..e481565fc9\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_160_175_ca_tmo.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_TMO_CA(cn10k_sso_hws_deq_tmo_ca_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_160_175\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_160_175_ca_tmo_burst.c b/drivers/event/cnxk/deq/cn10k/deq_160_175_ca_tmo_burst.c\nnew file mode 100644\nindex 0000000000..4bc5e54487\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_160_175_ca_tmo_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_tmo_ca_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_tmo_ca_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_160_175\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_160_175_ca_tmo_seg.c b/drivers/event/cnxk/deq/cn10k/deq_160_175_ca_tmo_seg.c\nnew file mode 100644\nindex 0000000000..cb63891568\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_160_175_ca_tmo_seg.c\n@@ -0,0 +1,13 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_DEQ_TMO_CA_SEG(cn10k_sso_hws_deq_tmo_ca_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_160_175\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_160_175_ca_tmo_seg_burst.c b/drivers/event/cnxk/deq/cn10k/deq_160_175_ca_tmo_seg_burst.c\nnew file mode 100644\nindex 0000000000..effca85b06\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_160_175_ca_tmo_seg_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_tmo_ca_seg_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_tmo_ca_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_160_175\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_160_175_dual.c b/drivers/event/cnxk/deq/cn10k/deq_160_175_dual.c\nnew file mode 100644\nindex 0000000000..f8de8810bd\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_160_175_dual.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DUAL_DEQ(cn10k_sso_hws_dual_deq_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_160_175\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_160_175_seg.c b/drivers/event/cnxk/deq/cn10k/deq_160_175_seg.c\nnew file mode 100644\nindex 0000000000..3afd3a4117\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_160_175_seg.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_SEG(cn10k_sso_hws_deq_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_160_175\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_160_175_seg_burst.c b/drivers/event/cnxk/deq/cn10k/deq_160_175_seg_burst.c\nnew file mode 100644\nindex 0000000000..a60e59df8e\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_160_175_seg_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_SEG_BURST(cn10k_sso_hws_deq_seg_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_160_175\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_160_175_tmo.c b/drivers/event/cnxk/deq/cn10k/deq_160_175_tmo.c\nnew file mode 100644\nindex 0000000000..91179a1eca\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_160_175_tmo.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_TMO(cn10k_sso_hws_deq_tmo_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_160_175\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_160_175_tmo_burst.c b/drivers/event/cnxk/deq/cn10k/deq_160_175_tmo_burst.c\nnew file mode 100644\nindex 0000000000..9a62c88942\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_160_175_tmo_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_tmo_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_tmo_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_160_175\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_160_175_tmo_seg.c b/drivers/event/cnxk/deq/cn10k/deq_160_175_tmo_seg.c\nnew file mode 100644\nindex 0000000000..30218295b9\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_160_175_tmo_seg.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_TMO_SEG(cn10k_sso_hws_deq_tmo_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_160_175\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_160_175_tmo_seg_burst.c b/drivers/event/cnxk/deq/cn10k/deq_160_175_tmo_seg_burst.c\nnew file mode 100644\nindex 0000000000..7cb9f955a5\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_160_175_tmo_seg_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_tmo_seg_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_tmo_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_160_175\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_176_191.c b/drivers/event/cnxk/deq/cn10k/deq_176_191.c\nnew file mode 100644\nindex 0000000000..8e686199f4\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_176_191.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ(cn10k_sso_hws_deq_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_176_191\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_176_191_burst.c b/drivers/event/cnxk/deq/cn10k/deq_176_191_burst.c\nnew file mode 100644\nindex 0000000000..a5494ddb72\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_176_191_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_176_191\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_176_191_ca.c b/drivers/event/cnxk/deq/cn10k/deq_176_191_ca.c\nnew file mode 100644\nindex 0000000000..6ef5e6c281\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_176_191_ca.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_CA(cn10k_sso_hws_deq_ca_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_176_191\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_176_191_ca_burst.c b/drivers/event/cnxk/deq/cn10k/deq_176_191_ca_burst.c\nnew file mode 100644\nindex 0000000000..faebf51a51\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_176_191_ca_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_ca_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_ca_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_176_191\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_176_191_ca_seg.c b/drivers/event/cnxk/deq/cn10k/deq_176_191_ca_seg.c\nnew file mode 100644\nindex 0000000000..0cc6ea32ee\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_176_191_ca_seg.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_CA_SEG(cn10k_sso_hws_deq_ca_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_176_191\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_176_191_ca_seg_burst.c b/drivers/event/cnxk/deq/cn10k/deq_176_191_ca_seg_burst.c\nnew file mode 100644\nindex 0000000000..2bcd802e6a\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_176_191_ca_seg_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_ca_seg_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_ca_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_176_191\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_176_191_ca_tmo.c b/drivers/event/cnxk/deq/cn10k/deq_176_191_ca_tmo.c\nnew file mode 100644\nindex 0000000000..63cbe16bff\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_176_191_ca_tmo.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_TMO_CA(cn10k_sso_hws_deq_tmo_ca_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_176_191\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_176_191_ca_tmo_burst.c b/drivers/event/cnxk/deq/cn10k/deq_176_191_ca_tmo_burst.c\nnew file mode 100644\nindex 0000000000..49400d80af\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_176_191_ca_tmo_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_tmo_ca_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_tmo_ca_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_176_191\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_176_191_ca_tmo_seg.c b/drivers/event/cnxk/deq/cn10k/deq_176_191_ca_tmo_seg.c\nnew file mode 100644\nindex 0000000000..505864a280\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_176_191_ca_tmo_seg.c\n@@ -0,0 +1,13 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_DEQ_TMO_CA_SEG(cn10k_sso_hws_deq_tmo_ca_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_176_191\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_176_191_ca_tmo_seg_burst.c b/drivers/event/cnxk/deq/cn10k/deq_176_191_ca_tmo_seg_burst.c\nnew file mode 100644\nindex 0000000000..561f907815\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_176_191_ca_tmo_seg_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_tmo_ca_seg_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_tmo_ca_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_176_191\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_176_191_dual.c b/drivers/event/cnxk/deq/cn10k/deq_176_191_dual.c\nnew file mode 100644\nindex 0000000000..539b19dacb\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_176_191_dual.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DUAL_DEQ(cn10k_sso_hws_dual_deq_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_176_191\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_176_191_seg.c b/drivers/event/cnxk/deq/cn10k/deq_176_191_seg.c\nnew file mode 100644\nindex 0000000000..b0d134d4df\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_176_191_seg.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_SEG(cn10k_sso_hws_deq_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_176_191\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_176_191_seg_burst.c b/drivers/event/cnxk/deq/cn10k/deq_176_191_seg_burst.c\nnew file mode 100644\nindex 0000000000..1e346a0772\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_176_191_seg_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_SEG_BURST(cn10k_sso_hws_deq_seg_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_176_191\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_176_191_tmo.c b/drivers/event/cnxk/deq/cn10k/deq_176_191_tmo.c\nnew file mode 100644\nindex 0000000000..38d1fbbefe\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_176_191_tmo.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_TMO(cn10k_sso_hws_deq_tmo_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_176_191\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_176_191_tmo_burst.c b/drivers/event/cnxk/deq/cn10k/deq_176_191_tmo_burst.c\nnew file mode 100644\nindex 0000000000..b53bc86377\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_176_191_tmo_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_tmo_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_tmo_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_176_191\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_176_191_tmo_seg.c b/drivers/event/cnxk/deq/cn10k/deq_176_191_tmo_seg.c\nnew file mode 100644\nindex 0000000000..5f2eaaad46\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_176_191_tmo_seg.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_TMO_SEG(cn10k_sso_hws_deq_tmo_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_176_191\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_176_191_tmo_seg_burst.c b/drivers/event/cnxk/deq/cn10k/deq_176_191_tmo_seg_burst.c\nnew file mode 100644\nindex 0000000000..5eb9e2bf0e\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_176_191_tmo_seg_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_tmo_seg_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_tmo_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_176_191\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_192_207.c b/drivers/event/cnxk/deq/cn10k/deq_192_207.c\nnew file mode 100644\nindex 0000000000..6f53dbce2a\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_192_207.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ(cn10k_sso_hws_deq_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_192_207\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_192_207_burst.c b/drivers/event/cnxk/deq/cn10k/deq_192_207_burst.c\nnew file mode 100644\nindex 0000000000..f9789efbb2\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_192_207_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_192_207\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_192_207_ca.c b/drivers/event/cnxk/deq/cn10k/deq_192_207_ca.c\nnew file mode 100644\nindex 0000000000..56ed0cae38\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_192_207_ca.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_CA(cn10k_sso_hws_deq_ca_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_192_207\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_192_207_ca_burst.c b/drivers/event/cnxk/deq/cn10k/deq_192_207_ca_burst.c\nnew file mode 100644\nindex 0000000000..70ed05e6e9\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_192_207_ca_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_ca_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_ca_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_192_207\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_192_207_ca_seg.c b/drivers/event/cnxk/deq/cn10k/deq_192_207_ca_seg.c\nnew file mode 100644\nindex 0000000000..806b9e4ef0\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_192_207_ca_seg.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_CA_SEG(cn10k_sso_hws_deq_ca_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_192_207\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_192_207_ca_seg_burst.c b/drivers/event/cnxk/deq/cn10k/deq_192_207_ca_seg_burst.c\nnew file mode 100644\nindex 0000000000..93360814e1\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_192_207_ca_seg_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_ca_seg_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_ca_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_192_207\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_192_207_ca_tmo.c b/drivers/event/cnxk/deq/cn10k/deq_192_207_ca_tmo.c\nnew file mode 100644\nindex 0000000000..43c735d123\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_192_207_ca_tmo.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_TMO_CA(cn10k_sso_hws_deq_tmo_ca_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_192_207\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_192_207_ca_tmo_burst.c b/drivers/event/cnxk/deq/cn10k/deq_192_207_ca_tmo_burst.c\nnew file mode 100644\nindex 0000000000..5f7da5500d\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_192_207_ca_tmo_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_tmo_ca_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_tmo_ca_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_192_207\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_192_207_ca_tmo_seg.c b/drivers/event/cnxk/deq/cn10k/deq_192_207_ca_tmo_seg.c\nnew file mode 100644\nindex 0000000000..4c6126f13a\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_192_207_ca_tmo_seg.c\n@@ -0,0 +1,13 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_DEQ_TMO_CA_SEG(cn10k_sso_hws_deq_tmo_ca_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_192_207\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_192_207_ca_tmo_seg_burst.c b/drivers/event/cnxk/deq/cn10k/deq_192_207_ca_tmo_seg_burst.c\nnew file mode 100644\nindex 0000000000..81ae021b51\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_192_207_ca_tmo_seg_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_tmo_ca_seg_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_tmo_ca_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_192_207\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_192_207_dual.c b/drivers/event/cnxk/deq/cn10k/deq_192_207_dual.c\nnew file mode 100644\nindex 0000000000..2adcdaf59c\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_192_207_dual.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DUAL_DEQ(cn10k_sso_hws_dual_deq_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_192_207\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_192_207_seg.c b/drivers/event/cnxk/deq/cn10k/deq_192_207_seg.c\nnew file mode 100644\nindex 0000000000..5d59f7fe23\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_192_207_seg.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_SEG(cn10k_sso_hws_deq_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_192_207\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_192_207_seg_burst.c b/drivers/event/cnxk/deq/cn10k/deq_192_207_seg_burst.c\nnew file mode 100644\nindex 0000000000..ddebe2aa40\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_192_207_seg_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_SEG_BURST(cn10k_sso_hws_deq_seg_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_192_207\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_192_207_tmo.c b/drivers/event/cnxk/deq/cn10k/deq_192_207_tmo.c\nnew file mode 100644\nindex 0000000000..e1c5beb41d\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_192_207_tmo.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_TMO(cn10k_sso_hws_deq_tmo_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_192_207\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_192_207_tmo_burst.c b/drivers/event/cnxk/deq/cn10k/deq_192_207_tmo_burst.c\nnew file mode 100644\nindex 0000000000..5d733766ee\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_192_207_tmo_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_tmo_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_tmo_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_192_207\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_192_207_tmo_seg.c b/drivers/event/cnxk/deq/cn10k/deq_192_207_tmo_seg.c\nnew file mode 100644\nindex 0000000000..12bff5902c\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_192_207_tmo_seg.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_TMO_SEG(cn10k_sso_hws_deq_tmo_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_192_207\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_192_207_tmo_seg_burst.c b/drivers/event/cnxk/deq/cn10k/deq_192_207_tmo_seg_burst.c\nnew file mode 100644\nindex 0000000000..2d10cc6e68\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_192_207_tmo_seg_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_tmo_seg_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_tmo_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_192_207\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_208_223.c b/drivers/event/cnxk/deq/cn10k/deq_208_223.c\nnew file mode 100644\nindex 0000000000..965a9405f0\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_208_223.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ(cn10k_sso_hws_deq_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_208_223\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_208_223_burst.c b/drivers/event/cnxk/deq/cn10k/deq_208_223_burst.c\nnew file mode 100644\nindex 0000000000..de9a048a0e\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_208_223_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_208_223\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_208_223_ca.c b/drivers/event/cnxk/deq/cn10k/deq_208_223_ca.c\nnew file mode 100644\nindex 0000000000..f9148acef3\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_208_223_ca.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_CA(cn10k_sso_hws_deq_ca_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_208_223\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_208_223_ca_burst.c b/drivers/event/cnxk/deq/cn10k/deq_208_223_ca_burst.c\nnew file mode 100644\nindex 0000000000..12a927a872\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_208_223_ca_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_ca_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_ca_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_208_223\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_208_223_ca_seg.c b/drivers/event/cnxk/deq/cn10k/deq_208_223_ca_seg.c\nnew file mode 100644\nindex 0000000000..1b020fbf98\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_208_223_ca_seg.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_CA_SEG(cn10k_sso_hws_deq_ca_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_208_223\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_208_223_ca_seg_burst.c b/drivers/event/cnxk/deq/cn10k/deq_208_223_ca_seg_burst.c\nnew file mode 100644\nindex 0000000000..2c826f2284\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_208_223_ca_seg_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_ca_seg_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_ca_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_208_223\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_208_223_ca_tmo.c b/drivers/event/cnxk/deq/cn10k/deq_208_223_ca_tmo.c\nnew file mode 100644\nindex 0000000000..48c23b910d\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_208_223_ca_tmo.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_TMO_CA(cn10k_sso_hws_deq_tmo_ca_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_208_223\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_208_223_ca_tmo_burst.c b/drivers/event/cnxk/deq/cn10k/deq_208_223_ca_tmo_burst.c\nnew file mode 100644\nindex 0000000000..5381f1ce17\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_208_223_ca_tmo_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_tmo_ca_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_tmo_ca_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_208_223\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_208_223_ca_tmo_seg.c b/drivers/event/cnxk/deq/cn10k/deq_208_223_ca_tmo_seg.c\nnew file mode 100644\nindex 0000000000..116d9efc2d\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_208_223_ca_tmo_seg.c\n@@ -0,0 +1,13 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_DEQ_TMO_CA_SEG(cn10k_sso_hws_deq_tmo_ca_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_208_223\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_208_223_ca_tmo_seg_burst.c b/drivers/event/cnxk/deq/cn10k/deq_208_223_ca_tmo_seg_burst.c\nnew file mode 100644\nindex 0000000000..86571c7027\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_208_223_ca_tmo_seg_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_tmo_ca_seg_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_tmo_ca_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_208_223\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_208_223_dual.c b/drivers/event/cnxk/deq/cn10k/deq_208_223_dual.c\nnew file mode 100644\nindex 0000000000..0fb35b9c83\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_208_223_dual.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DUAL_DEQ(cn10k_sso_hws_dual_deq_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_208_223\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_208_223_seg.c b/drivers/event/cnxk/deq/cn10k/deq_208_223_seg.c\nnew file mode 100644\nindex 0000000000..df48426ff1\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_208_223_seg.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_SEG(cn10k_sso_hws_deq_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_208_223\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_208_223_seg_burst.c b/drivers/event/cnxk/deq/cn10k/deq_208_223_seg_burst.c\nnew file mode 100644\nindex 0000000000..f1342e3232\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_208_223_seg_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_SEG_BURST(cn10k_sso_hws_deq_seg_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_208_223\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_208_223_tmo.c b/drivers/event/cnxk/deq/cn10k/deq_208_223_tmo.c\nnew file mode 100644\nindex 0000000000..6f2d909806\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_208_223_tmo.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_TMO(cn10k_sso_hws_deq_tmo_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_208_223\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_208_223_tmo_burst.c b/drivers/event/cnxk/deq/cn10k/deq_208_223_tmo_burst.c\nnew file mode 100644\nindex 0000000000..3c6f226c4b\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_208_223_tmo_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_tmo_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_tmo_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_208_223\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_208_223_tmo_seg.c b/drivers/event/cnxk/deq/cn10k/deq_208_223_tmo_seg.c\nnew file mode 100644\nindex 0000000000..44a794233f\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_208_223_tmo_seg.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_TMO_SEG(cn10k_sso_hws_deq_tmo_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_208_223\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_208_223_tmo_seg_burst.c b/drivers/event/cnxk/deq/cn10k/deq_208_223_tmo_seg_burst.c\nnew file mode 100644\nindex 0000000000..aa89930d3e\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_208_223_tmo_seg_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_tmo_seg_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_tmo_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_208_223\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_224_239.c b/drivers/event/cnxk/deq/cn10k/deq_224_239.c\nnew file mode 100644\nindex 0000000000..03f5bd3588\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_224_239.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ(cn10k_sso_hws_deq_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_224_239\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_224_239_burst.c b/drivers/event/cnxk/deq/cn10k/deq_224_239_burst.c\nnew file mode 100644\nindex 0000000000..091419eb9b\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_224_239_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_224_239\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_224_239_ca.c b/drivers/event/cnxk/deq/cn10k/deq_224_239_ca.c\nnew file mode 100644\nindex 0000000000..8f4693e057\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_224_239_ca.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_CA(cn10k_sso_hws_deq_ca_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_224_239\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_224_239_ca_burst.c b/drivers/event/cnxk/deq/cn10k/deq_224_239_ca_burst.c\nnew file mode 100644\nindex 0000000000..474c9b1eee\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_224_239_ca_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_ca_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_ca_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_224_239\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_224_239_ca_seg.c b/drivers/event/cnxk/deq/cn10k/deq_224_239_ca_seg.c\nnew file mode 100644\nindex 0000000000..478df24934\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_224_239_ca_seg.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_CA_SEG(cn10k_sso_hws_deq_ca_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_224_239\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_224_239_ca_seg_burst.c b/drivers/event/cnxk/deq/cn10k/deq_224_239_ca_seg_burst.c\nnew file mode 100644\nindex 0000000000..3b78a0f91e\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_224_239_ca_seg_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_ca_seg_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_ca_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_224_239\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_224_239_ca_tmo.c b/drivers/event/cnxk/deq/cn10k/deq_224_239_ca_tmo.c\nnew file mode 100644\nindex 0000000000..366ae27814\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_224_239_ca_tmo.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_TMO_CA(cn10k_sso_hws_deq_tmo_ca_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_224_239\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_224_239_ca_tmo_burst.c b/drivers/event/cnxk/deq/cn10k/deq_224_239_ca_tmo_burst.c\nnew file mode 100644\nindex 0000000000..db0751fece\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_224_239_ca_tmo_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_tmo_ca_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_tmo_ca_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_224_239\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_224_239_ca_tmo_seg.c b/drivers/event/cnxk/deq/cn10k/deq_224_239_ca_tmo_seg.c\nnew file mode 100644\nindex 0000000000..6dc3d2f870\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_224_239_ca_tmo_seg.c\n@@ -0,0 +1,13 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_DEQ_TMO_CA_SEG(cn10k_sso_hws_deq_tmo_ca_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_224_239\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_224_239_ca_tmo_seg_burst.c b/drivers/event/cnxk/deq/cn10k/deq_224_239_ca_tmo_seg_burst.c\nnew file mode 100644\nindex 0000000000..11b1784868\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_224_239_ca_tmo_seg_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_tmo_ca_seg_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_tmo_ca_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_224_239\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_224_239_dual.c b/drivers/event/cnxk/deq/cn10k/deq_224_239_dual.c\nnew file mode 100644\nindex 0000000000..35429014da\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_224_239_dual.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DUAL_DEQ(cn10k_sso_hws_dual_deq_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_224_239\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_224_239_seg.c b/drivers/event/cnxk/deq/cn10k/deq_224_239_seg.c\nnew file mode 100644\nindex 0000000000..19b5d2eedd\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_224_239_seg.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_SEG(cn10k_sso_hws_deq_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_224_239\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_224_239_seg_burst.c b/drivers/event/cnxk/deq/cn10k/deq_224_239_seg_burst.c\nnew file mode 100644\nindex 0000000000..fe8f8099b0\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_224_239_seg_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_SEG_BURST(cn10k_sso_hws_deq_seg_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_224_239\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_224_239_tmo.c b/drivers/event/cnxk/deq/cn10k/deq_224_239_tmo.c\nnew file mode 100644\nindex 0000000000..4f196ddaaf\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_224_239_tmo.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_TMO(cn10k_sso_hws_deq_tmo_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_224_239\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_224_239_tmo_burst.c b/drivers/event/cnxk/deq/cn10k/deq_224_239_tmo_burst.c\nnew file mode 100644\nindex 0000000000..252cf4f44d\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_224_239_tmo_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_tmo_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_tmo_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_224_239\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_224_239_tmo_seg.c b/drivers/event/cnxk/deq/cn10k/deq_224_239_tmo_seg.c\nnew file mode 100644\nindex 0000000000..675149ec3a\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_224_239_tmo_seg.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_TMO_SEG(cn10k_sso_hws_deq_tmo_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_224_239\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_224_239_tmo_seg_burst.c b/drivers/event/cnxk/deq/cn10k/deq_224_239_tmo_seg_burst.c\nnew file mode 100644\nindex 0000000000..9347485e05\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_224_239_tmo_seg_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_tmo_seg_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_tmo_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_224_239\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_240_255.c b/drivers/event/cnxk/deq/cn10k/deq_240_255.c\nnew file mode 100644\nindex 0000000000..7890137548\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_240_255.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ(cn10k_sso_hws_deq_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_240_255\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_240_255_burst.c b/drivers/event/cnxk/deq/cn10k/deq_240_255_burst.c\nnew file mode 100644\nindex 0000000000..b1241915c8\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_240_255_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_240_255\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_240_255_ca.c b/drivers/event/cnxk/deq/cn10k/deq_240_255_ca.c\nnew file mode 100644\nindex 0000000000..1f9abae4bc\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_240_255_ca.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_CA(cn10k_sso_hws_deq_ca_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_240_255\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_240_255_ca_burst.c b/drivers/event/cnxk/deq/cn10k/deq_240_255_ca_burst.c\nnew file mode 100644\nindex 0000000000..a518f5e285\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_240_255_ca_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_ca_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_ca_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_240_255\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_240_255_ca_seg.c b/drivers/event/cnxk/deq/cn10k/deq_240_255_ca_seg.c\nnew file mode 100644\nindex 0000000000..f6408fbdd3\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_240_255_ca_seg.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_CA_SEG(cn10k_sso_hws_deq_ca_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_240_255\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_240_255_ca_seg_burst.c b/drivers/event/cnxk/deq/cn10k/deq_240_255_ca_seg_burst.c\nnew file mode 100644\nindex 0000000000..76bfa4ac08\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_240_255_ca_seg_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_ca_seg_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_ca_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_240_255\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_240_255_ca_tmo.c b/drivers/event/cnxk/deq/cn10k/deq_240_255_ca_tmo.c\nnew file mode 100644\nindex 0000000000..f28b909b66\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_240_255_ca_tmo.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_TMO_CA(cn10k_sso_hws_deq_tmo_ca_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_240_255\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_240_255_ca_tmo_burst.c b/drivers/event/cnxk/deq/cn10k/deq_240_255_ca_tmo_burst.c\nnew file mode 100644\nindex 0000000000..5c76f78dca\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_240_255_ca_tmo_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_tmo_ca_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_tmo_ca_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_240_255\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_240_255_ca_tmo_seg.c b/drivers/event/cnxk/deq/cn10k/deq_240_255_ca_tmo_seg.c\nnew file mode 100644\nindex 0000000000..35af75874b\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_240_255_ca_tmo_seg.c\n@@ -0,0 +1,13 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_DEQ_TMO_CA_SEG(cn10k_sso_hws_deq_tmo_ca_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_240_255\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_240_255_ca_tmo_seg_burst.c b/drivers/event/cnxk/deq/cn10k/deq_240_255_ca_tmo_seg_burst.c\nnew file mode 100644\nindex 0000000000..f8c6deb8ef\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_240_255_ca_tmo_seg_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_tmo_ca_seg_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_tmo_ca_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_240_255\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_240_255_dual.c b/drivers/event/cnxk/deq/cn10k/deq_240_255_dual.c\nnew file mode 100644\nindex 0000000000..0b227c2f99\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_240_255_dual.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DUAL_DEQ(cn10k_sso_hws_dual_deq_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_240_255\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_240_255_seg.c b/drivers/event/cnxk/deq/cn10k/deq_240_255_seg.c\nnew file mode 100644\nindex 0000000000..6af63491da\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_240_255_seg.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_SEG(cn10k_sso_hws_deq_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_240_255\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_240_255_seg_burst.c b/drivers/event/cnxk/deq/cn10k/deq_240_255_seg_burst.c\nnew file mode 100644\nindex 0000000000..6b20efd787\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_240_255_seg_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_SEG_BURST(cn10k_sso_hws_deq_seg_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_240_255\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_240_255_tmo.c b/drivers/event/cnxk/deq/cn10k/deq_240_255_tmo.c\nnew file mode 100644\nindex 0000000000..c074e55d02\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_240_255_tmo.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_TMO(cn10k_sso_hws_deq_tmo_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_240_255\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_240_255_tmo_burst.c b/drivers/event/cnxk/deq/cn10k/deq_240_255_tmo_burst.c\nnew file mode 100644\nindex 0000000000..88bf1541cb\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_240_255_tmo_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_tmo_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_tmo_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_240_255\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_240_255_tmo_seg.c b/drivers/event/cnxk/deq/cn10k/deq_240_255_tmo_seg.c\nnew file mode 100644\nindex 0000000000..560fc74f64\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_240_255_tmo_seg.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) SSO_DEQ_TMO_SEG(cn10k_sso_hws_deq_tmo_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_240_255\n+#undef R\ndiff --git a/drivers/event/cnxk/deq/cn10k/deq_240_255_tmo_seg_burst.c b/drivers/event/cnxk/deq/cn10k/deq_240_255_tmo_seg_burst.c\nnew file mode 100644\nindex 0000000000..92017de4e2\n--- /dev/null\n+++ b/drivers/event/cnxk/deq/cn10k/deq_240_255_tmo_seg_burst.c\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_worker.h\"\n+#include \"cnxk_eventdev.h\"\n+#include \"cnxk_worker.h\"\n+\n+#define R(name, flags) \\\n+\tSSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_tmo_seg_burst_##name, \\\n+\t\t\t cn10k_sso_hws_deq_tmo_seg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_240_255\n+#undef R\ndiff --git a/drivers/event/cnxk/meson.build b/drivers/event/cnxk/meson.build\nindex b27bae7b12..26081faf0c 100644\n--- a/drivers/event/cnxk/meson.build\n+++ b/drivers/event/cnxk/meson.build\n@@ -330,6 +330,14 @@ sources += files(\n 'deq/cn10k/deq_80_95_burst.c',\n 'deq/cn10k/deq_96_111_burst.c',\n 'deq/cn10k/deq_112_127_burst.c',\n+ 'deq/cn10k/deq_128_143_burst.c',\n+ 'deq/cn10k/deq_144_159_burst.c',\n+ 'deq/cn10k/deq_160_175_burst.c',\n+ 'deq/cn10k/deq_176_191_burst.c',\n+ 'deq/cn10k/deq_192_207_burst.c',\n+ 'deq/cn10k/deq_208_223_burst.c',\n+ 'deq/cn10k/deq_224_239_burst.c',\n+ 'deq/cn10k/deq_240_255_burst.c',\n 'deq/cn10k/deq_0_15_seg_burst.c',\n 'deq/cn10k/deq_16_31_seg_burst.c',\n 'deq/cn10k/deq_32_47_seg_burst.c',\n@@ -338,6 +346,14 @@ sources += files(\n 'deq/cn10k/deq_80_95_seg_burst.c',\n 'deq/cn10k/deq_96_111_seg_burst.c',\n 'deq/cn10k/deq_112_127_seg_burst.c',\n+ 'deq/cn10k/deq_128_143_seg_burst.c',\n+ 'deq/cn10k/deq_144_159_seg_burst.c',\n+ 'deq/cn10k/deq_160_175_seg_burst.c',\n+ 'deq/cn10k/deq_176_191_seg_burst.c',\n+ 'deq/cn10k/deq_192_207_seg_burst.c',\n+ 'deq/cn10k/deq_208_223_seg_burst.c',\n+ 'deq/cn10k/deq_224_239_seg_burst.c',\n+ 'deq/cn10k/deq_240_255_seg_burst.c',\n 'deq/cn10k/deq_0_15.c',\n 'deq/cn10k/deq_16_31.c',\n 'deq/cn10k/deq_32_47.c',\n@@ -346,6 +362,14 @@ sources += files(\n 'deq/cn10k/deq_80_95.c',\n 'deq/cn10k/deq_96_111.c',\n 'deq/cn10k/deq_112_127.c',\n+ 'deq/cn10k/deq_128_143.c',\n+ 'deq/cn10k/deq_144_159.c',\n+ 'deq/cn10k/deq_160_175.c',\n+ 'deq/cn10k/deq_176_191.c',\n+ 'deq/cn10k/deq_192_207.c',\n+ 'deq/cn10k/deq_208_223.c',\n+ 'deq/cn10k/deq_224_239.c',\n+ 'deq/cn10k/deq_240_255.c',\n 'deq/cn10k/deq_0_15_seg.c',\n 'deq/cn10k/deq_16_31_seg.c',\n 'deq/cn10k/deq_32_47_seg.c',\n@@ -354,6 +378,14 @@ sources += files(\n 'deq/cn10k/deq_80_95_seg.c',\n 'deq/cn10k/deq_96_111_seg.c',\n 'deq/cn10k/deq_112_127_seg.c',\n+ 'deq/cn10k/deq_128_143_seg.c',\n+ 'deq/cn10k/deq_144_159_seg.c',\n+ 'deq/cn10k/deq_160_175_seg.c',\n+ 'deq/cn10k/deq_176_191_seg.c',\n+ 'deq/cn10k/deq_192_207_seg.c',\n+ 'deq/cn10k/deq_208_223_seg.c',\n+ 'deq/cn10k/deq_224_239_seg.c',\n+ 'deq/cn10k/deq_240_255_seg.c',\n 'deq/cn10k/deq_0_15_tmo.c',\n 'deq/cn10k/deq_16_31_tmo.c',\n 'deq/cn10k/deq_32_47_tmo.c',\n@@ -362,6 +394,14 @@ sources += files(\n 'deq/cn10k/deq_80_95_tmo.c',\n 'deq/cn10k/deq_96_111_tmo.c',\n 'deq/cn10k/deq_112_127_tmo.c',\n+ 'deq/cn10k/deq_128_143_tmo.c',\n+ 'deq/cn10k/deq_144_159_tmo.c',\n+ 'deq/cn10k/deq_160_175_tmo.c',\n+ 'deq/cn10k/deq_176_191_tmo.c',\n+ 'deq/cn10k/deq_192_207_tmo.c',\n+ 'deq/cn10k/deq_208_223_tmo.c',\n+ 'deq/cn10k/deq_224_239_tmo.c',\n+ 'deq/cn10k/deq_240_255_tmo.c',\n 'deq/cn10k/deq_0_15_tmo_burst.c',\n 'deq/cn10k/deq_16_31_tmo_burst.c',\n 'deq/cn10k/deq_32_47_tmo_burst.c',\n@@ -370,6 +410,14 @@ sources += files(\n 'deq/cn10k/deq_80_95_tmo_burst.c',\n 'deq/cn10k/deq_96_111_tmo_burst.c',\n 'deq/cn10k/deq_112_127_tmo_burst.c',\n+ 'deq/cn10k/deq_128_143_tmo_burst.c',\n+ 'deq/cn10k/deq_144_159_tmo_burst.c',\n+ 'deq/cn10k/deq_160_175_tmo_burst.c',\n+ 'deq/cn10k/deq_176_191_tmo_burst.c',\n+ 'deq/cn10k/deq_192_207_tmo_burst.c',\n+ 'deq/cn10k/deq_208_223_tmo_burst.c',\n+ 'deq/cn10k/deq_224_239_tmo_burst.c',\n+ 'deq/cn10k/deq_240_255_tmo_burst.c',\n 'deq/cn10k/deq_0_15_tmo_seg.c',\n 'deq/cn10k/deq_16_31_tmo_seg.c',\n 'deq/cn10k/deq_32_47_tmo_seg.c',\n@@ -378,6 +426,14 @@ sources += files(\n 'deq/cn10k/deq_80_95_tmo_seg.c',\n 'deq/cn10k/deq_96_111_tmo_seg.c',\n 'deq/cn10k/deq_112_127_tmo_seg.c',\n+ 'deq/cn10k/deq_128_143_tmo_seg.c',\n+ 'deq/cn10k/deq_144_159_tmo_seg.c',\n+ 'deq/cn10k/deq_160_175_tmo_seg.c',\n+ 'deq/cn10k/deq_176_191_tmo_seg.c',\n+ 'deq/cn10k/deq_192_207_tmo_seg.c',\n+ 'deq/cn10k/deq_208_223_tmo_seg.c',\n+ 'deq/cn10k/deq_224_239_tmo_seg.c',\n+ 'deq/cn10k/deq_240_255_tmo_seg.c',\n 'deq/cn10k/deq_0_15_tmo_seg_burst.c',\n 'deq/cn10k/deq_16_31_tmo_seg_burst.c',\n 'deq/cn10k/deq_32_47_tmo_seg_burst.c',\n@@ -386,6 +442,14 @@ sources += files(\n 'deq/cn10k/deq_80_95_tmo_seg_burst.c',\n 'deq/cn10k/deq_96_111_tmo_seg_burst.c',\n 'deq/cn10k/deq_112_127_tmo_seg_burst.c',\n+ 'deq/cn10k/deq_128_143_tmo_seg_burst.c',\n+ 'deq/cn10k/deq_144_159_tmo_seg_burst.c',\n+ 'deq/cn10k/deq_160_175_tmo_seg_burst.c',\n+ 'deq/cn10k/deq_176_191_tmo_seg_burst.c',\n+ 'deq/cn10k/deq_192_207_tmo_seg_burst.c',\n+ 'deq/cn10k/deq_208_223_tmo_seg_burst.c',\n+ 'deq/cn10k/deq_224_239_tmo_seg_burst.c',\n+ 'deq/cn10k/deq_240_255_tmo_seg_burst.c',\n 'deq/cn10k/deq_0_15_ca.c',\n 'deq/cn10k/deq_16_31_ca.c',\n 'deq/cn10k/deq_32_47_ca.c',\n@@ -394,6 +458,14 @@ sources += files(\n 'deq/cn10k/deq_80_95_ca.c',\n 'deq/cn10k/deq_96_111_ca.c',\n 'deq/cn10k/deq_112_127_ca.c',\n+ 'deq/cn10k/deq_128_143_ca.c',\n+ 'deq/cn10k/deq_144_159_ca.c',\n+ 'deq/cn10k/deq_160_175_ca.c',\n+ 'deq/cn10k/deq_176_191_ca.c',\n+ 'deq/cn10k/deq_192_207_ca.c',\n+ 'deq/cn10k/deq_208_223_ca.c',\n+ 'deq/cn10k/deq_224_239_ca.c',\n+ 'deq/cn10k/deq_240_255_ca.c',\n 'deq/cn10k/deq_0_15_ca_burst.c',\n 'deq/cn10k/deq_16_31_ca_burst.c',\n 'deq/cn10k/deq_32_47_ca_burst.c',\n@@ -402,6 +474,14 @@ sources += files(\n 'deq/cn10k/deq_80_95_ca_burst.c',\n 'deq/cn10k/deq_96_111_ca_burst.c',\n 'deq/cn10k/deq_112_127_ca_burst.c',\n+ 'deq/cn10k/deq_128_143_ca_burst.c',\n+ 'deq/cn10k/deq_144_159_ca_burst.c',\n+ 'deq/cn10k/deq_160_175_ca_burst.c',\n+ 'deq/cn10k/deq_176_191_ca_burst.c',\n+ 'deq/cn10k/deq_192_207_ca_burst.c',\n+ 'deq/cn10k/deq_208_223_ca_burst.c',\n+ 'deq/cn10k/deq_224_239_ca_burst.c',\n+ 'deq/cn10k/deq_240_255_ca_burst.c',\n 'deq/cn10k/deq_0_15_ca_seg.c',\n 'deq/cn10k/deq_16_31_ca_seg.c',\n 'deq/cn10k/deq_32_47_ca_seg.c',\n@@ -410,6 +490,14 @@ sources += files(\n 'deq/cn10k/deq_80_95_ca_seg.c',\n 'deq/cn10k/deq_96_111_ca_seg.c',\n 'deq/cn10k/deq_112_127_ca_seg.c',\n+ 'deq/cn10k/deq_128_143_ca_seg.c',\n+ 'deq/cn10k/deq_144_159_ca_seg.c',\n+ 'deq/cn10k/deq_160_175_ca_seg.c',\n+ 'deq/cn10k/deq_176_191_ca_seg.c',\n+ 'deq/cn10k/deq_192_207_ca_seg.c',\n+ 'deq/cn10k/deq_208_223_ca_seg.c',\n+ 'deq/cn10k/deq_224_239_ca_seg.c',\n+ 'deq/cn10k/deq_240_255_ca_seg.c',\n 'deq/cn10k/deq_0_15_ca_seg_burst.c',\n 'deq/cn10k/deq_16_31_ca_seg_burst.c',\n 'deq/cn10k/deq_32_47_ca_seg_burst.c',\n@@ -418,6 +506,14 @@ sources += files(\n 'deq/cn10k/deq_80_95_ca_seg_burst.c',\n 'deq/cn10k/deq_96_111_ca_seg_burst.c',\n 'deq/cn10k/deq_112_127_ca_seg_burst.c',\n+ 'deq/cn10k/deq_128_143_ca_seg_burst.c',\n+ 'deq/cn10k/deq_144_159_ca_seg_burst.c',\n+ 'deq/cn10k/deq_160_175_ca_seg_burst.c',\n+ 'deq/cn10k/deq_176_191_ca_seg_burst.c',\n+ 'deq/cn10k/deq_192_207_ca_seg_burst.c',\n+ 'deq/cn10k/deq_208_223_ca_seg_burst.c',\n+ 'deq/cn10k/deq_224_239_ca_seg_burst.c',\n+ 'deq/cn10k/deq_240_255_ca_seg_burst.c',\n 'deq/cn10k/deq_0_15_ca_tmo.c',\n 'deq/cn10k/deq_16_31_ca_tmo.c',\n 'deq/cn10k/deq_32_47_ca_tmo.c',\n@@ -426,6 +522,14 @@ sources += files(\n 'deq/cn10k/deq_80_95_ca_tmo.c',\n 'deq/cn10k/deq_96_111_ca_tmo.c',\n 'deq/cn10k/deq_112_127_ca_tmo.c',\n+ 'deq/cn10k/deq_128_143_ca_tmo.c',\n+ 'deq/cn10k/deq_144_159_ca_tmo.c',\n+ 'deq/cn10k/deq_160_175_ca_tmo.c',\n+ 'deq/cn10k/deq_176_191_ca_tmo.c',\n+ 'deq/cn10k/deq_192_207_ca_tmo.c',\n+ 'deq/cn10k/deq_208_223_ca_tmo.c',\n+ 'deq/cn10k/deq_224_239_ca_tmo.c',\n+ 'deq/cn10k/deq_240_255_ca_tmo.c',\n 'deq/cn10k/deq_0_15_ca_tmo_burst.c',\n 'deq/cn10k/deq_16_31_ca_tmo_burst.c',\n 'deq/cn10k/deq_32_47_ca_tmo_burst.c',\n@@ -434,6 +538,14 @@ sources += files(\n 'deq/cn10k/deq_80_95_ca_tmo_burst.c',\n 'deq/cn10k/deq_96_111_ca_tmo_burst.c',\n 'deq/cn10k/deq_112_127_ca_tmo_burst.c',\n+ 'deq/cn10k/deq_128_143_ca_tmo_burst.c',\n+ 'deq/cn10k/deq_144_159_ca_tmo_burst.c',\n+ 'deq/cn10k/deq_160_175_ca_tmo_burst.c',\n+ 'deq/cn10k/deq_176_191_ca_tmo_burst.c',\n+ 'deq/cn10k/deq_192_207_ca_tmo_burst.c',\n+ 'deq/cn10k/deq_208_223_ca_tmo_burst.c',\n+ 'deq/cn10k/deq_224_239_ca_tmo_burst.c',\n+ 'deq/cn10k/deq_240_255_ca_tmo_burst.c',\n 'deq/cn10k/deq_0_15_ca_tmo_seg.c',\n 'deq/cn10k/deq_16_31_ca_tmo_seg.c',\n 'deq/cn10k/deq_32_47_ca_tmo_seg.c',\n@@ -442,6 +554,14 @@ sources += files(\n 'deq/cn10k/deq_80_95_ca_tmo_seg.c',\n 'deq/cn10k/deq_96_111_ca_tmo_seg.c',\n 'deq/cn10k/deq_112_127_ca_tmo_seg.c',\n+ 'deq/cn10k/deq_128_143_ca_tmo_seg.c',\n+ 'deq/cn10k/deq_144_159_ca_tmo_seg.c',\n+ 'deq/cn10k/deq_160_175_ca_tmo_seg.c',\n+ 'deq/cn10k/deq_176_191_ca_tmo_seg.c',\n+ 'deq/cn10k/deq_192_207_ca_tmo_seg.c',\n+ 'deq/cn10k/deq_208_223_ca_tmo_seg.c',\n+ 'deq/cn10k/deq_224_239_ca_tmo_seg.c',\n+ 'deq/cn10k/deq_240_255_ca_tmo_seg.c',\n 'deq/cn10k/deq_0_15_ca_tmo_seg_burst.c',\n 'deq/cn10k/deq_16_31_ca_tmo_seg_burst.c',\n 'deq/cn10k/deq_32_47_ca_tmo_seg_burst.c',\n@@ -450,6 +570,14 @@ sources += files(\n 'deq/cn10k/deq_80_95_ca_tmo_seg_burst.c',\n 'deq/cn10k/deq_96_111_ca_tmo_seg_burst.c',\n 'deq/cn10k/deq_112_127_ca_tmo_seg_burst.c',\n+ 'deq/cn10k/deq_128_143_ca_tmo_seg_burst.c',\n+ 'deq/cn10k/deq_144_159_ca_tmo_seg_burst.c',\n+ 'deq/cn10k/deq_160_175_ca_tmo_seg_burst.c',\n+ 'deq/cn10k/deq_176_191_ca_tmo_seg_burst.c',\n+ 'deq/cn10k/deq_192_207_ca_tmo_seg_burst.c',\n+ 'deq/cn10k/deq_208_223_ca_tmo_seg_burst.c',\n+ 'deq/cn10k/deq_224_239_ca_tmo_seg_burst.c',\n+ 'deq/cn10k/deq_240_255_ca_tmo_seg_burst.c',\n )\n \n sources += files(\ndiff --git a/drivers/net/cnxk/cn10k_ethdev.c b/drivers/net/cnxk/cn10k_ethdev.c\nindex 8378cbffc2..d065abb465 100644\n--- a/drivers/net/cnxk/cn10k_ethdev.c\n+++ b/drivers/net/cnxk/cn10k_ethdev.c\n@@ -39,6 +39,10 @@ nix_rx_offload_flags(struct rte_eth_dev *eth_dev)\n \tif (dev->rx_offloads & RTE_ETH_RX_OFFLOAD_SECURITY)\n \t\tflags |= NIX_RX_OFFLOAD_SECURITY_F;\n \n+\tif (dev->rx_offloads &\n+\t (DEV_RX_OFFLOAD_SECURITY | RTE_ETH_RX_OFFLOAD_IP_REASSEMBLY))\n+\t\tflags |= NIX_RX_OFFLOAD_REASSEMBLY_F;\n+\n \treturn flags;\n }\n \n@@ -470,6 +474,17 @@ cn10k_nix_dev_start(struct rte_eth_dev *eth_dev)\n \treturn 0;\n }\n \n+static int\n+cn10k_nix_reass_conf_set(struct rte_eth_dev *dev,\n+\t\t\t struct rte_eth_ip_reass_params *conf)\n+{\n+\tRTE_SET_USED(dev);\n+\tint rc = 0;\n+\n+\trc = roc_nix_reass_configure(conf->reass_timeout, conf->max_frags);\n+\treturn rc;\n+}\n+\n /* Update platform specific eth dev ops */\n static void\n nix_eth_dev_ops_override(void)\n@@ -489,6 +504,7 @@ nix_eth_dev_ops_override(void)\n \tcnxk_eth_dev_ops.dev_ptypes_set = cn10k_nix_ptypes_set;\n \tcnxk_eth_dev_ops.timesync_enable = cn10k_nix_timesync_enable;\n \tcnxk_eth_dev_ops.timesync_disable = cn10k_nix_timesync_disable;\n+\tcnxk_eth_dev_ops.ip_reassembly_conf_set = cn10k_nix_reass_conf_set;\n }\n \n static void\ndiff --git a/drivers/net/cnxk/cn10k_rx.c b/drivers/net/cnxk/cn10k_rx.c\nindex 5d603514c0..028abe8f39 100644\n--- a/drivers/net/cnxk/cn10k_rx.c\n+++ b/drivers/net/cnxk/cn10k_rx.c\n@@ -5,7 +5,7 @@\n #include \"cn10k_ethdev.h\"\n #include \"cn10k_rx.h\"\n \n-#define R(name, f6, f5, f4, f3, f2, f1, f0, flags)\t\t\t \\\n+#define R(name, f7, f6, f5, f4, f3, f2, f1, f0, flags)\t\t\t \\\n \tuint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_##name(\t \\\n \t\tvoid *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts) \\\n \t{ \\\n@@ -17,12 +17,13 @@ NIX_RX_FASTPATH_MODES\n \n static inline void\n pick_rx_func(struct rte_eth_dev *eth_dev,\n-\t const eth_rx_burst_t rx_burst[2][2][2][2][2][2][2])\n+\t const eth_rx_burst_t rx_burst[2][2][2][2][2][2][2][2])\n {\n \tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n \n \t/* [VLAN] [TSP] [MARK] [CKSUM] [PTYPE] [RSS] */\n \teth_dev->rx_pkt_burst = rx_burst\n+\t\t[!!(dev->rx_offload_flags & NIX_RX_OFFLOAD_REASSEMBLY_F)]\n \t\t[!!(dev->rx_offload_flags & NIX_RX_OFFLOAD_SECURITY_F)]\n \t\t[!!(dev->rx_offload_flags & NIX_RX_OFFLOAD_VLAN_STRIP_F)]\n \t\t[!!(dev->rx_offload_flags & NIX_RX_OFFLOAD_TSTAMP_F)]\n@@ -39,42 +40,42 @@ cn10k_eth_set_rx_function(struct rte_eth_dev *eth_dev)\n {\n \tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n \n-\tconst eth_rx_burst_t nix_eth_rx_burst[2][2][2][2][2][2][2] = {\n-#define R(name, f6, f5, f4, f3, f2, f1, f0, flags)\t\t\t \\\n-\t[f6][f5][f4][f3][f2][f1][f0] = cn10k_nix_recv_pkts_##name,\n+\tconst eth_rx_burst_t nix_eth_rx_burst[2][2][2][2][2][2][2][2] = {\n+#define R(name, f7, f6, f5, f4, f3, f2, f1, f0, flags) \\\n+\t[f7][f6][f5][f4][f3][f2][f1][f0] = cn10k_nix_recv_pkts_##name,\n \n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n-\tconst eth_rx_burst_t nix_eth_rx_burst_mseg[2][2][2][2][2][2][2] = {\n-#define R(name, f6, f5, f4, f3, f2, f1, f0, flags)\t\t\t \\\n-\t[f6][f5][f4][f3][f2][f1][f0] = cn10k_nix_recv_pkts_mseg_##name,\n+\tconst eth_rx_burst_t nix_eth_rx_burst_mseg[2][2][2][2][2][2][2][2] = {\n+#define R(name, f7, f6, f5, f4, f3, f2, f1, f0, flags) \\\n+\t[f7][f6][f5][f4][f3][f2][f1][f0] = cn10k_nix_recv_pkts_mseg_##name,\n \n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n-\tconst eth_rx_burst_t nix_eth_rx_vec_burst[2][2][2][2][2][2][2] = {\n-#define R(name, f6, f5, f4, f3, f2, f1, f0, flags)\t\t\t \\\n-\t[f6][f5][f4][f3][f2][f1][f0] = cn10k_nix_recv_pkts_vec_##name,\n+\tconst eth_rx_burst_t nix_eth_rx_vec_burst[2][2][2][2][2][2][2][2] = {\n+#define R(name, f7, f6, f5, f4, f3, f2, f1, f0, flags) \\\n+\t[f7][f6][f5][f4][f3][f2][f1][f0] = cn10k_nix_recv_pkts_vec_##name,\n \n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n-\tconst eth_rx_burst_t nix_eth_rx_vec_burst_mseg[2][2][2][2][2][2][2] = {\n-#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n-\t[f6][f5][f4][f3][f2][f1][f0] = cn10k_nix_recv_pkts_vec_mseg_##name,\n+\tconst eth_rx_burst_t nix_eth_rx_vec_burst_mseg[2][2][2][2][2][2][2][2] = {\n+#define R(name, f7, f6, f5, f4, f3, f2, f1, f0, flags) \\\n+\t[f7][f6][f5][f4][f3][f2][f1][f0] = cn10k_nix_recv_pkts_vec_mseg_##name,\n \n-\t\tNIX_RX_FASTPATH_MODES\n+\t\t\tNIX_RX_FASTPATH_MODES\n #undef R\n-\t};\n+\t\t};\n \n \t/* Copy multi seg version with no offload for tear down sequence */\n \tif (rte_eal_process_type() == RTE_PROC_PRIMARY)\n \t\tdev->rx_pkt_burst_no_offload =\n-\t\t\tnix_eth_rx_burst_mseg[0][0][0][0][0][0][0];\n+\t\t\tnix_eth_rx_burst_mseg[0][0][0][0][0][0][0][0];\n \n \tif (dev->scalar_ena) {\n \t\tif (dev->rx_offloads & RTE_ETH_RX_OFFLOAD_SCATTER)\ndiff --git a/drivers/net/cnxk/cn10k_rx.h b/drivers/net/cnxk/cn10k_rx.h\nindex a2442d3726..5c415634a9 100644\n--- a/drivers/net/cnxk/cn10k_rx.h\n+++ b/drivers/net/cnxk/cn10k_rx.h\n@@ -17,7 +17,8 @@\n #define NIX_RX_OFFLOAD_TSTAMP_F\t BIT(4)\n #define NIX_RX_OFFLOAD_VLAN_STRIP_F BIT(5)\n #define NIX_RX_OFFLOAD_SECURITY_F BIT(6)\n-#define NIX_RX_OFFLOAD_MAX\t (NIX_RX_OFFLOAD_SECURITY_F << 1)\n+#define NIX_RX_OFFLOAD_REASSEMBLY_F BIT(7)\n+#define NIX_RX_OFFLOAD_MAX\t (NIX_RX_OFFLOAD_REASSEMBLY_F << 1)\n \n /* Flags to control cqe_to_mbuf conversion function.\n * Defining it from backwards to denote its been\n@@ -86,9 +87,232 @@ nix_sec_flush_meta(uintptr_t laddr, uint16_t lmt_id, uint8_t loff,\n \troc_lmt_submit_steorl(lmt_id, pa);\n }\n \n+static struct rte_mbuf *\n+nix_sec_attach_frags(const struct cpt_parse_hdr_s *hdr,\n+\t\t struct cn10k_inb_priv_data *inb_priv)\n+{\n+\tuint32_t offset = hdr->w2.fi_offset;\n+\tunion nix_rx_parse_u *frag_rx;\n+\tstruct cpt_frag_info_s *finfo;\n+\tstruct rte_mbuf *head, *mbuf;\n+\tuint64_t *frag_ptr;\n+\tuint16_t frag_size;\n+\tuint16_t rlen;\n+\tuint64_t *wqe;\n+\n+\t/* offset of 0 implies 256B, otherwise it implies offset*8B */\n+\toffset = (((offset - 1) & 0x1f) + 1) * 8;\n+\tfinfo = RTE_PTR_ADD(hdr, offset + hdr->w2.fi_pad);\n+\n+\t/* Frag-0: */\n+\twqe = (uint64_t *)(rte_be_to_cpu_64(hdr->wqe_ptr));\n+\trlen = ((*(wqe + 10)) >> 16) & 0xFFFF;\n+\n+\tfrag_rx = (union nix_rx_parse_u *)(wqe + 1);\n+\tfrag_size = rlen + frag_rx->lcptr - frag_rx->laptr;\n+\tfrag_rx->pkt_lenm1 = frag_size - 1;\n+\n+\tmbuf = (struct rte_mbuf *)(wqe - sizeof(struct rte_mbuf));\n+\tmbuf->data_len = frag_size;\n+\tmbuf->pkt_len = frag_size;\n+\thead = mbuf;\n+\t/* Update dynamic field with userdata */\n+\t*rte_security_dynfield(mbuf) = (uint64_t)inb_priv->userdata;\n+\n+\t/* Frag-1: */\n+\tif (hdr->w0.num_frags > 1) {\n+\t\twqe = (uint64_t *)(rte_be_to_cpu_64(hdr->frag1_wqe_ptr));\n+\t\trlen = ((*(wqe + 10)) >> 16) & 0xFFFF;\n+\n+\t\tfrag_rx = (union nix_rx_parse_u *)(wqe + 1);\n+\t\tfrag_size = rlen + frag_rx->lcptr - frag_rx->laptr;\n+\t\tfrag_rx->pkt_lenm1 = frag_size - 1;\n+\n+\t\tmbuf->next = (struct rte_mbuf *)(wqe - sizeof(struct rte_mbuf));\n+\t\tmbuf = mbuf->next;\n+\t\tmbuf->data_len = frag_size;\n+\t\tmbuf->pkt_len = frag_size;\n+\n+\t\t/* Update dynamic field with userdata */\n+\t\t*rte_security_dynfield(mbuf) = (uint64_t)inb_priv->userdata;\n+\t}\n+\n+\t/* Frag-2: */\n+\tif (hdr->w0.num_frags > 2) {\n+\t\tfrag_ptr = (uint64_t *)(finfo + 1);\n+\t\twqe = (uint64_t *)(rte_be_to_cpu_64(*frag_ptr));\n+\t\trlen = ((*(wqe + 10)) >> 16) & 0xFFFF;\n+\n+\t\tfrag_rx = (union nix_rx_parse_u *)(wqe + 1);\n+\t\tfrag_size = rlen + frag_rx->lcptr - frag_rx->laptr;\n+\t\tfrag_rx->pkt_lenm1 = frag_size - 1;\n+\n+\t\tmbuf->next = (struct rte_mbuf *)(wqe - sizeof(struct rte_mbuf));\n+\t\tmbuf = mbuf->next;\n+\t\tmbuf->data_len = frag_size;\n+\t\tmbuf->pkt_len = frag_size;\n+\n+\t\t/* Update dynamic field with userdata */\n+\t\t*rte_security_dynfield(mbuf) = (uint64_t)inb_priv->userdata;\n+\t}\n+\n+\t/* Frag-3: */\n+\tif (hdr->w0.num_frags > 3) {\n+\t\twqe = (uint64_t *)(rte_be_to_cpu_64(*(frag_ptr + 1)));\n+\t\trlen = ((*(wqe + 10)) >> 16) & 0xFFFF;\n+\n+\t\tfrag_rx = (union nix_rx_parse_u *)(wqe + 1);\n+\t\tfrag_size = rlen + frag_rx->lcptr - frag_rx->laptr;\n+\t\tfrag_rx->pkt_lenm1 = frag_size - 1;\n+\n+\t\tmbuf->next = (struct rte_mbuf *)(wqe - sizeof(struct rte_mbuf));\n+\t\tmbuf = mbuf->next;\n+\t\tmbuf->data_len = frag_size;\n+\t\tmbuf->pkt_len = frag_size;\n+\n+\t\t/* Update dynamic field with userdata */\n+\t\t*rte_security_dynfield(mbuf) = (uint64_t)inb_priv->userdata;\n+\t}\n+\n+\tmbuf->next = NULL;\n+\treturn head;\n+}\n+\n+static struct rte_mbuf *\n+nix_sec_reassemble_frags(const struct cpt_parse_hdr_s *hdr, uint64_t cq_w1, uint64_t cq_w5)\n+{\n+\tuint32_t fragx_sum, pkt_hdr_len, l3_hdr_size;\n+\tuint32_t offset = hdr->w2.fi_offset;\n+\tunion nix_rx_parse_u *inner_rx;\n+\tunion nix_rx_parse_u *frag_rx;\n+\tstruct cpt_frag_info_s *finfo;\n+\tstruct rte_mbuf *head, *mbuf;\n+\trte_iova_t *inner_iova;\n+\tuint64_t *frag_ptr;\n+\tuint16_t frag_size;\n+\tuint16_t rlen;\n+\tuint64_t *wqe;\n+\n+\t/* offset of 0 implies 256B, otherwise it implies offset*8B */\n+\toffset = (((offset - 1) & 0x1f) + 1) * 8;\n+\tfinfo = RTE_PTR_ADD(hdr, offset + hdr->w2.fi_pad);\n+\n+\t/* Frag-0: */\n+\twqe = (uint64_t *)rte_be_to_cpu_64(hdr->wqe_ptr);\n+\tinner_rx = (union nix_rx_parse_u *)(wqe + 1);\n+\tinner_iova = (rte_iova_t *)*(wqe + 9);\n+\n+\t/* Update only the the upper 28-bits from meta pkt parse info */\n+\t*((uint64_t *)inner_rx) = ((*((uint64_t *)inner_rx) & ((1ULL << 36) - 1)) |\n+\t\t\t\t(cq_w1 & ~((1ULL << 36) - 1)));\n+\n+\trlen = ((*(wqe + 10)) >> 16) & 0xFFFF;\n+\tfrag_size = rlen + ((cq_w5 >> 16) & 0xFF) - (cq_w5 & 0xFF);\n+\tfragx_sum = rte_be_to_cpu_16(finfo->w1.frag_size0);\n+\tpkt_hdr_len = frag_size - fragx_sum;\n+\n+\tmbuf = (struct rte_mbuf *)((uintptr_t)wqe - sizeof(struct rte_mbuf));\n+\tmbuf->data_len = frag_size;\n+\thead = mbuf;\n+\n+\tif (inner_rx->lctype == NPC_LT_LC_IP) {\n+\t\tstruct rte_ipv4_hdr *hdr = (struct rte_ipv4_hdr *)RTE_PTR_ADD(\n+\t\t\tinner_iova, inner_rx->lcptr);\n+\n+\t\tl3_hdr_size = (hdr->version_ihl & 0xf) << 2;\n+\t} else {\n+\t\tstruct rte_ipv6_hdr *hdr = (struct rte_ipv6_hdr *)RTE_PTR_ADD(\n+\t\t\tinner_iova, inner_rx->lcptr);\n+\t\tsize_t ext_len = sizeof(struct rte_ipv6_hdr);\n+\t\tuint8_t *nxt_hdr = (uint8_t *)hdr;\n+\t\tint nh = hdr->proto;\n+\n+\t\tl3_hdr_size = 0;\n+\t\twhile (nh != -EINVAL) {\n+\t\t\tnxt_hdr += ext_len;\n+\t\t\tl3_hdr_size += ext_len;\n+\t\t\tnh = rte_ipv6_get_next_ext(nxt_hdr, nh, &ext_len);\n+\t\t}\n+\t}\n+\n+\t/* Frag-1: */\n+\twqe = (uint64_t *)(rte_be_to_cpu_64(hdr->frag1_wqe_ptr));\n+\tfrag_size = rte_be_to_cpu_16(finfo->w1.frag_size1);\n+\tfrag_rx = (union nix_rx_parse_u *)(wqe + 1);\n+\n+\tmbuf->next = (struct rte_mbuf *)((uintptr_t)wqe - sizeof(struct rte_mbuf));\n+\tmbuf = mbuf->next;\n+\tmbuf->data_len = frag_size;\n+\tmbuf->data_off =\n+\t\t(*(wqe + 9) - (uint64_t)wqe) + frag_rx->lcptr + l3_hdr_size;\n+\tfragx_sum += frag_size;\n+\n+\t/* Frag-2: */\n+\tif (hdr->w0.num_frags > 2) {\n+\t\tfrag_ptr = (uint64_t *)(finfo + 1);\n+\t\twqe = (uint64_t *)(rte_be_to_cpu_64(*frag_ptr));\n+\t\tfrag_size = rte_be_to_cpu_16(finfo->w1.frag_size2);\n+\t\tfrag_rx = (union nix_rx_parse_u *)(wqe + 1);\n+\n+\t\tmbuf->next = (struct rte_mbuf *)((uintptr_t)wqe - sizeof(struct rte_mbuf));\n+\t\tmbuf = mbuf->next;\n+\t\tmbuf->data_len = frag_size;\n+\t\tmbuf->data_off = (*(wqe + 9) - (uint64_t)wqe) + frag_rx->lcptr +\n+\t\t\t\t l3_hdr_size;\n+\t\tfragx_sum += frag_size;\n+\t}\n+\n+\t/* Frag-3: */\n+\tif (hdr->w0.num_frags > 3) {\n+\t\twqe = (uint64_t *)(rte_be_to_cpu_64(*(frag_ptr + 1)));\n+\t\tfrag_size = rte_be_to_cpu_16(finfo->w1.frag_size3);\n+\t\tfrag_rx = (union nix_rx_parse_u *)(wqe + 1);\n+\n+\t\tmbuf->next = (struct rte_mbuf *)((uintptr_t)wqe - sizeof(struct rte_mbuf));\n+\t\tmbuf = mbuf->next;\n+\t\tmbuf->data_len = frag_size;\n+\t\tmbuf->data_off = (*(wqe + 9) - (uint64_t)wqe) + frag_rx->lcptr +\n+\t\t\t\t l3_hdr_size;\n+\t\tfragx_sum += frag_size;\n+\t}\n+\n+\tif (inner_rx->lctype == NPC_LT_LC_IP) {\n+\t\tstruct rte_ipv4_hdr *hdr = (struct rte_ipv4_hdr *)RTE_PTR_ADD(\n+\t\t\tinner_iova, inner_rx->lcptr);\n+\n+\t\thdr->fragment_offset = 0;\n+\t\thdr->total_length = rte_cpu_to_be_16(fragx_sum + l3_hdr_size);\n+\t\thdr->hdr_checksum = 0;\n+\t\thdr->hdr_checksum = rte_ipv4_cksum(hdr);\n+\n+\t\tinner_rx->pkt_lenm1 = pkt_hdr_len + fragx_sum - 1;\n+\t} else {\n+\t\t/* Remove the frag header by moving header 8 bytes forward */\n+\t\tstruct rte_ipv6_hdr *hdr = (struct rte_ipv6_hdr *)RTE_PTR_ADD(\n+\t\t\tinner_iova, inner_rx->lcptr);\n+\n+\t\thdr->payload_len = rte_cpu_to_be_16(\n+\t\t\tfragx_sum + l3_hdr_size - 8 - sizeof(struct rte_ipv6_hdr));\n+\n+\t\trte_memcpy(rte_pktmbuf_mtod_offset(head, void *, 8),\n+\t\t\t rte_pktmbuf_mtod(head, void *),\n+\t\t\t inner_rx->lcptr + sizeof(struct rte_ipv6_hdr));\n+\n+\t\tinner_rx->pkt_lenm1 = pkt_hdr_len + fragx_sum -8 - 1;\n+\t\thead->data_len -= 8;\n+\t\thead->data_off += 8;\n+\t}\n+\tmbuf->next = NULL;\n+\thead->pkt_len = inner_rx->pkt_lenm1 + 1;\n+\n+\treturn head;\n+}\n+\n static __rte_always_inline struct rte_mbuf *\n-nix_sec_meta_to_mbuf_sc(uint64_t cq_w1, const uint64_t sa_base, uintptr_t laddr,\n-\t\t\tuint8_t *loff, struct rte_mbuf *mbuf, uint16_t data_off)\n+nix_sec_meta_to_mbuf_sc(uint64_t cq_w1, uint64_t cq_w5, const uint64_t sa_base,\n+\t\t\tuintptr_t laddr,\n+\t\t\tuint8_t *loff, struct rte_mbuf *mbuf, uint16_t data_off,\n+\t\t\tconst uint16_t flags)\n {\n \tconst void *__p = (void *)((uintptr_t)mbuf + (uint16_t)data_off);\n \tconst struct cpt_parse_hdr_s *hdr = (const struct cpt_parse_hdr_s *)__p;\n@@ -98,7 +322,82 @@ nix_sec_meta_to_mbuf_sc(uint64_t cq_w1, const uint64_t sa_base, uintptr_t laddr,\n \tvoid *inb_sa;\n \tuint64_t w0;\n \n-\tif (cq_w1 & BIT(11)) {\n+\tif ((flags & NIX_RX_OFFLOAD_REASSEMBLY_F) && (cq_w1 & BIT(11))) {\n+\t\t/* Get SPI from CPT_PARSE_S's cookie(already swapped) */\n+\t\tw0 = hdr->w0.u64;\n+\t\tsa_idx = w0 >> 32;\n+\n+\t\tinb_sa = roc_nix_inl_ot_ipsec_inb_sa(sa_base, sa_idx);\n+\t\tinb_priv = roc_nix_inl_ot_ipsec_inb_sa_sw_rsvd(inb_sa);\n+\n+\t\tif (!(hdr->w0.err_sum) && !(hdr->w0.reas_sts)) {\n+\t\t\tif (hdr->w0.num_frags) {\n+\t\t\t\t/* Reassembly success */\n+\t\t\t\tinner = nix_sec_reassemble_frags(hdr, cq_w1, cq_w5);\n+\n+\t\t\t\t/* Update dynamic field with userdata */\n+\t\t\t\t*rte_security_dynfield(inner) =\n+\t\t\t\t\t(uint64_t)inb_priv->userdata;\n+\t\t\t} else {\n+\t\t\t\tconst uint64_t *sg;\n+\t\t\t\tuint16_t len;\n+\n+\t\t\t\t/* No Reassembly */\n+\t\t\t\tinner = (struct rte_mbuf\n+\t\t\t\t\t\t *)(rte_be_to_cpu_64(\n+\t\t\t\t\t\t\t hdr->wqe_ptr) -\n+\t\t\t\t\t\t sizeof(struct rte_mbuf));\n+\n+\t\t\t\t/* Update dynamic field with userdata */\n+\t\t\t\t*rte_security_dynfield(inner) =\n+\t\t\t\t\t(uint64_t)inb_priv->userdata;\n+\n+\t\t\t\tsg = (const uint64_t *)(inner + 1);\n+\t\t\t\tlen = (((uint64_t)sg[10] >> 16) & 0xFFFF);\n+\t\t\t\tinner->pkt_len =\n+\t\t\t\t\t(hdr->w2.il3_off -\n+\t\t\t\t\t sizeof(struct cpt_parse_hdr_s) -\n+\t\t\t\t\t (w0 & 0x7)) +\n+\t\t\t\t\tlen;\n+\t\t\t\tinner->data_len = inner->pkt_len;\n+\t\t\t}\n+\t\t} else {\n+\t\t\tif (hdr->w0.err_sum) {\n+\t\t\t\t/* ucode error */\n+\t\t\t\tconst uint64_t *sg;\n+\t\t\t\tuint16_t len;\n+\n+\t\t\t\tinner = (struct rte_mbuf\n+\t\t\t\t\t\t *)(rte_be_to_cpu_64(\n+\t\t\t\t\t\t\t hdr->wqe_ptr) -\n+\t\t\t\t\t\t sizeof(struct rte_mbuf));\n+\n+\t\t\t\t/* Update dynamic field with userdata */\n+\t\t\t\t*rte_security_dynfield(inner) =\n+\t\t\t\t\t(uint64_t)inb_priv->userdata;\n+\n+\t\t\t\tsg = (const uint64_t *)(inner + 1);\n+\t\t\t\tlen = (((uint64_t)sg[10] >> 16) & 0xFFFF);\n+\t\t\t\tinner->pkt_len =\n+\t\t\t\t\t(hdr->w2.il3_off -\n+\t\t\t\t\t sizeof(struct cpt_parse_hdr_s) -\n+\t\t\t\t\t (w0 & 0x7)) +\n+\t\t\t\t\tlen;\n+\t\t\t\tinner->data_len = inner->pkt_len;\n+\t\t\t} else if (!(hdr->w0.err_sum)) {\n+\t\t\t\t/* reassembly failure */\n+\t\t\t\tinner = nix_sec_attach_frags(hdr, inb_priv);\n+\t\t\t}\n+\t\t}\n+\n+\t\t/* Store meta in lmtline to free\n+\t\t * Assume all meta's from same aura.\n+\t\t */\n+\t\t*(uint64_t *)(laddr + (*loff << 3)) = (uint64_t)mbuf;\n+\t\t*loff = *loff + 1;\n+\n+\t\treturn inner;\n+\t} else if (cq_w1 & BIT(11)) {\n \t\tinner = (struct rte_mbuf *)(rte_be_to_cpu_64(hdr->wqe_ptr) -\n \t\t\t\t\t sizeof(struct rte_mbuf));\n \n@@ -130,9 +429,10 @@ nix_sec_meta_to_mbuf_sc(uint64_t cq_w1, const uint64_t sa_base, uintptr_t laddr,\n #if defined(RTE_ARCH_ARM64)\n \n static __rte_always_inline struct rte_mbuf *\n-nix_sec_meta_to_mbuf(uint64_t cq_w1, uintptr_t sa_base, uintptr_t laddr,\n+nix_sec_meta_to_mbuf(uint64_t cq_w1, uint64_t cq_w5, uintptr_t sa_base, uintptr_t laddr,\n \t\t uint8_t *loff, struct rte_mbuf *mbuf, uint16_t data_off,\n-\t\t uint8x16_t *rx_desc_field1, uint64_t *ol_flags)\n+\t\t uint8x16_t *rx_desc_field1, uint64_t *ol_flags,\n+\t\t const uint16_t flags)\n {\n \tconst void *__p = (void *)((uintptr_t)mbuf + (uint16_t)data_off);\n \tconst struct cpt_parse_hdr_s *hdr = (const struct cpt_parse_hdr_s *)__p;\n@@ -144,7 +444,112 @@ nix_sec_meta_to_mbuf(uint64_t cq_w1, uintptr_t sa_base, uintptr_t laddr,\n \tuint16_t len;\n \tuint64_t w0;\n \n-\tif (cq_w1 & BIT(11)) {\n+\tif ((flags & NIX_RX_OFFLOAD_REASSEMBLY_F) && (cq_w1 & BIT(11))) {\n+\n+\t\tw0 = hdr->w0.u64;\n+\t\tsa_idx = w0 >> 32;\n+\n+\t\t/* Get SPI from CPT_PARSE_S's cookie(already swapped) */\n+\t\tw0 = hdr->w0.u64;\n+\t\tsa_idx = w0 >> 32;\n+\n+\t\tinb_sa = roc_nix_inl_ot_ipsec_inb_sa(sa_base, sa_idx);\n+\t\tinb_priv = roc_nix_inl_ot_ipsec_inb_sa_sw_rsvd(inb_sa);\n+\n+\t\tif (!(hdr->w0.err_sum) && !(hdr->w0.reas_sts)) {\n+\t\t\tif (hdr->w0.num_frags) {\n+\t\t\t\t/* Reassembly success */\n+\t\t\t\tinner = nix_sec_reassemble_frags(hdr, cq_w1, cq_w5);\n+\n+\t\t\t\t/* Update dynamic field with userdata */\n+\t\t\t\t*rte_security_dynfield(inner) =\n+\t\t\t\t\t(uint64_t)inb_priv->userdata;\n+\t\t\t} else {\n+\n+\t\t\t\tinner = (struct rte_mbuf\n+\t\t\t\t\t\t *)(rte_be_to_cpu_64(\n+\t\t\t\t\t\t\t hdr->wqe_ptr) -\n+\t\t\t\t\t\t sizeof(struct rte_mbuf));\n+\t\t\t\t/* Update dynamic field with userdata */\n+\t\t\t\t*rte_security_dynfield(inner) =\n+\t\t\t\t\t(uint64_t)inb_priv->userdata;\n+\n+\t\t\t\t/* CPT result(struct cpt_cn10k_res_s) is at\n+\t\t\t\t * after first IOVA in meta\n+\t\t\t\t */\n+\t\t\t\tsg = (uint64_t *)(inner + 1);\n+\t\t\t\tres_w1 = sg[10];\n+\n+\t\t\t\t/* Clear checksum flags and update security flag\n+\t\t\t\t */\n+\t\t\t\t*ol_flags &= ~(RTE_MBUF_F_RX_L4_CKSUM_MASK |\n+\t\t\t\t\t RTE_MBUF_F_RX_IP_CKSUM_MASK);\n+\t\t\t\t*ol_flags |=\n+\t\t\t\t\t(((res_w1 & 0xFF) == CPT_COMP_WARN) ?\n+\t\t\t\t\t\t RTE_MBUF_F_RX_SEC_OFFLOAD :\n+\t\t\t\t\t\t (RTE_MBUF_F_RX_SEC_OFFLOAD |\n+\t\t\t\t\t\t RTE_MBUF_F_RX_SEC_OFFLOAD_FAILED));\n+\t\t\t\t/* Calculate inner packet length */\n+\t\t\t\tlen = ((res_w1 >> 16) & 0xFFFF) +\n+\t\t\t\t hdr->w2.il3_off -\n+\t\t\t\t sizeof(struct cpt_parse_hdr_s) -\n+\t\t\t\t (w0 & 0x7);\n+\t\t\t\t/* Update pkt_len and data_len */\n+\t\t\t\t*rx_desc_field1 =\n+\t\t\t\t\tvsetq_lane_u16(len, *rx_desc_field1, 2);\n+\t\t\t\t*rx_desc_field1 =\n+\t\t\t\t\tvsetq_lane_u16(len, *rx_desc_field1, 4);\n+\t\t\t}\n+\t\t} else {\n+\t\t\tif (hdr->w0.err_sum) {\n+\t\t\t\tinner = (struct rte_mbuf\n+\t\t\t\t\t\t *)(rte_be_to_cpu_64(\n+\t\t\t\t\t\t\t hdr->wqe_ptr) -\n+\t\t\t\t\t\t sizeof(struct rte_mbuf));\n+\t\t\t\t/* Update dynamic field with userdata */\n+\t\t\t\t*rte_security_dynfield(inner) =\n+\t\t\t\t\t(uint64_t)inb_priv->userdata;\n+\n+\t\t\t\t/* CPT result(struct cpt_cn10k_res_s) is at\n+\t\t\t\t * after first IOVA in meta\n+\t\t\t\t */\n+\t\t\t\tsg = (uint64_t *)(inner + 1);\n+\t\t\t\tres_w1 = sg[10];\n+\n+\t\t\t\t/* Clear checksum flags and update security flag\n+\t\t\t\t */\n+\t\t\t\t*ol_flags &= ~(RTE_MBUF_F_RX_L4_CKSUM_MASK |\n+\t\t\t\t\t RTE_MBUF_F_RX_IP_CKSUM_MASK);\n+\t\t\t\t*ol_flags |=\n+\t\t\t\t\t(((res_w1 & 0xFF) == CPT_COMP_WARN) ?\n+\t\t\t\t\t\t RTE_MBUF_F_RX_SEC_OFFLOAD :\n+\t\t\t\t\t\t (RTE_MBUF_F_RX_SEC_OFFLOAD |\n+\t\t\t\t\t\t RTE_MBUF_F_RX_SEC_OFFLOAD_FAILED));\n+\t\t\t\t/* Calculate inner packet length */\n+\t\t\t\tlen = ((res_w1 >> 16) & 0xFFFF) +\n+\t\t\t\t hdr->w2.il3_off -\n+\t\t\t\t sizeof(struct cpt_parse_hdr_s) -\n+\t\t\t\t (w0 & 0x7);\n+\t\t\t\t/* Update pkt_len and data_len */\n+\t\t\t\t*rx_desc_field1 =\n+\t\t\t\t\tvsetq_lane_u16(len, *rx_desc_field1, 2);\n+\t\t\t\t*rx_desc_field1 =\n+\t\t\t\t\tvsetq_lane_u16(len, *rx_desc_field1, 4);\n+\t\t\t} else if (!(hdr->w0.err_sum)) {\n+\t\t\t\t/* reassembly failure */\n+\t\t\t\tinner = nix_sec_attach_frags(hdr, inb_priv);\n+\t\t\t}\n+\t\t}\n+\t\t/* Store meta in lmtline to free\n+\t\t * Assume all meta's from same aura.\n+\t\t */\n+\t\t*(uint64_t *)(laddr + (*loff << 3)) = (uint64_t)mbuf;\n+\t\t*loff = *loff + 1;\n+\n+\t\t/* Return inner mbuf */\n+\t\treturn inner;\n+\n+\t} else if (cq_w1 & BIT(11)) {\n \t\tinner = (struct rte_mbuf *)(rte_be_to_cpu_64(hdr->wqe_ptr) -\n \t\t\t\t\t sizeof(struct rte_mbuf));\n \t\t/* Get SPI from CPT_PARSE_S's cookie(already swapped) */\n@@ -320,7 +725,21 @@ cn10k_nix_cqe_to_mbuf(const struct nix_cqe_hdr_s *cq, const uint32_t tag,\n \t}\n \n \t/* Process Security packets */\n-\tif (flag & NIX_RX_OFFLOAD_SECURITY_F) {\n+\tif (flag & NIX_RX_OFFLOAD_REASSEMBLY_F) {\n+\t\tif (w1 & BIT(11)) {\n+\t\t\t/* CPT result(struct cpt_cn10k_res_s) is at\n+\t\t\t * after first IOVA in meta\n+\t\t\t */\n+\t\t\tconst uint64_t *sg = (const uint64_t *)(mbuf + 1);\n+\t\t\tconst uint64_t res_w1 = sg[10];\n+\t\t\tconst uint16_t uc_cc = res_w1 & 0xFF;\n+\n+\t\t\tol_flags |= ((uc_cc == CPT_COMP_WARN) ?\n+\t\t\t\t\t RTE_MBUF_F_RX_SEC_OFFLOAD :\n+\t\t\t\t\t (RTE_MBUF_F_RX_SEC_OFFLOAD |\n+\t\t\t\t\t RTE_MBUF_F_RX_SEC_OFFLOAD_FAILED));\n+\t\t}\n+\t} else if (flag & NIX_RX_OFFLOAD_SECURITY_F) {\n \t\tif (w1 & BIT(11)) {\n \t\t\t/* CPT result(struct cpt_cn10k_res_s) is at\n \t\t\t * after first IOVA in meta\n@@ -359,13 +778,20 @@ cn10k_nix_cqe_to_mbuf(const struct nix_cqe_hdr_s *cq, const uint32_t tag,\n \t\tol_flags = nix_update_match_id(rx->match_id, ol_flags, mbuf);\n \n \tmbuf->ol_flags = ol_flags;\n-\tmbuf->pkt_len = len;\n-\tmbuf->data_len = len;\n-\t*(uint64_t *)(&mbuf->rearm_data) = val;\n+\tif (!(flag & NIX_RX_OFFLOAD_REASSEMBLY_F)) {\n+\t\tmbuf->data_len = len;\n+\t\tmbuf->pkt_len = len;\n+\t\t*(uint64_t *)(&mbuf->rearm_data) = val;\n+\t} else {\n+\t\tuint16_t data_off = mbuf->data_off;\n+\n+\t\t*(uint64_t *)(&mbuf->rearm_data) = val;\n+\t\tmbuf->data_off = data_off;\n+\t}\n \n \tif (flag & NIX_RX_MULTI_SEG_F)\n \t\tnix_cqe_xtract_mseg(rx, mbuf, val, flag);\n-\telse\n+\telse if (!(flag & NIX_RX_OFFLOAD_REASSEMBLY_F))\n \t\tmbuf->next = NULL;\n }\n \n@@ -443,9 +869,11 @@ cn10k_nix_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts,\n \t\t/* Translate meta to mbuf */\n \t\tif (flags & NIX_RX_OFFLOAD_SECURITY_F) {\n \t\t\tconst uint64_t cq_w1 = *((const uint64_t *)cq + 1);\n+\t\t\tconst uint64_t cq_w5 = *((const uint64_t *)cq + 5);\n \n-\t\t\tmbuf = nix_sec_meta_to_mbuf_sc(cq_w1, sa_base, laddr,\n-\t\t\t\t\t\t &loff, mbuf, data_off);\n+\t\t\tmbuf = nix_sec_meta_to_mbuf_sc(cq_w1, cq_w5, sa_base, laddr,\n+\t\t\t\t\t\t &loff, mbuf, data_off,\n+\t\t\t\t\t\t flags);\n \t\t}\n \n \t\tcn10k_nix_cqe_to_mbuf(cq, cq->tag, mbuf, lookup_mem, mbuf_init,\n@@ -711,25 +1139,29 @@ cn10k_nix_recv_pkts_vector(void *args, struct rte_mbuf **mbufs, uint16_t pkts,\n \n \t\t/* Translate meta to mbuf */\n \t\tif (flags & NIX_RX_OFFLOAD_SECURITY_F) {\n+\t\t\tuint64_t cq0_w5 = *(uint64_t *)(cq0 + CQE_SZ(0) + 40);\n+\t\t\tuint64_t cq1_w5 = *(uint64_t *)(cq0 + CQE_SZ(1) + 40);\n+\t\t\tuint64_t cq2_w5 = *(uint64_t *)(cq0 + CQE_SZ(2) + 40);\n+\t\t\tuint64_t cq3_w5 = *(uint64_t *)(cq0 + CQE_SZ(3) + 40);\n \t\t\t/* Checksum ol_flags will be cleared if mbuf is meta */\n-\t\t\tmbuf0 = nix_sec_meta_to_mbuf(cq0_w1, sa_base, laddr,\n+\t\t\tmbuf0 = nix_sec_meta_to_mbuf(cq0_w1, cq0_w5, sa_base, laddr,\n \t\t\t\t\t\t &loff, mbuf0, d_off, &f0,\n-\t\t\t\t\t\t &ol_flags0);\n+\t\t\t\t\t\t &ol_flags0, flags);\n \t\t\tmbuf01 = vsetq_lane_u64((uint64_t)mbuf0, mbuf01, 0);\n \n-\t\t\tmbuf1 = nix_sec_meta_to_mbuf(cq1_w1, sa_base, laddr,\n+\t\t\tmbuf1 = nix_sec_meta_to_mbuf(cq1_w1, cq1_w5, sa_base, laddr,\n \t\t\t\t\t\t &loff, mbuf1, d_off, &f1,\n-\t\t\t\t\t\t &ol_flags1);\n+\t\t\t\t\t\t &ol_flags1, flags);\n \t\t\tmbuf01 = vsetq_lane_u64((uint64_t)mbuf1, mbuf01, 1);\n \n-\t\t\tmbuf2 = nix_sec_meta_to_mbuf(cq2_w1, sa_base, laddr,\n+\t\t\tmbuf2 = nix_sec_meta_to_mbuf(cq2_w1, cq2_w5, sa_base, laddr,\n \t\t\t\t\t\t &loff, mbuf2, d_off, &f2,\n-\t\t\t\t\t\t &ol_flags2);\n+\t\t\t\t\t\t &ol_flags2, flags);\n \t\t\tmbuf23 = vsetq_lane_u64((uint64_t)mbuf2, mbuf23, 0);\n \n-\t\t\tmbuf3 = nix_sec_meta_to_mbuf(cq3_w1, sa_base, laddr,\n+\t\t\tmbuf3 = nix_sec_meta_to_mbuf(cq3_w1, cq3_w5, sa_base, laddr,\n \t\t\t\t\t\t &loff, mbuf3, d_off, &f3,\n-\t\t\t\t\t\t &ol_flags3);\n+\t\t\t\t\t\t &ol_flags3, flags);\n \t\t\tmbuf23 = vsetq_lane_u64((uint64_t)mbuf3, mbuf23, 1);\n \t\t}\n \n@@ -986,6 +1418,7 @@ cn10k_nix_recv_pkts_vector(void *args, struct rte_mbuf **mbufs, uint16_t pkts,\n #define TS_F NIX_RX_OFFLOAD_TSTAMP_F\n #define RX_VLAN_F NIX_RX_OFFLOAD_VLAN_STRIP_F\n #define R_SEC_F NIX_RX_OFFLOAD_SECURITY_F\n+#define R_REAS_F NIX_RX_OFFLOAD_REASSEMBLY_F\n \n /* [R_SEC_F] [RX_VLAN_F] [TS] [MARK] [CKSUM] [PTYPE] [RSS] */\n #define NIX_RX_FASTPATH_MODES_0_15 \\\n@@ -1152,6 +1585,183 @@ cn10k_nix_recv_pkts_vector(void *args, struct rte_mbuf **mbufs, uint16_t pkts,\n \tR(sec_vlan_ts_mark_cksum_ptype_rss, \\\n \t R_SEC_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)\n \n+#define NIX_RX_FASTPATH_MODES_128_143 \\\n+\tR(reas, R_REAS_F) \\\n+\tR(reas_rss, R_REAS_F | RSS_F) \\\n+\tR(reas_ptype, R_REAS_F | PTYPE_F) \\\n+\tR(reas_ptype_rss, R_REAS_F | PTYPE_F | RSS_F) \\\n+\tR(reas_cksum, R_REAS_F | CKSUM_F) \\\n+\tR(reas_cksum_rss, R_REAS_F | CKSUM_F | RSS_F) \\\n+\tR(reas_cksum_ptype, R_REAS_F | CKSUM_F | PTYPE_F) \\\n+\tR(reas_cksum_ptype_rss, R_REAS_F | CKSUM_F | PTYPE_F | RSS_F) \\\n+\tR(reas_mark, R_REAS_F | MARK_F) \\\n+\tR(reas_mark_rss, R_REAS_F | MARK_F | RSS_F) \\\n+\tR(reas_mark_ptype, R_REAS_F | MARK_F | PTYPE_F) \\\n+\tR(reas_mark_ptype_rss, R_REAS_F | MARK_F | PTYPE_F | RSS_F) \\\n+\tR(reas_mark_cksum, R_REAS_F | MARK_F | CKSUM_F) \\\n+\tR(reas_mark_cksum_rss, R_REAS_F | MARK_F | CKSUM_F | RSS_F) \\\n+\tR(reas_mark_cksum_ptype, R_REAS_F | MARK_F | CKSUM_F | PTYPE_F) \\\n+\tR(reas_mark_cksum_ptype_rss, \\\n+\t R_REAS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)\n+\n+#define NIX_RX_FASTPATH_MODES_144_159 \\\n+\tR(reas_ts, R_REAS_F | TS_F) \\\n+\tR(reas_ts_rss, R_REAS_F | TS_F | RSS_F) \\\n+\tR(reas_ts_ptype, R_REAS_F | TS_F | PTYPE_F) \\\n+\tR(reas_ts_ptype_rss, R_REAS_F | TS_F | PTYPE_F | RSS_F) \\\n+\tR(reas_ts_cksum, R_REAS_F | TS_F | CKSUM_F) \\\n+\tR(reas_ts_cksum_rss, R_REAS_F | TS_F | CKSUM_F | RSS_F) \\\n+\tR(reas_ts_cksum_ptype, R_REAS_F | TS_F | CKSUM_F | PTYPE_F) \\\n+\tR(reas_ts_cksum_ptype_rss, R_REAS_F | TS_F | CKSUM_F | PTYPE_F | RSS_F) \\\n+\tR(reas_ts_mark, R_REAS_F | TS_F | MARK_F) \\\n+\tR(reas_ts_mark_rss, R_REAS_F | TS_F | MARK_F | RSS_F) \\\n+\tR(reas_ts_mark_ptype, R_REAS_F | TS_F | MARK_F | PTYPE_F) \\\n+\tR(reas_ts_mark_ptype_rss, R_REAS_F | TS_F | MARK_F | PTYPE_F | RSS_F) \\\n+\tR(reas_ts_mark_cksum, R_REAS_F | TS_F | MARK_F | CKSUM_F) \\\n+\tR(reas_ts_mark_cksum_rss, R_REAS_F | TS_F | MARK_F | CKSUM_F | RSS_F) \\\n+\tR(reas_ts_mark_cksum_ptype, \\\n+\t R_REAS_F | TS_F | MARK_F | CKSUM_F | PTYPE_F) \\\n+\tR(reas_ts_mark_cksum_ptype_rss, \\\n+\t R_REAS_F | TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)\n+\n+#define NIX_RX_FASTPATH_MODES_160_175 \\\n+\tR(reas_vlan, R_REAS_F | RX_VLAN_F) \\\n+\tR(reas_vlan_rss, R_REAS_F | RX_VLAN_F | RSS_F) \\\n+\tR(reas_vlan_ptype, R_REAS_F | RX_VLAN_F | PTYPE_F) \\\n+\tR(reas_vlan_ptype_rss, R_REAS_F | RX_VLAN_F | PTYPE_F | RSS_F) \\\n+\tR(reas_vlan_cksum, R_REAS_F | RX_VLAN_F | CKSUM_F) \\\n+\tR(reas_vlan_cksum_rss, R_REAS_F | RX_VLAN_F | CKSUM_F | RSS_F) \\\n+\tR(reas_vlan_cksum_ptype, R_REAS_F | RX_VLAN_F | CKSUM_F | PTYPE_F) \\\n+\tR(reas_vlan_cksum_ptype_rss, \\\n+\t R_REAS_F | RX_VLAN_F | CKSUM_F | PTYPE_F | RSS_F) \\\n+\tR(reas_vlan_mark, R_REAS_F | RX_VLAN_F | MARK_F) \\\n+\tR(reas_vlan_mark_rss, R_REAS_F | RX_VLAN_F | MARK_F | RSS_F) \\\n+\tR(reas_vlan_mark_ptype, R_REAS_F | RX_VLAN_F | MARK_F | PTYPE_F) \\\n+\tR(reas_vlan_mark_ptype_rss, \\\n+\t R_REAS_F | RX_VLAN_F | MARK_F | PTYPE_F | RSS_F) \\\n+\tR(reas_vlan_mark_cksum, R_REAS_F | RX_VLAN_F | MARK_F | CKSUM_F) \\\n+\tR(reas_vlan_mark_cksum_rss, \\\n+\t R_REAS_F | RX_VLAN_F | MARK_F | CKSUM_F | RSS_F) \\\n+\tR(reas_vlan_mark_cksum_ptype, \\\n+\t R_REAS_F | RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F) \\\n+\tR(reas_vlan_mark_cksum_ptype_rss, \\\n+\t R_REAS_F | RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)\n+\n+#define NIX_RX_FASTPATH_MODES_176_191 \\\n+\tR(reas_vlan_ts, R_REAS_F | RX_VLAN_F | TS_F) \\\n+\tR(reas_vlan_ts_rss, R_REAS_F | RX_VLAN_F | TS_F | RSS_F) \\\n+\tR(reas_vlan_ts_ptype, R_REAS_F | RX_VLAN_F | TS_F | PTYPE_F) \\\n+\tR(reas_vlan_ts_ptype_rss, R_REAS_F | RX_VLAN_F | TS_F | PTYPE_F | RSS_F) \\\n+\tR(reas_vlan_ts_cksum, R_REAS_F | RX_VLAN_F | TS_F | CKSUM_F) \\\n+\tR(reas_vlan_ts_cksum_rss, R_REAS_F | RX_VLAN_F | TS_F | CKSUM_F | RSS_F) \\\n+\tR(reas_vlan_ts_cksum_ptype, \\\n+\t R_REAS_F | RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F) \\\n+\tR(reas_vlan_ts_cksum_ptype_rss, \\\n+\t R_REAS_F | RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F | RSS_F) \\\n+\tR(reas_vlan_ts_mark, R_REAS_F | RX_VLAN_F | TS_F | MARK_F) \\\n+\tR(reas_vlan_ts_mark_rss, R_REAS_F | RX_VLAN_F | TS_F | MARK_F | RSS_F) \\\n+\tR(reas_vlan_ts_mark_ptype, \\\n+\t R_REAS_F | RX_VLAN_F | TS_F | MARK_F | PTYPE_F) \\\n+\tR(reas_vlan_ts_mark_ptype_rss, \\\n+\t R_REAS_F | RX_VLAN_F | TS_F | MARK_F | PTYPE_F | RSS_F) \\\n+\tR(reas_vlan_ts_mark_cksum, \\\n+\t R_REAS_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F) \\\n+\tR(reas_vlan_ts_mark_cksum_rss, \\\n+\t R_REAS_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F | RSS_F) \\\n+\tR(reas_vlan_ts_mark_cksum_ptype, \\\n+\t R_REAS_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F) \\\n+\tR(reas_vlan_ts_mark_cksum_ptype_rss, \\\n+\t R_REAS_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)\n+\n+#define NIX_RX_FASTPATH_MODES_192_207 \\\n+\tR(reas_sec, R_REAS_F | R_SEC_F) \\\n+\tR(reas_sec_rss, R_REAS_F | R_SEC_F | RSS_F) \\\n+\tR(reas_sec_ptype, R_REAS_F | R_SEC_F | PTYPE_F) \\\n+\tR(reas_sec_ptype_rss, R_REAS_F | R_SEC_F | PTYPE_F | RSS_F) \\\n+\tR(reas_sec_cksum, R_REAS_F | R_SEC_F | CKSUM_F) \\\n+\tR(reas_sec_cksum_rss, R_REAS_F | R_SEC_F | CKSUM_F | RSS_F) \\\n+\tR(reas_sec_cksum_ptype, R_REAS_F | R_SEC_F | CKSUM_F | PTYPE_F) \\\n+\tR(reas_sec_cksum_ptype_rss, R_REAS_F | R_SEC_F | CKSUM_F | PTYPE_F | RSS_F) \\\n+\tR(reas_sec_mark, R_REAS_F | R_SEC_F | MARK_F) \\\n+\tR(reas_sec_mark_rss, R_REAS_F | R_SEC_F | MARK_F | RSS_F) \\\n+\tR(reas_sec_mark_ptype, R_REAS_F | R_SEC_F | MARK_F | PTYPE_F) \\\n+\tR(reas_sec_mark_ptype_rss, R_REAS_F | R_SEC_F | MARK_F | PTYPE_F | RSS_F) \\\n+\tR(reas_sec_mark_cksum, R_REAS_F | R_SEC_F | MARK_F | CKSUM_F) \\\n+\tR(reas_sec_mark_cksum_rss, R_REAS_F | R_SEC_F | MARK_F | CKSUM_F | RSS_F) \\\n+\tR(reas_sec_mark_cksum_ptype, R_REAS_F | R_SEC_F | MARK_F | CKSUM_F | PTYPE_F) \\\n+\tR(reas_sec_mark_cksum_ptype_rss, \\\n+\t R_REAS_F | R_SEC_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)\n+\n+#define NIX_RX_FASTPATH_MODES_208_223 \\\n+\tR(reas_sec_ts, R_REAS_F | R_SEC_F | TS_F) \\\n+\tR(reas_sec_ts_rss, R_REAS_F | R_SEC_F | TS_F | RSS_F) \\\n+\tR(reas_sec_ts_ptype, R_REAS_F | R_SEC_F | TS_F | PTYPE_F) \\\n+\tR(reas_sec_ts_ptype_rss, R_REAS_F | R_SEC_F | TS_F | PTYPE_F | RSS_F) \\\n+\tR(reas_sec_ts_cksum, R_REAS_F | R_SEC_F | TS_F | CKSUM_F) \\\n+\tR(reas_sec_ts_cksum_rss, R_REAS_F | R_SEC_F | TS_F | CKSUM_F | RSS_F) \\\n+\tR(reas_sec_ts_cksum_ptype, R_REAS_F | R_SEC_F | TS_F | CKSUM_F | PTYPE_F) \\\n+\tR(reas_sec_ts_cksum_ptype_rss, R_REAS_F | R_SEC_F | TS_F | CKSUM_F | PTYPE_F | RSS_F) \\\n+\tR(reas_sec_ts_mark, R_REAS_F | R_SEC_F | TS_F | MARK_F) \\\n+\tR(reas_sec_ts_mark_rss, R_REAS_F | R_SEC_F | TS_F | MARK_F | RSS_F) \\\n+\tR(reas_sec_ts_mark_ptype, R_REAS_F | R_SEC_F | TS_F | MARK_F | PTYPE_F) \\\n+\tR(reas_sec_ts_mark_ptype_rss, R_REAS_F | R_SEC_F | TS_F | MARK_F | PTYPE_F | RSS_F) \\\n+\tR(reas_sec_ts_mark_cksum, R_REAS_F | R_SEC_F | TS_F | MARK_F | CKSUM_F) \\\n+\tR(reas_sec_ts_mark_cksum_rss, R_REAS_F | R_SEC_F | TS_F | MARK_F | CKSUM_F | RSS_F) \\\n+\tR(reas_sec_ts_mark_cksum_ptype, \\\n+\t R_REAS_F | R_SEC_F | TS_F | MARK_F | CKSUM_F | PTYPE_F) \\\n+\tR(reas_sec_ts_mark_cksum_ptype_rss, \\\n+\t R_REAS_F | R_SEC_F | TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)\n+\n+#define NIX_RX_FASTPATH_MODES_224_239 \\\n+\tR(reas_sec_vlan, R_REAS_F | R_SEC_F | RX_VLAN_F) \\\n+\tR(reas_sec_vlan_rss, R_REAS_F | R_SEC_F | RX_VLAN_F | RSS_F) \\\n+\tR(reas_sec_vlan_ptype, R_REAS_F | R_SEC_F | RX_VLAN_F | PTYPE_F) \\\n+\tR(reas_sec_vlan_ptype_rss, R_REAS_F | R_SEC_F | RX_VLAN_F | PTYPE_F | RSS_F) \\\n+\tR(reas_sec_vlan_cksum, R_REAS_F | R_SEC_F | RX_VLAN_F | CKSUM_F) \\\n+\tR(reas_sec_vlan_cksum_rss, R_REAS_F | R_SEC_F | RX_VLAN_F | CKSUM_F | RSS_F) \\\n+\tR(reas_sec_vlan_cksum_ptype, R_REAS_F | R_SEC_F | RX_VLAN_F | CKSUM_F | PTYPE_F) \\\n+\tR(reas_sec_vlan_cksum_ptype_rss, \\\n+\t R_REAS_F | R_SEC_F | RX_VLAN_F | CKSUM_F | PTYPE_F | RSS_F) \\\n+\tR(reas_sec_vlan_mark, R_REAS_F | R_SEC_F | RX_VLAN_F | MARK_F) \\\n+\tR(reas_sec_vlan_mark_rss, R_REAS_F | R_SEC_F | RX_VLAN_F | MARK_F | RSS_F) \\\n+\tR(reas_sec_vlan_mark_ptype, R_REAS_F | R_SEC_F | RX_VLAN_F | MARK_F | PTYPE_F) \\\n+\tR(reas_sec_vlan_mark_ptype_rss, \\\n+\t R_REAS_F | R_SEC_F | RX_VLAN_F | MARK_F | PTYPE_F | RSS_F) \\\n+\tR(reas_sec_vlan_mark_cksum, R_REAS_F | R_SEC_F | RX_VLAN_F | MARK_F | CKSUM_F) \\\n+\tR(reas_sec_vlan_mark_cksum_rss, \\\n+\t R_REAS_F | R_SEC_F | RX_VLAN_F | MARK_F | CKSUM_F | RSS_F) \\\n+\tR(reas_sec_vlan_mark_cksum_ptype, \\\n+\t R_REAS_F | R_SEC_F | RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F) \\\n+\tR(reas_sec_vlan_mark_cksum_ptype_rss, \\\n+\t R_REAS_F | R_SEC_F | RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)\n+\n+#define NIX_RX_FASTPATH_MODES_240_255 \\\n+\tR(reas_sec_vlan_ts, R_REAS_F | R_SEC_F | RX_VLAN_F | TS_F) \\\n+\tR(reas_sec_vlan_ts_rss, R_REAS_F | R_SEC_F | RX_VLAN_F | TS_F | RSS_F) \\\n+\tR(reas_sec_vlan_ts_ptype, R_REAS_F | R_SEC_F | RX_VLAN_F | TS_F | PTYPE_F) \\\n+\tR(reas_sec_vlan_ts_ptype_rss, R_REAS_F | R_SEC_F | RX_VLAN_F | TS_F | PTYPE_F | RSS_F) \\\n+\tR(reas_sec_vlan_ts_cksum, R_REAS_F | R_SEC_F | RX_VLAN_F | TS_F | CKSUM_F) \\\n+\tR(reas_sec_vlan_ts_cksum_rss, R_REAS_F | R_SEC_F | RX_VLAN_F | TS_F | CKSUM_F | RSS_F) \\\n+\tR(reas_sec_vlan_ts_cksum_ptype, \\\n+\t R_REAS_F | R_SEC_F | RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F) \\\n+\tR(reas_sec_vlan_ts_cksum_ptype_rss, \\\n+\t R_REAS_F | R_SEC_F | RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F | RSS_F) \\\n+\tR(reas_sec_vlan_ts_mark, R_REAS_F | R_SEC_F | RX_VLAN_F | TS_F | MARK_F) \\\n+\tR(reas_sec_vlan_ts_mark_rss, R_REAS_F | R_SEC_F | RX_VLAN_F | TS_F | MARK_F | RSS_F) \\\n+\tR(reas_sec_vlan_ts_mark_ptype, \\\n+\t R_REAS_F | R_SEC_F | RX_VLAN_F | TS_F | MARK_F | PTYPE_F) \\\n+\tR(reas_sec_vlan_ts_mark_ptype_rss, \\\n+\t R_REAS_F | R_SEC_F | RX_VLAN_F | TS_F | MARK_F | PTYPE_F | RSS_F) \\\n+\tR(reas_sec_vlan_ts_mark_cksum, \\\n+\t R_REAS_F | R_SEC_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F) \\\n+\tR(reas_sec_vlan_ts_mark_cksum_rss, \\\n+\t R_REAS_F | R_SEC_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F | RSS_F) \\\n+\tR(reas_sec_vlan_ts_mark_cksum_ptype, \\\n+\t R_REAS_F | R_SEC_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F) \\\n+\tR(reas_sec_vlan_ts_mark_cksum_ptype_rss, \\\n+\t R_REAS_F | R_SEC_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)\n+\n+\n #define NIX_RX_FASTPATH_MODES \\\n \tNIX_RX_FASTPATH_MODES_0_15 \\\n \tNIX_RX_FASTPATH_MODES_16_31 \\\n@@ -1160,7 +1770,15 @@ cn10k_nix_recv_pkts_vector(void *args, struct rte_mbuf **mbufs, uint16_t pkts,\n \tNIX_RX_FASTPATH_MODES_64_79 \\\n \tNIX_RX_FASTPATH_MODES_80_95 \\\n \tNIX_RX_FASTPATH_MODES_96_111 \\\n-\tNIX_RX_FASTPATH_MODES_112_127\n+\tNIX_RX_FASTPATH_MODES_112_127 \\\n+\tNIX_RX_FASTPATH_MODES_128_143 \\\n+\tNIX_RX_FASTPATH_MODES_144_159 \\\n+\tNIX_RX_FASTPATH_MODES_160_175 \\\n+\tNIX_RX_FASTPATH_MODES_176_191 \\\n+\tNIX_RX_FASTPATH_MODES_192_207 \\\n+\tNIX_RX_FASTPATH_MODES_208_223 \\\n+\tNIX_RX_FASTPATH_MODES_224_239 \\\n+\tNIX_RX_FASTPATH_MODES_240_255 \n \n #define R(name, flags) \\\n \tuint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_##name( \\\ndiff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c\nindex 74f625553d..47810a2c64 100644\n--- a/drivers/net/cnxk/cnxk_ethdev.c\n+++ b/drivers/net/cnxk/cnxk_ethdev.c\n@@ -12,6 +12,9 @@ nix_get_rx_offload_capa(struct cnxk_eth_dev *dev)\n \t dev->npc.switch_header_type == ROC_PRIV_FLAGS_HIGIG)\n \t\tcapa &= ~RTE_ETH_RX_OFFLOAD_TIMESTAMP;\n \n+\tif (roc_model_is_cn10ka() && !roc_nix_is_sdp(&dev->nix))\n+\t\tcapa |= RTE_ETH_RX_OFFLOAD_IP_REASSEMBLY;\n+\n \treturn capa;\n }\n \ndiff --git a/drivers/net/cnxk/cnxk_ethdev_ops.c b/drivers/net/cnxk/cnxk_ethdev_ops.c\nindex ce5f1f7240..6ae9c706d9 100644\n--- a/drivers/net/cnxk/cnxk_ethdev_ops.c\n+++ b/drivers/net/cnxk/cnxk_ethdev_ops.c\n@@ -65,6 +65,11 @@ cnxk_nix_info_get(struct rte_eth_dev *eth_dev, struct rte_eth_dev_info *devinfo)\n \t\t.nb_mtu_seg_max = CNXK_NIX_TX_NB_SEG_MAX,\n \t};\n \n+\tif (roc_model_is_cn10ka()) {\n+\t\tdevinfo->reass_capa.reass_timeout = 60 * 1000;\n+\t\tdevinfo->reass_capa.max_frags = 4;\n+\t}\n+\n \tdevinfo->speed_capa = dev->speed_capa;\n \tdevinfo->dev_capa = RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP |\n \t\t\t RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP;\ndiff --git a/drivers/net/cnxk/meson.build b/drivers/net/cnxk/meson.build\nindex 375c75d1c7..35b9b4fbdb 100644\n--- a/drivers/net/cnxk/meson.build\n+++ b/drivers/net/cnxk/meson.build\n@@ -120,6 +120,14 @@ sources += files(\n 'rx/cn10k/rx_80_95.c',\n 'rx/cn10k/rx_96_111.c',\n 'rx/cn10k/rx_112_127.c',\n+ 'rx/cn10k/rx_128_143.c',\n+ 'rx/cn10k/rx_144_159.c',\n+ 'rx/cn10k/rx_160_175.c',\n+ 'rx/cn10k/rx_176_191.c',\n+ 'rx/cn10k/rx_192_207.c',\n+ 'rx/cn10k/rx_208_223.c',\n+ 'rx/cn10k/rx_224_239.c',\n+ 'rx/cn10k/rx_240_255.c',\n 'rx/cn10k/rx_0_15_mseg.c',\n 'rx/cn10k/rx_16_31_mseg.c',\n 'rx/cn10k/rx_32_47_mseg.c',\n@@ -128,6 +136,14 @@ sources += files(\n 'rx/cn10k/rx_80_95_mseg.c',\n 'rx/cn10k/rx_96_111_mseg.c',\n 'rx/cn10k/rx_112_127_mseg.c',\n+ 'rx/cn10k/rx_128_143_mseg.c',\n+ 'rx/cn10k/rx_144_159_mseg.c',\n+ 'rx/cn10k/rx_160_175_mseg.c',\n+ 'rx/cn10k/rx_176_191_mseg.c',\n+ 'rx/cn10k/rx_192_207_mseg.c',\n+ 'rx/cn10k/rx_208_223_mseg.c',\n+ 'rx/cn10k/rx_224_239_mseg.c',\n+ 'rx/cn10k/rx_240_255_mseg.c',\n 'rx/cn10k/rx_0_15_vec.c',\n 'rx/cn10k/rx_16_31_vec.c',\n 'rx/cn10k/rx_32_47_vec.c',\n@@ -136,6 +152,14 @@ sources += files(\n 'rx/cn10k/rx_80_95_vec.c',\n 'rx/cn10k/rx_96_111_vec.c',\n 'rx/cn10k/rx_112_127_vec.c',\n+ 'rx/cn10k/rx_128_143_vec.c',\n+ 'rx/cn10k/rx_144_159_vec.c',\n+ 'rx/cn10k/rx_160_175_vec.c',\n+ 'rx/cn10k/rx_176_191_vec.c',\n+ 'rx/cn10k/rx_192_207_vec.c',\n+ 'rx/cn10k/rx_208_223_vec.c',\n+ 'rx/cn10k/rx_224_239_vec.c',\n+ 'rx/cn10k/rx_240_255_vec.c',\n 'rx/cn10k/rx_0_15_vec_mseg.c',\n 'rx/cn10k/rx_16_31_vec_mseg.c',\n 'rx/cn10k/rx_32_47_vec_mseg.c',\n@@ -144,6 +168,14 @@ sources += files(\n 'rx/cn10k/rx_80_95_vec_mseg.c',\n 'rx/cn10k/rx_96_111_vec_mseg.c',\n 'rx/cn10k/rx_112_127_vec_mseg.c',\n+ 'rx/cn10k/rx_128_143_vec_mseg.c',\n+ 'rx/cn10k/rx_144_159_vec_mseg.c',\n+ 'rx/cn10k/rx_160_175_vec_mseg.c',\n+ 'rx/cn10k/rx_176_191_vec_mseg.c',\n+ 'rx/cn10k/rx_192_207_vec_mseg.c',\n+ 'rx/cn10k/rx_208_223_vec_mseg.c',\n+ 'rx/cn10k/rx_224_239_vec_mseg.c',\n+ 'rx/cn10k/rx_240_255_vec_mseg.c',\n )\n \n sources += files(\ndiff --git a/drivers/net/cnxk/rx/cn10k/rx_128_143.c b/drivers/net/cnxk/rx/cn10k/rx_128_143.c\nnew file mode 100644\nindex 0000000000..8c33b5b383\n--- /dev/null\n+++ b/drivers/net/cnxk/rx/cn10k/rx_128_143.c\n@@ -0,0 +1,11 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_ethdev.h\"\n+#include \"cn10k_rx.h\"\n+\n+#define R(name, flags) NIX_RX_RECV(cn10k_nix_recv_pkts_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_128_143\n+#undef R\ndiff --git a/drivers/net/cnxk/rx/cn10k/rx_128_143_mseg.c b/drivers/net/cnxk/rx/cn10k/rx_128_143_mseg.c\nnew file mode 100644\nindex 0000000000..172fa190dd\n--- /dev/null\n+++ b/drivers/net/cnxk/rx/cn10k/rx_128_143_mseg.c\n@@ -0,0 +1,11 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_ethdev.h\"\n+#include \"cn10k_rx.h\"\n+\n+#define R(name, flags) NIX_RX_RECV_MSEG(cn10k_nix_recv_pkts_mseg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_128_143\n+#undef R\ndiff --git a/drivers/net/cnxk/rx/cn10k/rx_128_143_vec.c b/drivers/net/cnxk/rx/cn10k/rx_128_143_vec.c\nnew file mode 100644\nindex 0000000000..fa0182ee3c\n--- /dev/null\n+++ b/drivers/net/cnxk/rx/cn10k/rx_128_143_vec.c\n@@ -0,0 +1,11 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_ethdev.h\"\n+#include \"cn10k_rx.h\"\n+\n+#define R(name, flags) NIX_RX_RECV_VEC(cn10k_nix_recv_pkts_vec_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_128_143\n+#undef R\ndiff --git a/drivers/net/cnxk/rx/cn10k/rx_128_143_vec_mseg.c b/drivers/net/cnxk/rx/cn10k/rx_128_143_vec_mseg.c\nnew file mode 100644\nindex 0000000000..620d6817ed\n--- /dev/null\n+++ b/drivers/net/cnxk/rx/cn10k/rx_128_143_vec_mseg.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_ethdev.h\"\n+#include \"cn10k_rx.h\"\n+\n+#define R(name, flags) \\\n+\tNIX_RX_RECV_VEC_MSEG(cn10k_nix_recv_pkts_vec_mseg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_128_143\n+#undef R\ndiff --git a/drivers/net/cnxk/rx/cn10k/rx_144_159.c b/drivers/net/cnxk/rx/cn10k/rx_144_159.c\nnew file mode 100644\nindex 0000000000..4f5bf2be77\n--- /dev/null\n+++ b/drivers/net/cnxk/rx/cn10k/rx_144_159.c\n@@ -0,0 +1,11 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_ethdev.h\"\n+#include \"cn10k_rx.h\"\n+\n+#define R(name, flags) NIX_RX_RECV(cn10k_nix_recv_pkts_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_144_159\n+#undef R\ndiff --git a/drivers/net/cnxk/rx/cn10k/rx_144_159_mseg.c b/drivers/net/cnxk/rx/cn10k/rx_144_159_mseg.c\nnew file mode 100644\nindex 0000000000..acc2adbd2a\n--- /dev/null\n+++ b/drivers/net/cnxk/rx/cn10k/rx_144_159_mseg.c\n@@ -0,0 +1,11 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_ethdev.h\"\n+#include \"cn10k_rx.h\"\n+\n+#define R(name, flags) NIX_RX_RECV_MSEG(cn10k_nix_recv_pkts_mseg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_144_159\n+#undef R\ndiff --git a/drivers/net/cnxk/rx/cn10k/rx_144_159_vec.c b/drivers/net/cnxk/rx/cn10k/rx_144_159_vec.c\nnew file mode 100644\nindex 0000000000..cfb8ca424e\n--- /dev/null\n+++ b/drivers/net/cnxk/rx/cn10k/rx_144_159_vec.c\n@@ -0,0 +1,11 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_ethdev.h\"\n+#include \"cn10k_rx.h\"\n+\n+#define R(name, flags) NIX_RX_RECV_VEC(cn10k_nix_recv_pkts_vec_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_144_159\n+#undef R\ndiff --git a/drivers/net/cnxk/rx/cn10k/rx_144_159_vec_mseg.c b/drivers/net/cnxk/rx/cn10k/rx_144_159_vec_mseg.c\nnew file mode 100644\nindex 0000000000..68acf2f169\n--- /dev/null\n+++ b/drivers/net/cnxk/rx/cn10k/rx_144_159_vec_mseg.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_ethdev.h\"\n+#include \"cn10k_rx.h\"\n+\n+#define R(name, flags) \\\n+\tNIX_RX_RECV_VEC_MSEG(cn10k_nix_recv_pkts_vec_mseg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_144_159\n+#undef R\ndiff --git a/drivers/net/cnxk/rx/cn10k/rx_160_175.c b/drivers/net/cnxk/rx/cn10k/rx_160_175.c\nnew file mode 100644\nindex 0000000000..e14e730453\n--- /dev/null\n+++ b/drivers/net/cnxk/rx/cn10k/rx_160_175.c\n@@ -0,0 +1,11 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_ethdev.h\"\n+#include \"cn10k_rx.h\"\n+\n+#define R(name, flags) NIX_RX_RECV(cn10k_nix_recv_pkts_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_160_175\n+#undef R\ndiff --git a/drivers/net/cnxk/rx/cn10k/rx_160_175_mseg.c b/drivers/net/cnxk/rx/cn10k/rx_160_175_mseg.c\nnew file mode 100644\nindex 0000000000..fb0a551278\n--- /dev/null\n+++ b/drivers/net/cnxk/rx/cn10k/rx_160_175_mseg.c\n@@ -0,0 +1,11 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_ethdev.h\"\n+#include \"cn10k_rx.h\"\n+\n+#define R(name, flags) NIX_RX_RECV_MSEG(cn10k_nix_recv_pkts_mseg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_160_175\n+#undef R\ndiff --git a/drivers/net/cnxk/rx/cn10k/rx_160_175_vec.c b/drivers/net/cnxk/rx/cn10k/rx_160_175_vec.c\nnew file mode 100644\nindex 0000000000..eae8fb977a\n--- /dev/null\n+++ b/drivers/net/cnxk/rx/cn10k/rx_160_175_vec.c\n@@ -0,0 +1,11 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_ethdev.h\"\n+#include \"cn10k_rx.h\"\n+\n+#define R(name, flags) NIX_RX_RECV_VEC(cn10k_nix_recv_pkts_vec_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_160_175\n+#undef R\ndiff --git a/drivers/net/cnxk/rx/cn10k/rx_160_175_vec_mseg.c b/drivers/net/cnxk/rx/cn10k/rx_160_175_vec_mseg.c\nnew file mode 100644\nindex 0000000000..89faf62fdc\n--- /dev/null\n+++ b/drivers/net/cnxk/rx/cn10k/rx_160_175_vec_mseg.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_ethdev.h\"\n+#include \"cn10k_rx.h\"\n+\n+#define R(name, flags) \\\n+\tNIX_RX_RECV_VEC_MSEG(cn10k_nix_recv_pkts_vec_mseg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_160_175\n+#undef R\ndiff --git a/drivers/net/cnxk/rx/cn10k/rx_176_191.c b/drivers/net/cnxk/rx/cn10k/rx_176_191.c\nnew file mode 100644\nindex 0000000000..0d25f35913\n--- /dev/null\n+++ b/drivers/net/cnxk/rx/cn10k/rx_176_191.c\n@@ -0,0 +1,11 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_ethdev.h\"\n+#include \"cn10k_rx.h\"\n+\n+#define R(name, flags) NIX_RX_RECV(cn10k_nix_recv_pkts_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_176_191\n+#undef R\ndiff --git a/drivers/net/cnxk/rx/cn10k/rx_176_191_mseg.c b/drivers/net/cnxk/rx/cn10k/rx_176_191_mseg.c\nnew file mode 100644\nindex 0000000000..dd67fefcbb\n--- /dev/null\n+++ b/drivers/net/cnxk/rx/cn10k/rx_176_191_mseg.c\n@@ -0,0 +1,11 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_ethdev.h\"\n+#include \"cn10k_rx.h\"\n+\n+#define R(name, flags) NIX_RX_RECV_MSEG(cn10k_nix_recv_pkts_mseg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_176_191\n+#undef R\ndiff --git a/drivers/net/cnxk/rx/cn10k/rx_176_191_vec.c b/drivers/net/cnxk/rx/cn10k/rx_176_191_vec.c\nnew file mode 100644\nindex 0000000000..a86ef5d24c\n--- /dev/null\n+++ b/drivers/net/cnxk/rx/cn10k/rx_176_191_vec.c\n@@ -0,0 +1,11 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_ethdev.h\"\n+#include \"cn10k_rx.h\"\n+\n+#define R(name, flags) NIX_RX_RECV_VEC(cn10k_nix_recv_pkts_vec_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_176_191\n+#undef R\ndiff --git a/drivers/net/cnxk/rx/cn10k/rx_176_191_vec_mseg.c b/drivers/net/cnxk/rx/cn10k/rx_176_191_vec_mseg.c\nnew file mode 100644\nindex 0000000000..c07a2ba7ce\n--- /dev/null\n+++ b/drivers/net/cnxk/rx/cn10k/rx_176_191_vec_mseg.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_ethdev.h\"\n+#include \"cn10k_rx.h\"\n+\n+#define R(name, flags) \\\n+\tNIX_RX_RECV_VEC_MSEG(cn10k_nix_recv_pkts_vec_mseg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_176_191\n+#undef R\ndiff --git a/drivers/net/cnxk/rx/cn10k/rx_192_207.c b/drivers/net/cnxk/rx/cn10k/rx_192_207.c\nnew file mode 100644\nindex 0000000000..45da8e9997\n--- /dev/null\n+++ b/drivers/net/cnxk/rx/cn10k/rx_192_207.c\n@@ -0,0 +1,11 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_ethdev.h\"\n+#include \"cn10k_rx.h\"\n+\n+#define R(name, flags) NIX_RX_RECV(cn10k_nix_recv_pkts_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_192_207\n+#undef R\ndiff --git a/drivers/net/cnxk/rx/cn10k/rx_192_207_mseg.c b/drivers/net/cnxk/rx/cn10k/rx_192_207_mseg.c\nnew file mode 100644\nindex 0000000000..869be355f9\n--- /dev/null\n+++ b/drivers/net/cnxk/rx/cn10k/rx_192_207_mseg.c\n@@ -0,0 +1,11 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_ethdev.h\"\n+#include \"cn10k_rx.h\"\n+\n+#define R(name, flags) NIX_RX_RECV_MSEG(cn10k_nix_recv_pkts_mseg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_192_207\n+#undef R\ndiff --git a/drivers/net/cnxk/rx/cn10k/rx_192_207_vec.c b/drivers/net/cnxk/rx/cn10k/rx_192_207_vec.c\nnew file mode 100644\nindex 0000000000..3d214158ec\n--- /dev/null\n+++ b/drivers/net/cnxk/rx/cn10k/rx_192_207_vec.c\n@@ -0,0 +1,11 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_ethdev.h\"\n+#include \"cn10k_rx.h\"\n+\n+#define R(name, flags) NIX_RX_RECV_VEC(cn10k_nix_recv_pkts_vec_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_192_207\n+#undef R\ndiff --git a/drivers/net/cnxk/rx/cn10k/rx_192_207_vec_mseg.c b/drivers/net/cnxk/rx/cn10k/rx_192_207_vec_mseg.c\nnew file mode 100644\nindex 0000000000..762e9f5512\n--- /dev/null\n+++ b/drivers/net/cnxk/rx/cn10k/rx_192_207_vec_mseg.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_ethdev.h\"\n+#include \"cn10k_rx.h\"\n+\n+#define R(name, flags) \\\n+\tNIX_RX_RECV_VEC_MSEG(cn10k_nix_recv_pkts_vec_mseg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_192_207\n+#undef R\ndiff --git a/drivers/net/cnxk/rx/cn10k/rx_208_223.c b/drivers/net/cnxk/rx/cn10k/rx_208_223.c\nnew file mode 100644\nindex 0000000000..ca64ab5fde\n--- /dev/null\n+++ b/drivers/net/cnxk/rx/cn10k/rx_208_223.c\n@@ -0,0 +1,11 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_ethdev.h\"\n+#include \"cn10k_rx.h\"\n+\n+#define R(name, flags) NIX_RX_RECV(cn10k_nix_recv_pkts_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_208_223\n+#undef R\ndiff --git a/drivers/net/cnxk/rx/cn10k/rx_208_223_mseg.c b/drivers/net/cnxk/rx/cn10k/rx_208_223_mseg.c\nnew file mode 100644\nindex 0000000000..35e443a06e\n--- /dev/null\n+++ b/drivers/net/cnxk/rx/cn10k/rx_208_223_mseg.c\n@@ -0,0 +1,11 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_ethdev.h\"\n+#include \"cn10k_rx.h\"\n+\n+#define R(name, flags) NIX_RX_RECV_MSEG(cn10k_nix_recv_pkts_mseg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_208_223\n+#undef R\ndiff --git a/drivers/net/cnxk/rx/cn10k/rx_208_223_vec.c b/drivers/net/cnxk/rx/cn10k/rx_208_223_vec.c\nnew file mode 100644\nindex 0000000000..b7f9feece2\n--- /dev/null\n+++ b/drivers/net/cnxk/rx/cn10k/rx_208_223_vec.c\n@@ -0,0 +1,11 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_ethdev.h\"\n+#include \"cn10k_rx.h\"\n+\n+#define R(name, flags) NIX_RX_RECV_VEC(cn10k_nix_recv_pkts_vec_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_208_223\n+#undef R\ndiff --git a/drivers/net/cnxk/rx/cn10k/rx_208_223_vec_mseg.c b/drivers/net/cnxk/rx/cn10k/rx_208_223_vec_mseg.c\nnew file mode 100644\nindex 0000000000..b3da6ec11e\n--- /dev/null\n+++ b/drivers/net/cnxk/rx/cn10k/rx_208_223_vec_mseg.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_ethdev.h\"\n+#include \"cn10k_rx.h\"\n+\n+#define R(name, flags) \\\n+\tNIX_RX_RECV_VEC_MSEG(cn10k_nix_recv_pkts_vec_mseg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_208_223\n+#undef R\ndiff --git a/drivers/net/cnxk/rx/cn10k/rx_224_239.c b/drivers/net/cnxk/rx/cn10k/rx_224_239.c\nnew file mode 100644\nindex 0000000000..bd288f3330\n--- /dev/null\n+++ b/drivers/net/cnxk/rx/cn10k/rx_224_239.c\n@@ -0,0 +1,11 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_ethdev.h\"\n+#include \"cn10k_rx.h\"\n+\n+#define R(name, flags) NIX_RX_RECV(cn10k_nix_recv_pkts_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_224_239\n+#undef R\ndiff --git a/drivers/net/cnxk/rx/cn10k/rx_224_239_mseg.c b/drivers/net/cnxk/rx/cn10k/rx_224_239_mseg.c\nnew file mode 100644\nindex 0000000000..bf5af065df\n--- /dev/null\n+++ b/drivers/net/cnxk/rx/cn10k/rx_224_239_mseg.c\n@@ -0,0 +1,11 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_ethdev.h\"\n+#include \"cn10k_rx.h\"\n+\n+#define R(name, flags) NIX_RX_RECV_MSEG(cn10k_nix_recv_pkts_mseg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_224_239\n+#undef R\ndiff --git a/drivers/net/cnxk/rx/cn10k/rx_224_239_vec.c b/drivers/net/cnxk/rx/cn10k/rx_224_239_vec.c\nnew file mode 100644\nindex 0000000000..c05bb99414\n--- /dev/null\n+++ b/drivers/net/cnxk/rx/cn10k/rx_224_239_vec.c\n@@ -0,0 +1,11 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_ethdev.h\"\n+#include \"cn10k_rx.h\"\n+\n+#define R(name, flags) NIX_RX_RECV_VEC(cn10k_nix_recv_pkts_vec_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_224_239\n+#undef R\ndiff --git a/drivers/net/cnxk/rx/cn10k/rx_224_239_vec_mseg.c b/drivers/net/cnxk/rx/cn10k/rx_224_239_vec_mseg.c\nnew file mode 100644\nindex 0000000000..5f7f8efdae\n--- /dev/null\n+++ b/drivers/net/cnxk/rx/cn10k/rx_224_239_vec_mseg.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_ethdev.h\"\n+#include \"cn10k_rx.h\"\n+\n+#define R(name, flags) \\\n+\tNIX_RX_RECV_VEC_MSEG(cn10k_nix_recv_pkts_vec_mseg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_224_239\n+#undef R\ndiff --git a/drivers/net/cnxk/rx/cn10k/rx_240_255.c b/drivers/net/cnxk/rx/cn10k/rx_240_255.c\nnew file mode 100644\nindex 0000000000..d72b2eec1c\n--- /dev/null\n+++ b/drivers/net/cnxk/rx/cn10k/rx_240_255.c\n@@ -0,0 +1,11 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_ethdev.h\"\n+#include \"cn10k_rx.h\"\n+\n+#define R(name, flags) NIX_RX_RECV(cn10k_nix_recv_pkts_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_240_255\n+#undef R\ndiff --git a/drivers/net/cnxk/rx/cn10k/rx_240_255_mseg.c b/drivers/net/cnxk/rx/cn10k/rx_240_255_mseg.c\nnew file mode 100644\nindex 0000000000..f248ad8c77\n--- /dev/null\n+++ b/drivers/net/cnxk/rx/cn10k/rx_240_255_mseg.c\n@@ -0,0 +1,11 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_ethdev.h\"\n+#include \"cn10k_rx.h\"\n+\n+#define R(name, flags) NIX_RX_RECV_MSEG(cn10k_nix_recv_pkts_mseg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_240_255\n+#undef R\ndiff --git a/drivers/net/cnxk/rx/cn10k/rx_240_255_vec.c b/drivers/net/cnxk/rx/cn10k/rx_240_255_vec.c\nnew file mode 100644\nindex 0000000000..7e81ed1883\n--- /dev/null\n+++ b/drivers/net/cnxk/rx/cn10k/rx_240_255_vec.c\n@@ -0,0 +1,11 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_ethdev.h\"\n+#include \"cn10k_rx.h\"\n+\n+#define R(name, flags) NIX_RX_RECV_VEC(cn10k_nix_recv_pkts_vec_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_240_255\n+#undef R\ndiff --git a/drivers/net/cnxk/rx/cn10k/rx_240_255_vec_mseg.c b/drivers/net/cnxk/rx/cn10k/rx_240_255_vec_mseg.c\nnew file mode 100644\nindex 0000000000..db8aeca013\n--- /dev/null\n+++ b/drivers/net/cnxk/rx/cn10k/rx_240_255_vec_mseg.c\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_ethdev.h\"\n+#include \"cn10k_rx.h\"\n+\n+#define R(name, flags) \\\n+\tNIX_RX_RECV_VEC_MSEG(cn10k_nix_recv_pkts_vec_mseg_##name, flags)\n+\n+NIX_RX_FASTPATH_MODES_240_255\n+#undef R\n", "prefixes": [ "2/5" ] }