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GET /api/patches/106107/?format=api
{ "id": 106107, "url": "http://patchwork.dpdk.org/api/patches/106107/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20220120025931.574106-2-stevex.yang@intel.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220120025931.574106-2-stevex.yang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220120025931.574106-2-stevex.yang@intel.com", "date": "2022-01-20T02:59:30", "name": "[1/2] net/ice: add module EEPROM ops for ice", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "9757a2ac6fca108885664c85b4a596b270ec90d4", "submitter": { "id": 1883, "url": "http://patchwork.dpdk.org/api/people/1883/?format=api", "name": "Steve Yang", "email": "stevex.yang@intel.com" }, "delegate": { "id": 1540, "url": "http://patchwork.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20220120025931.574106-2-stevex.yang@intel.com/mbox/", "series": [ { "id": 21270, "url": "http://patchwork.dpdk.org/api/series/21270/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=21270", "date": "2022-01-20T02:59:29", "name": "add module EEPROM ops for ice", "version": 1, "mbox": "http://patchwork.dpdk.org/series/21270/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/106107/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/106107/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 9C6F3A00C3;\n\tThu, 20 Jan 2022 04:06:10 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 08C944121E;\n\tThu, 20 Jan 2022 04:06:08 +0100 (CET)", "from mga05.intel.com (mga05.intel.com [192.55.52.43])\n by mails.dpdk.org (Postfix) with ESMTP id D8E384121E\n for <dev@dpdk.org>; Thu, 20 Jan 2022 04:06:05 +0100 (CET)", "from orsmga007.jf.intel.com ([10.7.209.58])\n by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 19 Jan 2022 19:06:05 -0800", "from intel-cd-odc-steve.cd.intel.com ([10.240.178.135])\n by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 19 Jan 2022 19:06:03 -0800" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1642647966; x=1674183966;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=I6pZDADp5YV0mPza7V+86ZO6V//iKb3GG45B9LJUc2M=;\n b=aoJLvzpJNWWyp2JhtAMPCSgZh1lewsAn26ACYfl9Acn7ZZM+cQSc8q2s\n 6ky0ODiFzBHnp20NN/LKgcqAJp+OJOMIT1NvE4Pbf+draJqbTNKxgNE2A\n A2OmgmU8FZb70niUp/slyB9riTM7jKZzklEtyerBanf+os3kthIDOkUW/\n xbh51sj7ai2m2qU/9SOBoQlU3Pc4+gbqWhRRPCB+qLGYcvLHvz/XPj1nH\n sIGt13z+7IxOuBc4D2se0JahDI6pZD0Cra98W6EDzjh5Mukd374MhCxkl\n dkALlLxDKbAlrPgcTPQ+MT8fVGukz8NAQ3y/0un0S7bdxpHPFI2/fxXKx w==;", "X-IronPort-AV": [ "E=McAfee;i=\"6200,9189,10232\"; a=\"331609490\"", "E=Sophos;i=\"5.88,301,1635231600\"; d=\"scan'208\";a=\"331609490\"", "E=Sophos;i=\"5.88,301,1635231600\"; d=\"scan'208\";a=\"518444142\"" ], "From": "Steve Yang <stevex.yang@intel.com>", "To": "dev@dpdk.org", "Cc": "Yuying.Zhang@intel.com, aman.deep.singh@intel.com, qiming.yang@intel.com,\n qi.z.zhang@intel.com, Steve Yang <stevex.yang@intel.com>", "Subject": "[PATCH 1/2] net/ice: add module EEPROM ops for ice", "Date": "Thu, 20 Jan 2022 02:59:30 +0000", "Message-Id": "<20220120025931.574106-2-stevex.yang@intel.com>", "X-Mailer": "git-send-email 2.27.0", "In-Reply-To": "<20220120025931.574106-1-stevex.yang@intel.com>", "References": "<20220120025931.574106-1-stevex.yang@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Add new callbacks for eth_dev_ops of ice to get the information\nand data of plugin module EEPROM.\n\nSigned-off-by: Steve Yang <stevex.yang@intel.com>\n---\n drivers/net/ice/ice_ethdev.c | 160 +++++++++++++++++++++++++++++++++++\n drivers/net/ice/ice_ethdev.h | 25 ++++++\n 2 files changed, 185 insertions(+)", "diff": "diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c\nindex 13a7a9702a..70c162d0a8 100644\n--- a/drivers/net/ice/ice_ethdev.c\n+++ b/drivers/net/ice/ice_ethdev.c\n@@ -139,6 +139,10 @@ static int ice_vlan_pvid_set(struct rte_eth_dev *dev,\n static int ice_get_eeprom_length(struct rte_eth_dev *dev);\n static int ice_get_eeprom(struct rte_eth_dev *dev,\n \t\t\t struct rte_dev_eeprom_info *eeprom);\n+static int ice_get_module_info(struct rte_eth_dev *dev,\n+\t\t\t struct rte_eth_dev_module_info *modinfo);\n+static int ice_get_module_eeprom(struct rte_eth_dev *dev,\n+\t\t\t\t struct rte_dev_eeprom_info *info);\n static int ice_stats_get(struct rte_eth_dev *dev,\n \t\t\t struct rte_eth_stats *stats);\n static int ice_stats_reset(struct rte_eth_dev *dev);\n@@ -238,6 +242,8 @@ static const struct eth_dev_ops ice_eth_dev_ops = {\n \t.tx_burst_mode_get = ice_tx_burst_mode_get,\n \t.get_eeprom_length = ice_get_eeprom_length,\n \t.get_eeprom = ice_get_eeprom,\n+\t.get_module_info = ice_get_module_info,\n+\t.get_module_eeprom = ice_get_module_eeprom,\n \t.stats_get = ice_stats_get,\n \t.stats_reset = ice_stats_reset,\n \t.xstats_get = ice_xstats_get,\n@@ -4934,6 +4940,160 @@ ice_get_eeprom(struct rte_eth_dev *dev,\n \treturn 0;\n }\n \n+static int\n+ice_get_module_info(struct rte_eth_dev *dev,\n+\t\t struct rte_eth_dev_module_info *modinfo)\n+{\n+\tstruct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tenum ice_status status;\n+\tu8 sff8472_comp = 0;\n+\tu8 sff8472_swap = 0;\n+\tu8 sff8636_rev = 0;\n+\tu8 value = 0;\n+\n+\tstatus = ice_aq_sff_eeprom(hw, 0, ICE_I2C_EEPROM_DEV_ADDR, 0x00, 0x00,\n+\t\t\t\t 0, &value, 1, 0, NULL);\n+\tif (status)\n+\t\treturn -EIO;\n+\n+\tswitch (value) {\n+\tcase ICE_MODULE_TYPE_SFP:\n+\t\tstatus = ice_aq_sff_eeprom(hw, 0, ICE_I2C_EEPROM_DEV_ADDR,\n+\t\t\t\t\t ICE_MODULE_SFF_8472_COMP, 0x00, 0,\n+\t\t\t\t\t &sff8472_comp, 1, 0, NULL);\n+\t\tif (status)\n+\t\t\treturn -EIO;\n+\t\tstatus = ice_aq_sff_eeprom(hw, 0, ICE_I2C_EEPROM_DEV_ADDR,\n+\t\t\t\t\t ICE_MODULE_SFF_8472_SWAP, 0x00, 0,\n+\t\t\t\t\t &sff8472_swap, 1, 0, NULL);\n+\t\tif (status)\n+\t\t\treturn -EIO;\n+\n+\t\tif (sff8472_swap & ICE_MODULE_SFF_ADDR_MODE) {\n+\t\t\tmodinfo->type = ICE_MODULE_SFF_8079;\n+\t\t\tmodinfo->eeprom_len = ICE_MODULE_SFF_8079_LEN;\n+\t\t} else if (sff8472_comp &&\n+\t\t\t (sff8472_swap & ICE_MODULE_SFF_DIAG_CAPAB)) {\n+\t\t\tmodinfo->type = ICE_MODULE_SFF_8472;\n+\t\t\tmodinfo->eeprom_len = ICE_MODULE_SFF_8472_LEN;\n+\t\t} else {\n+\t\t\tmodinfo->type = ICE_MODULE_SFF_8079;\n+\t\t\tmodinfo->eeprom_len = ICE_MODULE_SFF_8079_LEN;\n+\t\t}\n+\t\tbreak;\n+\tcase ICE_MODULE_TYPE_QSFP_PLUS:\n+\tcase ICE_MODULE_TYPE_QSFP28:\n+\t\tstatus = ice_aq_sff_eeprom(hw, 0, ICE_I2C_EEPROM_DEV_ADDR,\n+\t\t\t\t\t ICE_MODULE_REVISION_ADDR, 0x00, 0,\n+\t\t\t\t\t &sff8636_rev, 1, 0, NULL);\n+\t\tif (status)\n+\t\t\treturn -EIO;\n+\t\t/* Check revision compliance */\n+\t\tif (sff8636_rev > 0x02) {\n+\t\t\t/* Module is SFF-8636 compliant */\n+\t\t\tmodinfo->type = ICE_MODULE_SFF_8636;\n+\t\t\tmodinfo->eeprom_len = ICE_MODULE_QSFP_MAX_LEN;\n+\t\t} else {\n+\t\t\tmodinfo->type = ICE_MODULE_SFF_8436;\n+\t\t\tmodinfo->eeprom_len = ICE_MODULE_QSFP_MAX_LEN;\n+\t\t}\n+\t\tbreak;\n+\tdefault:\n+\t\tPMD_DRV_LOG(WARNING, \"SFF Module Type not recognized.\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\treturn 0;\n+}\n+\n+static int\n+ice_get_module_eeprom(struct rte_eth_dev *dev,\n+\t\t struct rte_dev_eeprom_info *info)\n+{\n+\tstruct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+#define SFF_READ_BLOCK_SIZE 8\n+#define I2C_BUSY_TRY_TIMES 4\n+#define I2C_USLEEP_MIN_TIME 1500\n+#define I2C_USLEEP_MAX_TIME 2500\n+\tuint8_t value[SFF_READ_BLOCK_SIZE] = {0};\n+\tuint8_t addr = ICE_I2C_EEPROM_DEV_ADDR;\n+\tuint8_t *data = info->data;\n+\tenum ice_status status;\n+\tbool is_sfp = false;\n+\tuint32_t i, j;\n+\tuint32_t offset = 0;\n+\tuint8_t page = 0;\n+\n+\tif (!info || !info->length || !data)\n+\t\treturn -EINVAL;\n+\n+\tstatus = ice_aq_sff_eeprom(hw, 0, addr, offset, page, 0, value, 1, 0,\n+\t\t\t\t NULL);\n+\tif (status)\n+\t\treturn -EIO;\n+\n+\tif (value[0] == ICE_MODULE_TYPE_SFP)\n+\t\tis_sfp = true;\n+\n+\tmemset(data, 0, info->length);\n+\tfor (i = 0; i < info->length; i += SFF_READ_BLOCK_SIZE) {\n+\t\toffset = i + info->offset;\n+\t\tpage = 0;\n+\n+\t\t/* Check if we need to access the other memory page */\n+\t\tif (is_sfp) {\n+\t\t\tif (offset >= ICE_MODULE_SFF_8079_LEN) {\n+\t\t\t\toffset -= ICE_MODULE_SFF_8079_LEN;\n+\t\t\t\taddr = ICE_I2C_EEPROM_DEV_ADDR2;\n+\t\t\t}\n+\t\t} else {\n+\t\t\twhile (offset >= ICE_MODULE_SFF_8436_LEN) {\n+\t\t\t\t/* Compute memory page number and offset. */\n+\t\t\t\toffset -= ICE_MODULE_SFF_8436_LEN / 2;\n+\t\t\t\tpage++;\n+\t\t\t}\n+\t\t}\n+\n+\t\t/* Bit 2 of eeprom address 0x02 declares upper\n+\t\t * pages are disabled on QSFP modules.\n+\t\t * SFP modules only ever use page 0.\n+\t\t */\n+\t\tif (page == 0 || !(data[0x2] & 0x4)) {\n+\t\t\t/* If i2c bus is busy due to slow page change or\n+\t\t\t * link management access, call can fail.\n+\t\t\t * This is normal. So we retry this a few times.\n+\t\t\t */\n+\t\t\tfor (j = 0; j < I2C_BUSY_TRY_TIMES; j++) {\n+\t\t\t\tstatus = ice_aq_sff_eeprom(hw, 0, addr, offset,\n+\t\t\t\t\t\t\t page, !is_sfp, value,\n+\t\t\t\t\t\t\t SFF_READ_BLOCK_SIZE,\n+\t\t\t\t\t\t\t 0, NULL);\n+\t\t\t\tPMD_DRV_LOG(DEBUG, \"SFF %02X %02X %02X %X = \"\n+\t\t\t\t\t\"%02X%02X%02X%02X.\"\n+\t\t\t\t\t\"%02X%02X%02X%02X (%X)\\n\",\n+\t\t\t\t\taddr, offset, page, is_sfp,\n+\t\t\t\t\tvalue[0], value[1],\n+\t\t\t\t\tvalue[2], value[3],\n+\t\t\t\t\tvalue[4], value[5],\n+\t\t\t\t\tvalue[6], value[7],\n+\t\t\t\t\tstatus);\n+\t\t\t\tif (status) {\n+\t\t\t\t\tusleep_range(I2C_USLEEP_MIN_TIME,\n+\t\t\t\t\t\t I2C_USLEEP_MAX_TIME);\n+\t\t\t\t\tmemset(value, 0, SFF_READ_BLOCK_SIZE);\n+\t\t\t\t\tcontinue;\n+\t\t\t\t}\n+\t\t\t\tbreak;\n+\t\t\t}\n+\n+\t\t\t/* Make sure we have enough room for the new block */\n+\t\t\tif ((i + SFF_READ_BLOCK_SIZE) < info->length)\n+\t\t\t\tmemcpy(data + i, value, SFF_READ_BLOCK_SIZE);\n+\t\t}\n+\t}\n+\n+\treturn 0;\n+}\n+\n static void\n ice_stat_update_32(struct ice_hw *hw,\n \t\t uint32_t reg,\ndiff --git a/drivers/net/ice/ice_ethdev.h b/drivers/net/ice/ice_ethdev.h\nindex 1242177b42..3ed580d438 100644\n--- a/drivers/net/ice/ice_ethdev.h\n+++ b/drivers/net/ice/ice_ethdev.h\n@@ -143,6 +143,31 @@\n /* Max number of flexible descriptor rxdid */\n #define ICE_FLEX_DESC_RXDID_MAX_NUM 64\n \n+#define ICE_I2C_EEPROM_DEV_ADDR\t\t0xA0\n+#define ICE_I2C_EEPROM_DEV_ADDR2\t0xA2\n+#define ICE_MODULE_TYPE_SFP\t\t0x03\n+#define ICE_MODULE_TYPE_QSFP_PLUS\t0x0D\n+#define ICE_MODULE_TYPE_QSFP28\t\t0x11\n+#define ICE_MODULE_SFF_ADDR_MODE\t0x04\n+#define ICE_MODULE_SFF_DIAG_CAPAB\t0x40\n+#define ICE_MODULE_REVISION_ADDR\t0x01\n+#define ICE_MODULE_SFF_8472_COMP\t0x5E\n+#define ICE_MODULE_SFF_8472_SWAP\t0x5C\n+#define ICE_MODULE_QSFP_MAX_LEN\t\t640\n+\n+/* EEPROM Standards for plug in modules */\n+#define ICE_MODULE_SFF_8079\t\t0x1\n+#define ICE_MODULE_SFF_8079_LEN\t\t256\n+#define ICE_MODULE_SFF_8472\t\t0x2\n+#define ICE_MODULE_SFF_8472_LEN\t\t512\n+#define ICE_MODULE_SFF_8636\t\t0x3\n+#define ICE_MODULE_SFF_8636_LEN\t\t256\n+#define ICE_MODULE_SFF_8636_MAX_LEN 640\n+#define ICE_MODULE_SFF_8436\t\t0x4\n+#define ICE_MODULE_SFF_8436_LEN\t\t256\n+#define ICE_MODULE_SFF_8436_MAX_LEN 640\n+\n+\n /* Per-channel register definitions */\n #define GLTSYN_AUX_OUT(_chan, _idx) (GLTSYN_AUX_OUT_0(_idx) + ((_chan) * 8))\n #define GLTSYN_CLKO(_chan, _idx) (GLTSYN_CLKO_0(_idx) + ((_chan) * 8))\n", "prefixes": [ "1/2" ] }