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GET /api/patches/107016/?format=api
{ "id": 107016, "url": "http://patchwork.dpdk.org/api/patches/107016/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20220208101129.69173-8-jiawenwu@trustnetic.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220208101129.69173-8-jiawenwu@trustnetic.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220208101129.69173-8-jiawenwu@trustnetic.com", "date": "2022-02-08T10:11:27", "name": "[7/9] net: add LED OEM support for wangxun devices", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "8c2461b831a2c60cd4db707a163787567854f9a1", "submitter": { "id": 1932, "url": "http://patchwork.dpdk.org/api/people/1932/?format=api", "name": "Jiawen Wu", "email": "jiawenwu@trustnetic.com" }, "delegate": { "id": 319, "url": "http://patchwork.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20220208101129.69173-8-jiawenwu@trustnetic.com/mbox/", "series": [ { "id": 21520, "url": "http://patchwork.dpdk.org/api/series/21520/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=21520", "date": "2022-02-08T10:11:20", "name": "Wangxun fixes and supports", "version": 1, "mbox": "http://patchwork.dpdk.org/series/21520/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/107016/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/107016/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 8B15FA04AD;\n\tTue, 8 Feb 2022 11:05:40 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 1BAF941165;\n\tTue, 8 Feb 2022 11:05:20 +0100 (CET)", "from smtpproxy21.qq.com (smtpbg704.qq.com [203.205.195.105])\n by mails.dpdk.org (Postfix) with ESMTP id 2ABD141159\n for <dev@dpdk.org>; Tue, 8 Feb 2022 11:05:17 +0100 (CET)", "from wxdbg.localdomain.com (unknown [183.129.236.74])\n by bizesmtp.qq.com (ESMTP) with\n id ; Tue, 08 Feb 2022 18:05:11 +0800 (CST)" ], "X-QQ-mid": "bizesmtp46t1644314712ts77djil", "X-QQ-SSF": "01400000002000F0L000B00A0000000", "X-QQ-FEAT": "XiHsc86esFPvmmn2YN0EWW/ljknav2cnlYqCQ3UVPlgkkEfaeFuOwCmms4IYz\n kjYVU5AOSteqUZEhtv2KR6VUv50cLsuVMh4m5quGwVcOiEHtZ7gQz+a21TupxFJeiy4H1o/\n lLeJypH5ZTBvU8Wn0UMTJNM/XWZDN6N2rpWs3Z0soORAMSojZPELLyf7pO7TOYyXFh2dCcp\n Y8nrojnKelLXLKMat2JHJQb4B/pyB/cyMU3OPcAjJofPdkYKfKOKvRsRuyRXtLAC+KyAWfO\n q5LajbTHuh6n+tbXSEar5wu7/dUIVpRNYVSg554hwK96Vq6qc+/YO57BG9paw82Kt1OurjE\n EE3gyGfZsh6u6+87NmW6FIwPqkpYt10cMl6pr8J", "X-QQ-GoodBg": "2", "From": "Jiawen Wu <jiawenwu@trustnetic.com>", "To": "dev@dpdk.org", "Cc": "Jiawen Wu <jiawenwu@trustnetic.com>", "Subject": "[PATCH 7/9] net: add LED OEM support for wangxun devices", "Date": "Tue, 8 Feb 2022 18:11:27 +0800", "Message-Id": "<20220208101129.69173-8-jiawenwu@trustnetic.com>", "X-Mailer": "git-send-email 2.27.0", "In-Reply-To": "<20220208101129.69173-1-jiawenwu@trustnetic.com>", "References": "<20220208101129.69173-1-jiawenwu@trustnetic.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-QQ-SENDSIZE": "520", "Feedback-ID": "bizesmtp:trustnetic.com:qybgforeign:qybgforeign1", "X-QQ-Bgrelay": "1", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Support custom LED OEM for ngbe and txgbe driver.\n\nSigned-off-by: Jiawen Wu <jiawenwu@trustnetic.com>\n---\n doc/guides/rel_notes/release_22_03.rst | 5 ++\n drivers/net/ngbe/base/ngbe_dummy.h | 5 ++\n drivers/net/ngbe/base/ngbe_hw.c | 1 +\n drivers/net/ngbe/base/ngbe_mng.c | 49 ++++++++++++++++++\n drivers/net/ngbe/base/ngbe_mng.h | 3 ++\n drivers/net/ngbe/base/ngbe_phy_mvl.c | 26 ++++++----\n drivers/net/ngbe/base/ngbe_phy_rtl.c | 34 +++++++++----\n drivers/net/ngbe/base/ngbe_type.h | 2 +\n drivers/net/ngbe/ngbe_ethdev.c | 7 +++\n drivers/net/txgbe/base/txgbe_hw.c | 21 ++++----\n drivers/net/txgbe/base/txgbe_mng.c | 69 ++++++++++++++++++++++++++\n drivers/net/txgbe/base/txgbe_mng.h | 7 +++\n drivers/net/txgbe/base/txgbe_regs.h | 12 +++--\n drivers/net/txgbe/txgbe_ethdev.c | 4 +-\n 14 files changed, 209 insertions(+), 36 deletions(-)", "diff": "diff --git a/doc/guides/rel_notes/release_22_03.rst b/doc/guides/rel_notes/release_22_03.rst\nindex 3b2517f4c3..76df76d96c 100644\n--- a/doc/guides/rel_notes/release_22_03.rst\n+++ b/doc/guides/rel_notes/release_22_03.rst\n@@ -72,6 +72,11 @@ New Features\n * **Updated Wangxun ngbe driver.**\n \n * Added support for devices of custom PHY interfaces.\n+ * Added LED OEM support.\n+\n+* **Updated Wangxun txgbe driver.**\n+\n+ * Added LED OEM support.\n \n * **Added an API to retrieve event port id of ethdev Rx adapter.**\n \ndiff --git a/drivers/net/ngbe/base/ngbe_dummy.h b/drivers/net/ngbe/base/ngbe_dummy.h\nindex d74c9f7b54..836206e325 100644\n--- a/drivers/net/ngbe/base/ngbe_dummy.h\n+++ b/drivers/net/ngbe/base/ngbe_dummy.h\n@@ -251,6 +251,10 @@ static inline s32 ngbe_set_phy_pause_adv_dummy(struct ngbe_hw *TUP0, u16 TUP1)\n {\n \treturn NGBE_ERR_OPS_DUMMY;\n }\n+static inline s32 ngbe_phy_led_oem_chk_dummy(struct ngbe_hw *TUP0, u32 *TUP1)\n+{\n+\treturn NGBE_ERR_OPS_DUMMY;\n+}\n \n /* struct ngbe_mbx_operations */\n static inline void ngbe_mbx_init_params_dummy(struct ngbe_hw *TUP0)\n@@ -332,6 +336,7 @@ static inline void ngbe_init_ops_dummy(struct ngbe_hw *hw)\n \thw->phy.get_adv_pause = ngbe_get_phy_advertised_pause_dummy;\n \thw->phy.get_lp_adv_pause = ngbe_get_phy_lp_advertised_pause_dummy;\n \thw->phy.set_pause_adv = ngbe_set_phy_pause_adv_dummy;\n+\thw->phy.led_oem_chk = ngbe_phy_led_oem_chk_dummy;\n \thw->mbx.init_params = ngbe_mbx_init_params_dummy;\n \thw->mbx.read = ngbe_mbx_read_dummy;\n \thw->mbx.write = ngbe_mbx_write_dummy;\ndiff --git a/drivers/net/ngbe/base/ngbe_hw.c b/drivers/net/ngbe/base/ngbe_hw.c\nindex 0eab3f59e1..ac0c709085 100644\n--- a/drivers/net/ngbe/base/ngbe_hw.c\n+++ b/drivers/net/ngbe/base/ngbe_hw.c\n@@ -1972,6 +1972,7 @@ s32 ngbe_init_ops_pf(struct ngbe_hw *hw)\n \tphy->read_reg_unlocked = ngbe_read_phy_reg_mdi;\n \tphy->write_reg_unlocked = ngbe_write_phy_reg_mdi;\n \tphy->reset_hw = ngbe_reset_phy;\n+\tphy->led_oem_chk = ngbe_phy_led_oem_chk;\n \n \t/* MAC */\n \tmac->init_hw = ngbe_init_hw;\ndiff --git a/drivers/net/ngbe/base/ngbe_mng.c b/drivers/net/ngbe/base/ngbe_mng.c\nindex 68e06e2c24..c6f4dc2e0b 100644\n--- a/drivers/net/ngbe/base/ngbe_mng.c\n+++ b/drivers/net/ngbe/base/ngbe_mng.c\n@@ -338,3 +338,52 @@ s32 ngbe_hic_check_cap(struct ngbe_hw *hw)\n \n \treturn err;\n }\n+\n+s32 ngbe_phy_led_oem_chk(struct ngbe_hw *hw, u32 *data)\n+{\n+\tstruct ngbe_hic_read_shadow_ram command;\n+\ts32 err;\n+\tint i;\n+\n+\tDEBUGFUNC(\"\\n\");\n+\n+\tcommand.hdr.req.cmd = FW_PHY_LED_CONF;\n+\tcommand.hdr.req.buf_lenh = 0;\n+\tcommand.hdr.req.buf_lenl = 0;\n+\tcommand.hdr.req.checksum = FW_DEFAULT_CHECKSUM;\n+\n+\t/* convert offset from words to bytes */\n+\tcommand.address = 0;\n+\t/* one word */\n+\tcommand.length = 0;\n+\n+\tfor (i = 0; i <= FW_CEM_MAX_RETRIES; i++) {\n+\t\terr = ngbe_host_interface_command(hw, (u32 *)&command,\n+\t\t\t\tsizeof(command),\n+\t\t\t\tNGBE_HI_COMMAND_TIMEOUT, true);\n+\t\tif (err)\n+\t\t\tcontinue;\n+\n+\t\tcommand.hdr.rsp.ret_status &= 0x1F;\n+\t\tif (command.hdr.rsp.ret_status !=\n+\t\t\tFW_CEM_RESP_STATUS_SUCCESS)\n+\t\t\terr = NGBE_ERR_HOST_INTERFACE_COMMAND;\n+\n+\t\tbreak;\n+\t}\n+\n+\tif (err)\n+\t\treturn err;\n+\n+\tif (command.address == FW_CHECKSUM_CAP_ST_PASS) {\n+\t\t*data = ((u32 *)&command)[2];\n+\t\terr = 0;\n+\t} else if (command.address == FW_CHECKSUM_CAP_ST_FAIL) {\n+\t\t*data = FW_CHECKSUM_CAP_ST_FAIL;\n+\t\terr = -1;\n+\t} else {\n+\t\terr = NGBE_ERR_EEPROM_CHECKSUM;\n+\t}\n+\n+\treturn err;\n+}\ndiff --git a/drivers/net/ngbe/base/ngbe_mng.h b/drivers/net/ngbe/base/ngbe_mng.h\nindex 321338a051..36257d6e5e 100644\n--- a/drivers/net/ngbe/base/ngbe_mng.h\n+++ b/drivers/net/ngbe/base/ngbe_mng.h\n@@ -26,6 +26,7 @@\n #define FW_DEFAULT_CHECKSUM 0xFF /* checksum always 0xFF */\n #define FW_NVM_DATA_OFFSET 3\n #define FW_EEPROM_CHECK_STATUS\t\t0xE9\n+#define FW_PHY_LED_CONF\t\t\t0xF1\n \n #define FW_CHECKSUM_CAP_ST_PASS\t0x80658383\n #define FW_CHECKSUM_CAP_ST_FAIL\t0x70657376\n@@ -101,4 +102,6 @@ s32 ngbe_hic_pcie_read(struct ngbe_hw *hw, u16 addr, u32 *buf, int len);\n s32 ngbe_hic_pcie_write(struct ngbe_hw *hw, u16 addr, u32 *buf, int len);\n \n s32 ngbe_hic_check_cap(struct ngbe_hw *hw);\n+s32 ngbe_phy_led_oem_chk(struct ngbe_hw *hw, u32 *data);\n+\n #endif /* _NGBE_MNG_H_ */\ndiff --git a/drivers/net/ngbe/base/ngbe_phy_mvl.c b/drivers/net/ngbe/base/ngbe_phy_mvl.c\nindex 8a4df90a42..01cb6b9bb3 100644\n--- a/drivers/net/ngbe/base/ngbe_phy_mvl.c\n+++ b/drivers/net/ngbe/base/ngbe_phy_mvl.c\n@@ -123,16 +123,9 @@ s32 ngbe_init_phy_mvl(struct ngbe_hw *hw)\n \tvalue = MVL_INTR_EN_ANC | MVL_INTR_EN_LSC;\n \thw->phy.write_reg(hw, MVL_INTR_EN, 0, value);\n \n-\t/* LED control */\n-\tngbe_write_phy_reg_mdi(hw, MVL_PAGE_SEL, 0, 3);\n-\tngbe_read_phy_reg_mdi(hw, MVL_LEDFCR, 0, &value);\n-\tvalue &= ~(MVL_LEDFCR_CTL0 | MVL_LEDFCR_CTL1);\n-\tvalue |= MVL_LEDFCR_CTL0_CONF | MVL_LEDFCR_CTL1_CONF;\n-\tngbe_write_phy_reg_mdi(hw, MVL_LEDFCR, 0, value);\n-\tngbe_read_phy_reg_mdi(hw, MVL_LEDPCR, 0, &value);\n-\tvalue &= ~(MVL_LEDPCR_CTL0 | MVL_LEDPCR_CTL1);\n-\tvalue |= MVL_LEDPCR_CTL0_CONF | MVL_LEDPCR_CTL1_CONF;\n-\tngbe_write_phy_reg_mdi(hw, MVL_LEDPCR, 0, value);\n+\tngbe_read_phy_reg_mdi(hw, MVL_CTRL, 0, &value);\n+\tvalue |= MVL_CTRL_PWDN;\n+\tngbe_write_phy_reg_mdi(hw, MVL_CTRL, 0, value);\n \n \treturn ret_val;\n }\n@@ -147,6 +140,19 @@ s32 ngbe_setup_phy_link_mvl(struct ngbe_hw *hw, u32 speed,\n \tDEBUGFUNC(\"ngbe_setup_phy_link_mvl\");\n \tUNREFERENCED_PARAMETER(autoneg_wait_to_complete);\n \n+\tif (hw->led_conf == 0xFFFF) {\n+\t\t/* LED control */\n+\t\tngbe_write_phy_reg_mdi(hw, MVL_PAGE_SEL, 0, 3);\n+\t\tngbe_read_phy_reg_mdi(hw, MVL_LEDFCR, 0, &value);\n+\t\tvalue &= ~(MVL_LEDFCR_CTL0 | MVL_LEDFCR_CTL1);\n+\t\tvalue |= MVL_LEDFCR_CTL0_CONF | MVL_LEDFCR_CTL1_CONF;\n+\t\tngbe_write_phy_reg_mdi(hw, MVL_LEDFCR, 0, value);\n+\t\tngbe_read_phy_reg_mdi(hw, MVL_LEDPCR, 0, &value);\n+\t\tvalue &= ~(MVL_LEDPCR_CTL0 | MVL_LEDPCR_CTL1);\n+\t\tvalue |= MVL_LEDPCR_CTL0_CONF | MVL_LEDPCR_CTL1_CONF;\n+\t\tngbe_write_phy_reg_mdi(hw, MVL_LEDPCR, 0, value);\n+\t}\n+\n \thw->phy.autoneg_advertised = 0;\n \n \tif (hw->phy.type == ngbe_phy_mvl) {\ndiff --git a/drivers/net/ngbe/base/ngbe_phy_rtl.c b/drivers/net/ngbe/base/ngbe_phy_rtl.c\nindex c59efe3153..f49d829dff 100644\n--- a/drivers/net/ngbe/base/ngbe_phy_rtl.c\n+++ b/drivers/net/ngbe/base/ngbe_phy_rtl.c\n@@ -36,6 +36,30 @@ s32 ngbe_write_phy_reg_rtl(struct ngbe_hw *hw,\n \treturn 0;\n }\n \n+static void ngbe_phy_led_ctrl_rtl(struct ngbe_hw *hw)\n+{\n+\tu16 value = 0;\n+\n+\tif (hw->led_conf != 0xFFFF)\n+\t\tvalue = hw->led_conf & 0xFFFF;\n+\telse\n+\t\tvalue = 0x205B;\n+\n+\thw->phy.write_reg(hw, RTL_LCR, 0xd04, value);\n+\thw->phy.write_reg(hw, RTL_EEELCR, 0xd04, 0);\n+\n+\thw->phy.read_reg(hw, RTL_LPCR, 0xd04, &value);\n+\tif (hw->led_conf != 0xFFFF) {\n+\t\tvalue &= ~0x73;\n+\t\tvalue |= hw->led_conf >> 16;\n+\t} else {\n+\t\tvalue &= 0xFFFC;\n+\t\t/*act led blinking mode set to 60ms*/\n+\t\tvalue |= 0x2;\n+\t}\n+\thw->phy.write_reg(hw, RTL_LPCR, 0xd04, value);\n+}\n+\n s32 ngbe_init_phy_rtl(struct ngbe_hw *hw)\n {\n \tint i;\n@@ -219,15 +243,7 @@ s32 ngbe_setup_phy_link_rtl(struct ngbe_hw *hw,\n \thw->phy.write_reg(hw, RTL_BMCR, RTL_DEV_ZERO, autoneg_reg);\n \n skip_an:\n-\tautoneg_reg = 0x205B;\n-\thw->phy.write_reg(hw, RTL_LCR, 0xd04, autoneg_reg);\n-\thw->phy.write_reg(hw, RTL_EEELCR, 0xd04, 0);\n-\n-\thw->phy.read_reg(hw, RTL_LPCR, 0xd04, &autoneg_reg);\n-\tautoneg_reg = autoneg_reg & 0xFFFC;\n-\t/* act led blinking mode set to 60ms */\n-\tautoneg_reg |= 0x2;\n-\thw->phy.write_reg(hw, RTL_LPCR, 0xd04, autoneg_reg);\n+\tngbe_phy_led_ctrl_rtl(hw);\n \n \treturn 0;\n }\ndiff --git a/drivers/net/ngbe/base/ngbe_type.h b/drivers/net/ngbe/base/ngbe_type.h\nindex 372e1e72e6..8f6e98ad5f 100644\n--- a/drivers/net/ngbe/base/ngbe_type.h\n+++ b/drivers/net/ngbe/base/ngbe_type.h\n@@ -354,6 +354,7 @@ struct ngbe_phy_info {\n \t\t\t\tbool autoneg_wait_to_complete);\n \ts32 (*check_link)(struct ngbe_hw *hw, u32 *speed, bool *link_up);\n \ts32 (*set_phy_power)(struct ngbe_hw *hw, bool on);\n+\ts32 (*led_oem_chk)(struct ngbe_hw *hw, u32 *data);\n \ts32 (*get_adv_pause)(struct ngbe_hw *hw, u8 *pause_bit);\n \ts32 (*get_lp_adv_pause)(struct ngbe_hw *hw, u8 *pause_bit);\n \ts32 (*set_pause_adv)(struct ngbe_hw *hw, u16 pause_bit);\n@@ -429,6 +430,7 @@ struct ngbe_hw {\n \tbool offset_loaded;\n \tbool is_pf;\n \tbool gpio_ctl;\n+\tu32 led_conf;\n \tstruct {\n \t\tu64 rx_qp_packets;\n \t\tu64 tx_qp_packets;\ndiff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c\nindex fdf3aad4fa..33aca4ac7c 100644\n--- a/drivers/net/ngbe/ngbe_ethdev.c\n+++ b/drivers/net/ngbe/ngbe_ethdev.c\n@@ -314,6 +314,7 @@ eth_ngbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused)\n \tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tconst struct rte_memzone *mz;\n \tuint32_t ctrl_ext;\n+\tu32 led_conf = 0;\n \tint err, ret;\n \n \tPMD_INIT_FUNC_TRACE();\n@@ -401,6 +402,12 @@ eth_ngbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused)\n \t\treturn -EIO;\n \t}\n \n+\terr = hw->phy.led_oem_chk(hw, &led_conf);\n+\tif (err == 0)\n+\t\thw->led_conf = led_conf;\n+\telse\n+\t\thw->led_conf = 0xFFFF;\n+\n \terr = hw->mac.init_hw(hw);\n \tif (err != 0) {\n \t\tPMD_INIT_LOG(ERR, \"Hardware Initialization Failure: %d\", err);\ndiff --git a/drivers/net/txgbe/base/txgbe_hw.c b/drivers/net/txgbe/base/txgbe_hw.c\nindex 00a8db78bf..db8ffe61a4 100644\n--- a/drivers/net/txgbe/base/txgbe_hw.c\n+++ b/drivers/net/txgbe/base/txgbe_hw.c\n@@ -529,12 +529,9 @@ s32 txgbe_led_on(struct txgbe_hw *hw, u32 index)\n \n \tDEBUGFUNC(\"txgbe_led_on\");\n \n-\tif (index > 4)\n-\t\treturn TXGBE_ERR_PARAM;\n-\n \t/* To turn on the LED, set mode to ON. */\n-\tled_reg |= TXGBE_LEDCTL_SEL(index);\n-\tled_reg |= TXGBE_LEDCTL_ORD(index);\n+\tled_reg |= index << TXGBE_LEDCTL_ORD_SHIFT;\n+\tled_reg |= index;\n \twr32(hw, TXGBE_LEDCTL, led_reg);\n \ttxgbe_flush(hw);\n \n@@ -552,12 +549,9 @@ s32 txgbe_led_off(struct txgbe_hw *hw, u32 index)\n \n \tDEBUGFUNC(\"txgbe_led_off\");\n \n-\tif (index > 4)\n-\t\treturn TXGBE_ERR_PARAM;\n-\n \t/* To turn off the LED, set mode to OFF. */\n-\tled_reg &= ~(TXGBE_LEDCTL_SEL(index));\n-\tled_reg &= ~(TXGBE_LEDCTL_ORD(index));\n+\tled_reg &= ~(index << TXGBE_LEDCTL_ORD_SHIFT);\n+\tled_reg |= index;\n \twr32(hw, TXGBE_LEDCTL, led_reg);\n \ttxgbe_flush(hw);\n \n@@ -3054,6 +3048,10 @@ void txgbe_disable_tx_laser_multispeed_fiber(struct txgbe_hw *hw)\n \tif (txgbe_check_reset_blocked(hw))\n \t\treturn;\n \n+\tif (txgbe_close_notify(hw))\n+\t\ttxgbe_led_off(hw, TXGBE_LEDCTL_UP | TXGBE_LEDCTL_10G |\n+\t\t\t\tTXGBE_LEDCTL_1G | TXGBE_LEDCTL_ACTIVE);\n+\n \t/* Disable Tx laser; allow 100us to go dark per spec */\n \tesdp_reg |= (TXGBE_GPIOBIT_0 | TXGBE_GPIOBIT_1);\n \twr32(hw, TXGBE_GPIODATA, esdp_reg);\n@@ -3073,6 +3071,9 @@ void txgbe_enable_tx_laser_multispeed_fiber(struct txgbe_hw *hw)\n {\n \tu32 esdp_reg = rd32(hw, TXGBE_GPIODATA);\n \n+\tif (txgbe_open_notify(hw))\n+\t\twr32(hw, TXGBE_LEDCTL, 0);\n+\n \t/* Enable Tx laser; allow 100ms to light up */\n \tesdp_reg &= ~(TXGBE_GPIOBIT_0 | TXGBE_GPIOBIT_1);\n \twr32(hw, TXGBE_GPIODATA, esdp_reg);\ndiff --git a/drivers/net/txgbe/base/txgbe_mng.c b/drivers/net/txgbe/base/txgbe_mng.c\nindex dbe512122c..d0aa665d4a 100644\n--- a/drivers/net/txgbe/base/txgbe_mng.c\n+++ b/drivers/net/txgbe/base/txgbe_mng.c\n@@ -82,6 +82,11 @@ txgbe_hic_unlocked(struct txgbe_hw *hw, u32 *buffer, u32 length, u32 timeout)\n \t\treturn TXGBE_ERR_HOST_INTERFACE_COMMAND;\n \t}\n \n+\tif ((rd32(hw, TXGBE_MNGMBX) & 0xff0000) >> 16 == 0x80) {\n+\t\tDEBUGOUT(\"It's unknown command.\\n\");\n+\t\treturn TXGBE_ERR_MNG_ACCESS_FAILED;\n+\t}\n+\n \treturn 0;\n }\n \n@@ -262,6 +267,70 @@ s32 txgbe_hic_sr_write(struct txgbe_hw *hw, u32 addr, u8 *buf, int len)\n \treturn err;\n }\n \n+s32 txgbe_close_notify(struct txgbe_hw *hw)\n+{\n+\tu32 tmp;\n+\ts32 status;\n+\tstruct txgbe_hic_write_shadow_ram buffer;\n+\n+\tDEBUGFUNC(\"txgbe_close_notify\");\n+\n+\tbuffer.hdr.req.cmd = FW_DW_CLOSE_NOTIFY;\n+\tbuffer.hdr.req.buf_lenh = 0;\n+\tbuffer.hdr.req.buf_lenl = 0;\n+\tbuffer.hdr.req.checksum = FW_DEFAULT_CHECKSUM;\n+\n+\t/* one word */\n+\tbuffer.length = 0;\n+\tbuffer.address = 0;\n+\n+\tstatus = txgbe_host_interface_command(hw, (u32 *)&buffer,\n+\t\t\t\t\t sizeof(buffer),\n+\t\t\t\t\t TXGBE_HI_COMMAND_TIMEOUT, false);\n+\tif (status)\n+\t\treturn status;\n+\n+\ttmp = rd32(hw, TXGBE_MNGSWSYNC);\n+\tif (tmp == TXGBE_CHECKSUM_CAP_ST_PASS)\n+\t\tstatus = 0;\n+\telse\n+\t\tstatus = TXGBE_ERR_EEPROM_CHECKSUM;\n+\n+\treturn status;\n+}\n+\n+s32 txgbe_open_notify(struct txgbe_hw *hw)\n+{\n+\tu32 tmp;\n+\ts32 status;\n+\tstruct txgbe_hic_write_shadow_ram buffer;\n+\n+\tDEBUGFUNC(\"txgbe_open_notify\");\n+\n+\tbuffer.hdr.req.cmd = FW_DW_OPEN_NOTIFY;\n+\tbuffer.hdr.req.buf_lenh = 0;\n+\tbuffer.hdr.req.buf_lenl = 0;\n+\tbuffer.hdr.req.checksum = FW_DEFAULT_CHECKSUM;\n+\n+\t/* one word */\n+\tbuffer.length = 0;\n+\tbuffer.address = 0;\n+\n+\tstatus = txgbe_host_interface_command(hw, (u32 *)&buffer,\n+\t\t\t\t\t sizeof(buffer),\n+\t\t\t\t\t TXGBE_HI_COMMAND_TIMEOUT, false);\n+\tif (status)\n+\t\treturn status;\n+\n+\ttmp = rd32(hw, TXGBE_MNGSWSYNC);\n+\tif (tmp == TXGBE_CHECKSUM_CAP_ST_PASS)\n+\t\tstatus = 0;\n+\telse\n+\t\tstatus = TXGBE_ERR_EEPROM_CHECKSUM;\n+\n+\treturn status;\n+}\n+\n /**\n * txgbe_hic_set_drv_ver - Sends driver version to firmware\n * @hw: pointer to the HW structure\ndiff --git a/drivers/net/txgbe/base/txgbe_mng.h b/drivers/net/txgbe/base/txgbe_mng.h\nindex 1004f41c72..24d938fecf 100644\n--- a/drivers/net/txgbe/base/txgbe_mng.h\n+++ b/drivers/net/txgbe/base/txgbe_mng.h\n@@ -51,6 +51,11 @@\n #define FW_PHY_TOKEN_DELAY\t\t5\t/* milliseconds */\n #define FW_PHY_TOKEN_WAIT\t\t5\t/* seconds */\n #define FW_PHY_TOKEN_RETRIES ((FW_PHY_TOKEN_WAIT * 1000) / FW_PHY_TOKEN_DELAY)\n+#define FW_DW_OPEN_NOTIFY 0xE9\n+#define FW_DW_CLOSE_NOTIFY 0xEA\n+\n+#define TXGBE_CHECKSUM_CAP_ST_PASS 0x80658383\n+#define TXGBE_CHECKSUM_CAP_ST_FAIL 0x70657376\n \n /* Host Interface Command Structures */\n struct txgbe_hic_hdr {\n@@ -168,6 +173,8 @@ struct txgbe_hic_upg_verify {\n \n s32 txgbe_hic_sr_read(struct txgbe_hw *hw, u32 addr, u8 *buf, int len);\n s32 txgbe_hic_sr_write(struct txgbe_hw *hw, u32 addr, u8 *buf, int len);\n+s32 txgbe_close_notify(struct txgbe_hw *hw);\n+s32 txgbe_open_notify(struct txgbe_hw *hw);\n \n s32 txgbe_hic_set_drv_ver(struct txgbe_hw *hw, u8 maj, u8 min, u8 build,\n \t\t\tu8 ver, u16 len, const char *str);\ndiff --git a/drivers/net/txgbe/base/txgbe_regs.h b/drivers/net/txgbe/base/txgbe_regs.h\nindex 144047ba62..3139796911 100644\n--- a/drivers/net/txgbe/base/txgbe_regs.h\n+++ b/drivers/net/txgbe/base/txgbe_regs.h\n@@ -302,11 +302,13 @@\n #define TXGBE_TEREDOPORT 0x01441C\n #define TXGBE_LEDCTL 0x014424\n #define TXGBE_LEDCTL_SEL_MASK MS(0, 0xFFFF)\n-#define TXGBE_LEDCTL_SEL(s) MS((s), 0x1)\n-#define TXGBE_LEDCTL_ORD_MASK MS(16, 0xFFFF)\n-#define TXGBE_LEDCTL_ORD(s) MS(((s)+16), 0x1)\n-\t/* s=UP(0),10G(1),1G(2),100M(3),BSY(4) */\n-#define TXGBE_LEDCTL_ACTIVE (TXGBE_LEDCTL_SEL(4) | TXGBE_LEDCTL_ORD(4))\n+#define TXGBE_LEDCTL_ORD_MASK MS(16, 0xFFFF)\n+#define TXGBE_LEDCTL_ORD_SHIFT 16\n+#define TXGBE_LEDCTL_UP\t\tMS(0, 0x1)\n+#define TXGBE_LEDCTL_10G\t\tMS(1, 0x1)\n+#define TXGBE_LEDCTL_1G\t\tMS(2, 0x1)\n+#define TXGBE_LEDCTL_100M\t\tMS(3, 0x1)\n+#define TXGBE_LEDCTL_ACTIVE\t\tMS(4, 0x1)\n #define TXGBE_TAGTPID(i) (0x014430 + (i) * 4) /* 0-3 */\n #define TXGBE_TAGTPID_LSB_MASK MS(0, 0xFFFF)\n #define TXGBE_TAGTPID_LSB(v) LS(v, 0, 0xFFFF)\ndiff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c\nindex ac4d4e08f4..4799a60116 100644\n--- a/drivers/net/txgbe/txgbe_ethdev.c\n+++ b/drivers/net/txgbe/txgbe_ethdev.c\n@@ -3166,7 +3166,7 @@ txgbe_dev_led_on(struct rte_eth_dev *dev)\n \tstruct txgbe_hw *hw;\n \n \thw = TXGBE_DEV_HW(dev);\n-\treturn txgbe_led_on(hw, 4) == 0 ? 0 : -ENOTSUP;\n+\treturn txgbe_led_on(hw, TXGBE_LEDCTL_ACTIVE) == 0 ? 0 : -ENOTSUP;\n }\n \n static int\n@@ -3175,7 +3175,7 @@ txgbe_dev_led_off(struct rte_eth_dev *dev)\n \tstruct txgbe_hw *hw;\n \n \thw = TXGBE_DEV_HW(dev);\n-\treturn txgbe_led_off(hw, 4) == 0 ? 0 : -ENOTSUP;\n+\treturn txgbe_led_off(hw, TXGBE_LEDCTL_ACTIVE) == 0 ? 0 : -ENOTSUP;\n }\n \n static int\n", "prefixes": [ "7/9" ] }