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{
    "id": 114787,
    "url": "http://patchwork.dpdk.org/api/patches/114787/?format=api",
    "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20220809184908.24030-8-ndabilpuram@marvell.com/",
    "project": {
        "id": 1,
        "url": "http://patchwork.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20220809184908.24030-8-ndabilpuram@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20220809184908.24030-8-ndabilpuram@marvell.com",
    "date": "2022-08-09T18:48:52",
    "name": "[08/23] common/cnxk: add support to set NPA buf type",
    "commit_ref": null,
    "pull_url": null,
    "state": "changes-requested",
    "archived": true,
    "hash": "fa57add9ae91fe9e029177ee6f6bb1efd0205842",
    "submitter": {
        "id": 1202,
        "url": "http://patchwork.dpdk.org/api/people/1202/?format=api",
        "name": "Nithin Dabilpuram",
        "email": "ndabilpuram@marvell.com"
    },
    "delegate": {
        "id": 310,
        "url": "http://patchwork.dpdk.org/api/users/310/?format=api",
        "username": "jerin",
        "first_name": "Jerin",
        "last_name": "Jacob",
        "email": "jerinj@marvell.com"
    },
    "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20220809184908.24030-8-ndabilpuram@marvell.com/mbox/",
    "series": [
        {
            "id": 24239,
            "url": "http://patchwork.dpdk.org/api/series/24239/?format=api",
            "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=24239",
            "date": "2022-08-09T18:48:45",
            "name": "[01/23] common/cnxk: fix part value for cn10k",
            "version": 1,
            "mbox": "http://patchwork.dpdk.org/series/24239/mbox/"
        }
    ],
    "comments": "http://patchwork.dpdk.org/api/patches/114787/comments/",
    "check": "success",
    "checks": "http://patchwork.dpdk.org/api/patches/114787/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
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        ],
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        "From": "Nithin Dabilpuram <ndabilpuram@marvell.com>",
        "To": "Nithin Dabilpuram <ndabilpuram@marvell.com>, Kiran Kumar K\n <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>, Satha Rao\n <skoteshwar@marvell.com>, Ray Kinsella <mdr@ashroe.eu>",
        "CC": "<jerinj@marvell.com>, <dev@dpdk.org>",
        "Subject": "[PATCH 08/23] common/cnxk: add support to set NPA buf type",
        "Date": "Wed, 10 Aug 2022 00:18:52 +0530",
        "Message-ID": "<20220809184908.24030-8-ndabilpuram@marvell.com>",
        "X-Mailer": "git-send-email 2.8.4",
        "In-Reply-To": "<20220809184908.24030-1-ndabilpuram@marvell.com>",
        "References": "<20220809184908.24030-1-ndabilpuram@marvell.com>",
        "MIME-Version": "1.0",
        "Content-Type": "text/plain",
        "X-Proofpoint-ORIG-GUID": "syZv8Glc8t_U3qbDzu7k8o6EbYu5yJXK",
        "X-Proofpoint-GUID": "syZv8Glc8t_U3qbDzu7k8o6EbYu5yJXK",
        "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.883,Hydra:6.0.517,FMLib:17.11.122.1\n definitions=2022-08-09_05,2022-08-09_02,2022-06-22_01",
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        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "Add support to set/get per-aura buf type with refs and\nget sum of all aura limits matching given buf type mask\nand val.\n\nSigned-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>\n---\n drivers/common/cnxk/meson.build    |  1 +\n drivers/common/cnxk/roc_npa.c      | 11 +++++\n drivers/common/cnxk/roc_npa.h      | 22 +++++++++\n drivers/common/cnxk/roc_npa_priv.h |  8 ++-\n drivers/common/cnxk/roc_npa_type.c | 99 ++++++++++++++++++++++++++++++++++++++\n drivers/common/cnxk/version.map    |  3 ++\n 6 files changed, 143 insertions(+), 1 deletion(-)\n create mode 100644 drivers/common/cnxk/roc_npa_type.c",
    "diff": "diff --git a/drivers/common/cnxk/meson.build b/drivers/common/cnxk/meson.build\nindex 6f80827..127fcbc 100644\n--- a/drivers/common/cnxk/meson.build\n+++ b/drivers/common/cnxk/meson.build\n@@ -51,6 +51,7 @@ sources = files(\n         'roc_npa.c',\n         'roc_npa_debug.c',\n         'roc_npa_irq.c',\n+        'roc_npa_type.c',\n         'roc_npc.c',\n         'roc_npc_mcam.c',\n         'roc_npc_mcam_dump.c',\ndiff --git a/drivers/common/cnxk/roc_npa.c b/drivers/common/cnxk/roc_npa.c\nindex 760a231..ee42434 100644\n--- a/drivers/common/cnxk/roc_npa.c\n+++ b/drivers/common/cnxk/roc_npa.c\n@@ -499,6 +499,7 @@ npa_aura_pool_pair_free(struct npa_lf *lf, uint64_t aura_handle)\n \tpool_id = aura_id;\n \trc = npa_aura_pool_fini(lf->mbox, aura_id, aura_handle);\n \trc |= npa_stack_dma_free(lf, name, pool_id);\n+\tmemset(&lf->aura_attr[aura_id], 0, sizeof(struct npa_aura_attr));\n \n \tplt_bitmap_set(lf->npa_bmp, aura_id);\n \n@@ -750,6 +751,13 @@ npa_dev_init(struct npa_lf *lf, uintptr_t base, struct mbox *mbox)\n \t\tgoto qint_free;\n \t}\n \n+\t/* Allocate per-aura attribute */\n+\tlf->aura_attr = plt_zmalloc(sizeof(struct npa_aura_attr) * nr_pools, 0);\n+\tif (lf->aura_attr == NULL) {\n+\t\trc = NPA_ERR_PARAM;\n+\t\tgoto lim_free;\n+\t}\n+\n \t/* Init aura start & end limits */\n \tfor (i = 0; i < nr_pools; i++) {\n \t\tlf->aura_lim[i].ptr_start = UINT64_MAX;\n@@ -758,6 +766,8 @@ npa_dev_init(struct npa_lf *lf, uintptr_t base, struct mbox *mbox)\n \n \treturn 0;\n \n+lim_free:\n+\tplt_free(lf->aura_lim);\n qint_free:\n \tplt_free(lf->npa_qint_mem);\n bmap_free:\n@@ -780,6 +790,7 @@ npa_dev_fini(struct npa_lf *lf)\n \tplt_free(lf->npa_qint_mem);\n \tplt_bitmap_free(lf->npa_bmp);\n \tplt_free(lf->npa_bmp_mem);\n+\tplt_free(lf->aura_attr);\n \n \treturn npa_lf_free(lf->mbox);\n }\ndiff --git a/drivers/common/cnxk/roc_npa.h b/drivers/common/cnxk/roc_npa.h\nindex 69129cb..fed1942 100644\n--- a/drivers/common/cnxk/roc_npa.h\n+++ b/drivers/common/cnxk/roc_npa.h\n@@ -714,6 +714,25 @@ int __roc_api roc_npa_dev_fini(struct roc_npa *roc_npa);\n /* Flags to pool create */\n #define ROC_NPA_ZERO_AURA_F BIT(0)\n \n+/* Enumerations */\n+enum roc_npa_buf_type {\n+\t/* Aura used for normal pkts */\n+\tROC_NPA_BUF_TYPE_PACKET = 0,\n+\t/* Aura used for ipsec pkts */\n+\tROC_NPA_BUF_TYPE_PACKET_IPSEC,\n+\t/* Aura used as vwqe for normal pkts */\n+\tROC_NPA_BUF_TYPE_VWQE,\n+\t/* Aura used as vwqe for ipsec pkts */\n+\tROC_NPA_BUF_TYPE_VWQE_IPSEC,\n+\t/* Aura used as SQB for SQ */\n+\tROC_NPA_BUF_TYPE_SQB,\n+\t/* Aura used for general buffer */\n+\tROC_NPA_BUF_TYPE_BUF,\n+\t/* Aura used for timeout pool */\n+\tROC_NPA_BUF_TYPE_TIMEOUT,\n+\tROC_NPA_BUF_TYPE_END,\n+};\n+\n /* NPA pool */\n int __roc_api roc_npa_pool_create(uint64_t *aura_handle, uint32_t block_size,\n \t\t\t\t  uint32_t block_count, struct npa_aura_s *aura,\n@@ -726,6 +745,9 @@ void __roc_api roc_npa_aura_op_range_set(uint64_t aura_handle,\n \t\t\t\t\t uint64_t start_iova,\n \t\t\t\t\t uint64_t end_iova);\n uint64_t __roc_api roc_npa_zero_aura_handle(void);\n+int __roc_api roc_npa_buf_type_update(uint64_t aura_handle, enum roc_npa_buf_type type, int cnt);\n+uint64_t __roc_api roc_npa_buf_type_mask(uint64_t aura_handle);\n+uint64_t __roc_api roc_npa_buf_type_limit_get(uint64_t type_mask);\n \n /* Init callbacks */\n typedef int (*roc_npa_lf_init_cb_t)(struct plt_pci_device *pci_dev);\ndiff --git a/drivers/common/cnxk/roc_npa_priv.h b/drivers/common/cnxk/roc_npa_priv.h\nindex de3d544..d2118cc 100644\n--- a/drivers/common/cnxk/roc_npa_priv.h\n+++ b/drivers/common/cnxk/roc_npa_priv.h\n@@ -18,6 +18,7 @@ enum npa_error_status {\n \n struct npa_lf {\n \tstruct plt_intr_handle *intr_handle;\n+\tstruct npa_aura_attr *aura_attr;\n \tstruct npa_aura_lim *aura_lim;\n \tstruct plt_pci_device *pci_dev;\n \tstruct plt_bitmap *npa_bmp;\n@@ -25,6 +26,7 @@ struct npa_lf {\n \tuint32_t stack_pg_ptrs;\n \tuint32_t stack_pg_bytes;\n \tuint16_t npa_msixoff;\n+\tbool zero_aura_rsvd;\n \tvoid *npa_qint_mem;\n \tvoid *npa_bmp_mem;\n \tuint32_t nr_pools;\n@@ -32,7 +34,7 @@ struct npa_lf {\n \tuint8_t aura_sz;\n \tuint32_t qints;\n \tuintptr_t base;\n-\tbool zero_aura_rsvd;\n+\n };\n \n struct npa_qint {\n@@ -45,6 +47,10 @@ struct npa_aura_lim {\n \tuint64_t ptr_end;\n };\n \n+struct npa_aura_attr {\n+\tint buf_type[ROC_NPA_BUF_TYPE_END];\n+};\n+\n struct dev;\n \n static inline struct npa *\ndiff --git a/drivers/common/cnxk/roc_npa_type.c b/drivers/common/cnxk/roc_npa_type.c\nnew file mode 100644\nindex 0000000..ed90138\n--- /dev/null\n+++ b/drivers/common/cnxk/roc_npa_type.c\n@@ -0,0 +1,99 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2022 Marvell.\n+ */\n+\n+#include \"roc_api.h\"\n+#include \"roc_priv.h\"\n+\n+int\n+roc_npa_buf_type_update(uint64_t aura_handle, enum roc_npa_buf_type type, int count)\n+{\n+\tuint64_t aura_id = roc_npa_aura_handle_to_aura(aura_handle);\n+\tstruct npa_lf *lf;\n+\n+\tlf = idev_npa_obj_get();\n+\tif (lf == NULL || aura_id >= lf->nr_pools)\n+\t\treturn NPA_ERR_PARAM;\n+\n+\tif (plt_bitmap_get(lf->npa_bmp, aura_id)) {\n+\t\tplt_err(\"Cannot set buf type on unused aura\");\n+\t\treturn NPA_ERR_PARAM;\n+\t}\n+\n+\tif (type >= ROC_NPA_BUF_TYPE_END || (lf->aura_attr[aura_id].buf_type[type] + count < 0)) {\n+\t\tplt_err(\"Pool buf type invalid\");\n+\t\treturn NPA_ERR_PARAM;\n+\t}\n+\n+\tlf->aura_attr[aura_id].buf_type[type] += count;\n+\tplt_wmb();\n+\treturn 0;\n+}\n+\n+uint64_t\n+roc_npa_buf_type_mask(uint64_t aura_handle)\n+{\n+\tuint64_t aura_id = roc_npa_aura_handle_to_aura(aura_handle);\n+\tuint64_t type_mask = 0;\n+\tstruct npa_lf *lf;\n+\tint type;\n+\n+\tlf = idev_npa_obj_get();\n+\tif (lf == NULL || aura_id >= lf->nr_pools) {\n+\t\tplt_err(\"Invalid aura id or lf\");\n+\t\treturn 0;\n+\t}\n+\n+\tif (plt_bitmap_get(lf->npa_bmp, aura_id)) {\n+\t\tplt_err(\"Cannot get buf_type on unused aura\");\n+\t\treturn 0;\n+\t}\n+\n+\tfor (type = 0; type < ROC_NPA_BUF_TYPE_END; type++) {\n+\t\tif (lf->aura_attr[aura_id].buf_type[type])\n+\t\t\ttype_mask |= BIT_ULL(type);\n+\t}\n+\n+\treturn type_mask;\n+}\n+\n+uint64_t\n+roc_npa_buf_type_limit_get(uint64_t type_mask)\n+{\n+\tuint64_t wdata, reg;\n+\tuint64_t limit = 0;\n+\tstruct npa_lf *lf;\n+\tuint64_t aura_id;\n+\tint64_t *addr;\n+\tuint64_t val;\n+\tint type;\n+\n+\tlf = idev_npa_obj_get();\n+\tif (lf == NULL)\n+\t\treturn NPA_ERR_PARAM;\n+\n+\tfor (aura_id = 0; aura_id < lf->nr_pools; aura_id++) {\n+\t\tif (plt_bitmap_get(lf->npa_bmp, aura_id))\n+\t\t\tcontinue;\n+\n+\t\t/* Find aura's matching the buf_types requested */\n+\t\tif (type_mask != 0) {\n+\t\t\tval = 0;\n+\t\t\tfor (type = 0; type < ROC_NPA_BUF_TYPE_END; type++) {\n+\t\t\t\tif (lf->aura_attr[aura_id].buf_type[type] != 0)\n+\t\t\t\t\tval |= BIT_ULL(type);\n+\t\t\t}\n+\t\t\tif ((val & type_mask) == 0)\n+\t\t\t\tcontinue;\n+\t\t}\n+\n+\t\twdata = aura_id << 44;\n+\t\taddr = (int64_t *)(lf->base + NPA_LF_AURA_OP_LIMIT);\n+\t\treg = roc_atomic64_add_nosync(wdata, addr);\n+\n+\t\tif (!(reg & BIT_ULL(42)))\n+\t\t\tlimit += (reg & ROC_AURA_OP_LIMIT_MASK);\n+\t}\n+\n+\treturn limit;\n+}\ndiff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map\nindex 6c05e89..6f3de2a 100644\n--- a/drivers/common/cnxk/version.map\n+++ b/drivers/common/cnxk/version.map\n@@ -306,6 +306,9 @@ INTERNAL {\n \troc_nix_vlan_mcam_entry_write;\n \troc_nix_vlan_strip_vtag_ena_dis;\n \troc_nix_vlan_tpid_set;\n+\troc_npa_buf_type_mask;\n+\troc_npa_buf_type_limit_get;\n+\troc_npa_buf_type_update;\n \troc_npa_aura_drop_set;\n \troc_npa_aura_limit_modify;\n \troc_npa_aura_op_range_set;\n",
    "prefixes": [
        "08/23"
    ]
}