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GET /api/patches/119283/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 119283,
    "url": "http://patchwork.dpdk.org/api/patches/119283/?format=api",
    "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20221029032729.22772-17-beilei.xing@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patchwork.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20221029032729.22772-17-beilei.xing@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20221029032729.22772-17-beilei.xing@intel.com",
    "date": "2022-10-29T03:27:27",
    "name": "[v15,16/18] net/idpf: add support for Tx offloading",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "3c9d5882e03764bc4f735c77723fb0d6ed53c144",
    "submitter": {
        "id": 410,
        "url": "http://patchwork.dpdk.org/api/people/410/?format=api",
        "name": "Xing, Beilei",
        "email": "beilei.xing@intel.com"
    },
    "delegate": {
        "id": 3961,
        "url": "http://patchwork.dpdk.org/api/users/3961/?format=api",
        "username": "arybchenko",
        "first_name": "Andrew",
        "last_name": "Rybchenko",
        "email": "andrew.rybchenko@oktetlabs.ru"
    },
    "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20221029032729.22772-17-beilei.xing@intel.com/mbox/",
    "series": [
        {
            "id": 25480,
            "url": "http://patchwork.dpdk.org/api/series/25480/?format=api",
            "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=25480",
            "date": "2022-10-29T03:27:11",
            "name": "add support for idpf PMD in DPDK",
            "version": 15,
            "mbox": "http://patchwork.dpdk.org/series/25480/mbox/"
        }
    ],
    "comments": "http://patchwork.dpdk.org/api/patches/119283/comments/",
    "check": "success",
    "checks": "http://patchwork.dpdk.org/api/patches/119283/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id DCB0DA00C4;\n\tSat, 29 Oct 2022 05:59:34 +0200 (CEST)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 16E4F42B98;\n\tSat, 29 Oct 2022 05:58:17 +0200 (CEST)",
            "from mga02.intel.com (mga02.intel.com [134.134.136.20])\n by mails.dpdk.org (Postfix) with ESMTP id AD9EE427F0\n for <dev@dpdk.org>; Sat, 29 Oct 2022 05:58:08 +0200 (CEST)",
            "from fmsmga007.fm.intel.com ([10.253.24.52])\n by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 28 Oct 2022 20:58:07 -0700",
            "from dpdk-beileix-3.sh.intel.com ([10.67.110.253])\n by fmsmga007.fm.intel.com with ESMTP; 28 Oct 2022 20:58:05 -0700"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1667015888; x=1698551888;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=ZHtbm7ocM+oQCXmuwEBmWznzSXP2g6MadfJjp8DCK7Y=;\n b=U5YSKdsg+ynuXCCSrk2iZo+P0X7MWY1qLGEDPHE2ILX+E8ZmHISxgoPZ\n 4P+wcQlYI4SQ1xv/Oz3/qs49ErENn0T/9ZbW02+RXQFwhggP1kDD48Y1L\n 9UeT7XPSPnvY4qdakwF9LZTzb6yT/OpHLmkWjhaNI5ldc9pPaB3YoDMCv\n 41lDclwlK/vUulbfXSA5KJOzqT77XWJYt/xLoDsHMGPzXgTiszSWmxJjq\n ck1m3DnZKKXE1zjUCDBt2BlqOniF94IloUsvztZqz9Bic+z8cjrCq/FoP\n gjpgRFqQdEYxhADUppTTnR3AZ8m5QO/lWm8BW3KcgmODEQjFWCz/NZMYV g==;",
        "X-IronPort-AV": [
            "E=McAfee;i=\"6500,9779,10514\"; a=\"296043757\"",
            "E=Sophos;i=\"5.95,222,1661842800\"; d=\"scan'208\";a=\"296043757\"",
            "E=McAfee;i=\"6500,9779,10514\"; a=\"635523952\"",
            "E=Sophos;i=\"5.95,222,1661842800\"; d=\"scan'208\";a=\"635523952\""
        ],
        "X-ExtLoop1": "1",
        "From": "beilei.xing@intel.com",
        "To": "andrew.rybchenko@oktetlabs.ru, jingjing.wu@intel.com,\n beilei.xing@intel.com",
        "Cc": "dev@dpdk.org, Junfeng Guo <junfeng.guo@intel.com>,\n Xiaoyun Li <xiaoyun.li@intel.com>",
        "Subject": "[PATCH v15 16/18] net/idpf: add support for Tx offloading",
        "Date": "Sat, 29 Oct 2022 03:27:27 +0000",
        "Message-Id": "<20221029032729.22772-17-beilei.xing@intel.com>",
        "X-Mailer": "git-send-email 2.26.2",
        "In-Reply-To": "<20221029032729.22772-1-beilei.xing@intel.com>",
        "References": "<20221027074729.1494529-1-junfeng.guo@intel.com>\n <20221029032729.22772-1-beilei.xing@intel.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "From: Junfeng Guo <junfeng.guo@intel.com>\n\nAdd Tx offloading support:\n - support TSO for single queue model and split queue model.\n\nSigned-off-by: Beilei Xing <beilei.xing@intel.com>\nSigned-off-by: Xiaoyun Li <xiaoyun.li@intel.com>\nSigned-off-by: Junfeng Guo <junfeng.guo@intel.com>\n---\n doc/guides/nics/features/idpf.ini |   1 +\n drivers/net/idpf/idpf_ethdev.c    |   4 +-\n drivers/net/idpf/idpf_rxtx.c      | 128 +++++++++++++++++++++++++++++-\n drivers/net/idpf/idpf_rxtx.h      |  22 +++++\n 4 files changed, 152 insertions(+), 3 deletions(-)",
    "diff": "diff --git a/doc/guides/nics/features/idpf.ini b/doc/guides/nics/features/idpf.ini\nindex 868571654f..d82b4aa0ff 100644\n--- a/doc/guides/nics/features/idpf.ini\n+++ b/doc/guides/nics/features/idpf.ini\n@@ -8,6 +8,7 @@\n ;\n [Features]\n MTU update           = Y\n+TSO                  = P\n L3 checksum offload  = P\n L4 checksum offload  = P\n Linux                = Y\ndiff --git a/drivers/net/idpf/idpf_ethdev.c b/drivers/net/idpf/idpf_ethdev.c\nindex a09f104425..084426260c 100644\n--- a/drivers/net/idpf/idpf_ethdev.c\n+++ b/drivers/net/idpf/idpf_ethdev.c\n@@ -67,7 +67,9 @@ idpf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)\n \t\tRTE_ETH_RX_OFFLOAD_TCP_CKSUM            |\n \t\tRTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM;\n \n-\tdev_info->tx_offload_capa = RTE_ETH_TX_OFFLOAD_MULTI_SEGS;\n+\tdev_info->tx_offload_capa =\n+\t\tRTE_ETH_TX_OFFLOAD_TCP_TSO\t\t|\n+\t\tRTE_ETH_TX_OFFLOAD_MULTI_SEGS;\n \n \tdev_info->default_txconf = (struct rte_eth_txconf) {\n \t\t.tx_free_thresh = IDPF_DEFAULT_TX_FREE_THRESH,\ndiff --git a/drivers/net/idpf/idpf_rxtx.c b/drivers/net/idpf/idpf_rxtx.c\nindex f15e61a785..cc296d7ab1 100644\n--- a/drivers/net/idpf/idpf_rxtx.c\n+++ b/drivers/net/idpf/idpf_rxtx.c\n@@ -1506,6 +1506,49 @@ idpf_split_tx_free(struct idpf_tx_queue *cq)\n \tcq->tx_tail = next;\n }\n \n+/* Check if the context descriptor is needed for TX offloading */\n+static inline uint16_t\n+idpf_calc_context_desc(uint64_t flags)\n+{\n+\tif ((flags & RTE_MBUF_F_TX_TCP_SEG) != 0)\n+\t\treturn 1;\n+\n+\treturn 0;\n+}\n+\n+/* set TSO context descriptor\n+ */\n+static inline void\n+idpf_set_splitq_tso_ctx(struct rte_mbuf *mbuf,\n+\t\t\tunion idpf_tx_offload tx_offload,\n+\t\t\tvolatile union idpf_flex_tx_ctx_desc *ctx_desc)\n+{\n+\tuint16_t cmd_dtype;\n+\tuint32_t tso_len;\n+\tuint8_t hdr_len;\n+\n+\tif (tx_offload.l4_len == 0) {\n+\t\tPMD_TX_LOG(DEBUG, \"L4 length set to 0\");\n+\t\treturn;\n+\t}\n+\n+\thdr_len = tx_offload.l2_len +\n+\t\ttx_offload.l3_len +\n+\t\ttx_offload.l4_len;\n+\tcmd_dtype = IDPF_TX_DESC_DTYPE_FLEX_TSO_CTX |\n+\t\tIDPF_TX_FLEX_CTX_DESC_CMD_TSO;\n+\ttso_len = mbuf->pkt_len - hdr_len;\n+\n+\tctx_desc->tso.qw1.cmd_dtype = rte_cpu_to_le_16(cmd_dtype);\n+\tctx_desc->tso.qw0.hdr_len = hdr_len;\n+\tctx_desc->tso.qw0.mss_rt =\n+\t\trte_cpu_to_le_16((uint16_t)mbuf->tso_segsz &\n+\t\t\t\t IDPF_TXD_FLEX_CTX_MSS_RT_M);\n+\tctx_desc->tso.qw0.flex_tlen =\n+\t\trte_cpu_to_le_32(tso_len &\n+\t\t\t\t IDPF_TXD_FLEX_CTX_MSS_RT_M);\n+}\n+\n uint16_t\n idpf_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n \t\t      uint16_t nb_pkts)\n@@ -1514,11 +1557,14 @@ idpf_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n \tvolatile struct idpf_flex_tx_sched_desc *txr;\n \tvolatile struct idpf_flex_tx_sched_desc *txd;\n \tstruct idpf_tx_entry *sw_ring;\n+\tunion idpf_tx_offload tx_offload = {0};\n \tstruct idpf_tx_entry *txe, *txn;\n \tuint16_t nb_used, tx_id, sw_id;\n \tstruct rte_mbuf *tx_pkt;\n \tuint16_t nb_to_clean;\n \tuint16_t nb_tx = 0;\n+\tuint64_t ol_flags;\n+\tuint16_t nb_ctx;\n \n \tif (unlikely(txq == NULL) || unlikely(!txq->q_started))\n \t\treturn nb_tx;\n@@ -1548,7 +1594,29 @@ idpf_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n \n \t\tif (txq->nb_free < tx_pkt->nb_segs)\n \t\t\tbreak;\n-\t\tnb_used = tx_pkt->nb_segs;\n+\n+\t\tol_flags = tx_pkt->ol_flags;\n+\t\ttx_offload.l2_len = tx_pkt->l2_len;\n+\t\ttx_offload.l3_len = tx_pkt->l3_len;\n+\t\ttx_offload.l4_len = tx_pkt->l4_len;\n+\t\ttx_offload.tso_segsz = tx_pkt->tso_segsz;\n+\t\t/* Calculate the number of context descriptors needed. */\n+\t\tnb_ctx = idpf_calc_context_desc(ol_flags);\n+\t\tnb_used = tx_pkt->nb_segs + nb_ctx;\n+\n+\t\t/* context descriptor */\n+\t\tif (nb_ctx != 0) {\n+\t\t\tvolatile union idpf_flex_tx_ctx_desc *ctx_desc =\n+\t\t\t(volatile union idpf_flex_tx_ctx_desc *)&txr[tx_id];\n+\n+\t\t\tif ((ol_flags & RTE_MBUF_F_TX_TCP_SEG) != 0)\n+\t\t\t\tidpf_set_splitq_tso_ctx(tx_pkt, tx_offload,\n+\t\t\t\t\t\t\tctx_desc);\n+\n+\t\t\ttx_id++;\n+\t\t\tif (tx_id == txq->nb_tx_desc)\n+\t\t\t\ttx_id = 0;\n+\t\t}\n \n \t\tdo {\n \t\t\ttxd = &txr[tx_id];\n@@ -1799,14 +1867,17 @@ idpf_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n {\n \tvolatile struct idpf_flex_tx_desc *txd;\n \tvolatile struct idpf_flex_tx_desc *txr;\n+\tunion idpf_tx_offload tx_offload = {0};\n \tstruct idpf_tx_entry *txe, *txn;\n \tstruct idpf_tx_entry *sw_ring;\n \tstruct idpf_tx_queue *txq;\n \tstruct rte_mbuf *tx_pkt;\n \tstruct rte_mbuf *m_seg;\n \tuint64_t buf_dma_addr;\n+\tuint64_t ol_flags;\n \tuint16_t tx_last;\n \tuint16_t nb_used;\n+\tuint16_t nb_ctx;\n \tuint16_t td_cmd;\n \tuint16_t tx_id;\n \tuint16_t nb_tx;\n@@ -1833,11 +1904,19 @@ idpf_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n \t\ttx_pkt = *tx_pkts++;\n \t\tRTE_MBUF_PREFETCH_TO_FREE(txe->mbuf);\n \n+\t\tol_flags = tx_pkt->ol_flags;\n+\t\ttx_offload.l2_len = tx_pkt->l2_len;\n+\t\ttx_offload.l3_len = tx_pkt->l3_len;\n+\t\ttx_offload.l4_len = tx_pkt->l4_len;\n+\t\ttx_offload.tso_segsz = tx_pkt->tso_segsz;\n+\t\t/* Calculate the number of context descriptors needed. */\n+\t\tnb_ctx = idpf_calc_context_desc(ol_flags);\n+\n \t\t/* The number of descriptors that must be allocated for\n \t\t * a packet equals to the number of the segments of that\n \t\t * packet plus 1 context descriptor if needed.\n \t\t */\n-\t\tnb_used = (uint16_t)(tx_pkt->nb_segs);\n+\t\tnb_used = (uint16_t)(tx_pkt->nb_segs + nb_ctx);\n \t\ttx_last = (uint16_t)(tx_id + nb_used - 1);\n \n \t\t/* Circular ring */\n@@ -1865,6 +1944,29 @@ idpf_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n \t\t\t}\n \t\t}\n \n+\t\tif (nb_ctx != 0) {\n+\t\t\t/* Setup TX context descriptor if required */\n+\t\t\tvolatile union idpf_flex_tx_ctx_desc *ctx_txd =\n+\t\t\t\t(volatile union idpf_flex_tx_ctx_desc *)\n+\t\t\t\t\t\t\t&txr[tx_id];\n+\n+\t\t\ttxn = &sw_ring[txe->next_id];\n+\t\t\tRTE_MBUF_PREFETCH_TO_FREE(txn->mbuf);\n+\t\t\tif (txe->mbuf != NULL) {\n+\t\t\t\trte_pktmbuf_free_seg(txe->mbuf);\n+\t\t\t\ttxe->mbuf = NULL;\n+\t\t\t}\n+\n+\t\t\t/* TSO enabled */\n+\t\t\tif ((ol_flags & RTE_MBUF_F_TX_TCP_SEG) != 0)\n+\t\t\t\tidpf_set_splitq_tso_ctx(tx_pkt, tx_offload,\n+\t\t\t\t\t\t\tctx_txd);\n+\n+\t\t\ttxe->last_id = tx_last;\n+\t\t\ttx_id = txe->next_id;\n+\t\t\ttxe = txn;\n+\t\t}\n+\n \t\tm_seg = tx_pkt;\n \t\tdo {\n \t\t\ttxd = &txr[tx_id];\n@@ -1924,6 +2026,9 @@ uint16_t\n idpf_prep_pkts(__rte_unused void *tx_queue, struct rte_mbuf **tx_pkts,\n \t       uint16_t nb_pkts)\n {\n+#ifdef RTE_LIBRTE_ETHDEV_DEBUG\n+\tint ret;\n+#endif\n \tint i;\n \tuint64_t ol_flags;\n \tstruct rte_mbuf *m;\n@@ -1938,12 +2043,31 @@ idpf_prep_pkts(__rte_unused void *tx_queue, struct rte_mbuf **tx_pkts,\n \t\t\t\trte_errno = EINVAL;\n \t\t\t\treturn i;\n \t\t\t}\n+\t\t} else if ((m->tso_segsz < IDPF_MIN_TSO_MSS) ||\n+\t\t\t   (m->tso_segsz > IDPF_MAX_TSO_MSS) ||\n+\t\t\t   (m->pkt_len > IDPF_MAX_TSO_FRAME_SIZE)) {\n+\t\t\t/* MSS outside the range are considered malicious */\n+\t\t\trte_errno = EINVAL;\n+\t\t\treturn i;\n+\t\t}\n+\n+\t\tif ((ol_flags & IDPF_TX_OFFLOAD_NOTSUP_MASK) != 0) {\n+\t\t\trte_errno = ENOTSUP;\n+\t\t\treturn i;\n \t\t}\n \n \t\tif (m->pkt_len < IDPF_MIN_FRAME_SIZE) {\n \t\t\trte_errno = EINVAL;\n \t\t\treturn i;\n \t\t}\n+\n+#ifdef RTE_LIBRTE_ETHDEV_DEBUG\n+\t\tret = rte_validate_tx_offload(m);\n+\t\tif (ret != 0) {\n+\t\t\trte_errno = -ret;\n+\t\t\treturn i;\n+\t\t}\n+#endif\n \t}\n \n \treturn i;\ndiff --git a/drivers/net/idpf/idpf_rxtx.h b/drivers/net/idpf/idpf_rxtx.h\nindex 3853ed55c9..54d297aac6 100644\n--- a/drivers/net/idpf/idpf_rxtx.h\n+++ b/drivers/net/idpf/idpf_rxtx.h\n@@ -23,6 +23,16 @@\n \n #define IDPF_TX_MAX_MTU_SEG\t10\n \n+#define IDPF_MIN_TSO_MSS\t88\n+#define IDPF_MAX_TSO_MSS\t9728\n+#define IDPF_MAX_TSO_FRAME_SIZE\t262143\n+#define IDPF_TX_MAX_MTU_SEG     10\n+\n+#define IDPF_TX_OFFLOAD_MASK RTE_MBUF_F_TX_TCP_SEG\n+\n+#define IDPF_TX_OFFLOAD_NOTSUP_MASK \\\n+\t\t(RTE_MBUF_F_TX_OFFLOAD_MASK ^ IDPF_TX_OFFLOAD_MASK)\n+\n #define IDPF_GET_PTYPE_SIZE(p) \\\n \t(sizeof(struct virtchnl2_ptype) + \\\n \t(((p)->proto_id_count ? ((p)->proto_id_count - 1) : 0) * sizeof((p)->proto_id[0])))\n@@ -115,6 +125,18 @@ struct idpf_tx_queue {\n \tstruct idpf_tx_queue *complq;\n };\n \n+/* Offload features */\n+union idpf_tx_offload {\n+\tuint64_t data;\n+\tstruct {\n+\t\tuint64_t l2_len:7; /* L2 (MAC) Header Length. */\n+\t\tuint64_t l3_len:9; /* L3 (IP) Header Length. */\n+\t\tuint64_t l4_len:8; /* L4 Header Length. */\n+\t\tuint64_t tso_segsz:16; /* TCP TSO segment size */\n+\t\t/* uint64_t unused : 24; */\n+\t};\n+};\n+\n struct idpf_rxq_ops {\n \tvoid (*release_mbufs)(struct idpf_rx_queue *rxq);\n };\n",
    "prefixes": [
        "v15",
        "16/18"
    ]
}