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GET /api/patches/120399/?format=api
{ "id": 120399, "url": "http://patchwork.dpdk.org/api/patches/120399/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20221201042011.2977887-1-psatheesh@marvell.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20221201042011.2977887-1-psatheesh@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20221201042011.2977887-1-psatheesh@marvell.com", "date": "2022-12-01T04:20:10", "name": "[1/2] common/cnxk: add RTE Flow support for SPI to SA index", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "264d8b54ee015ff6c4e726e0c36e1718177d9e68", "submitter": { "id": 1663, "url": "http://patchwork.dpdk.org/api/people/1663/?format=api", "name": "Satheesh Paul Antonysamy", "email": "psatheesh@marvell.com" }, "delegate": { "id": 310, "url": "http://patchwork.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20221201042011.2977887-1-psatheesh@marvell.com/mbox/", "series": [ { "id": 25966, "url": "http://patchwork.dpdk.org/api/series/25966/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=25966", "date": "2022-12-01T04:20:10", "name": "[1/2] common/cnxk: add RTE Flow support for SPI to SA index", "version": 1, "mbox": "http://patchwork.dpdk.org/series/25966/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/120399/comments/", "check": "warning", "checks": "http://patchwork.dpdk.org/api/patches/120399/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 89045A00C2;\n\tThu, 1 Dec 2022 05:20:22 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 2273440A7F;\n\tThu, 1 Dec 2022 05:20:22 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 8488940693\n for <dev@dpdk.org>; Thu, 1 Dec 2022 05:20:21 +0100 (CET)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id\n 2B12AhDH024818 for <dev@dpdk.org>; Wed, 30 Nov 2022 20:20:20 -0800", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3m6k8k0b06-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Wed, 30 Nov 2022 20:20:20 -0800", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Wed, 30 Nov 2022 20:20:18 -0800", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Wed, 30 Nov 2022 20:20:18 -0800", "from satheeshpaullabpc.. (unknown [10.28.34.33])\n by maili.marvell.com (Postfix) with ESMTP id A08C15B6921;\n Wed, 30 Nov 2022 20:20:14 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : mime-version : content-transfer-encoding :\n content-type; s=pfpt0220; bh=mOJkEBA1WRZ/VezLUnAY/xSqJvy/swtu4sozKPY2jvs=;\n b=kEUMuyjPPs7+31xjsuv0GdfTwSa5vFHUWftCsO6+/NQ8e8KYgWiY+yEs5nCUlNrPFyDZ\n 6sj1VlIOrn6Q1aL/cLXM+2TBJeir58lHTd3esvFAjOfifm6XI/whWRTzxWZ2sdmpECO3\n GuowEtpad4K5yYdF15K3oQeyQLrMoh64Rtd62yQI0ngV3yJlHwCrKFiABNPEWcDCakn/\n wwp4XDxCoHKUy6AzVEJkRV974OKxw3McO8vXSCuBK14EhnyDX0yo/246R27o5NaL2HpI\n eeavogTVQwdhGsRRkfypgKTbja89Du6+fqUngDarb0whAJW9xPLwRR/XL8RVRnCLc0l+ oQ==", "From": "<psatheesh@marvell.com>", "To": "Nithin Dabilpuram <ndabilpuram@marvell.com>, Kiran Kumar K\n <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>, Satha Rao\n <skoteshwar@marvell.com>", "CC": "<dev@dpdk.org>, Satheesh Paul <psatheesh@marvell.com>, Jerin Jacob\n <jerinj@marvell.com>", "Subject": "[dpdk-dev] [PATCH 1/2] common/cnxk: add RTE Flow support for SPI to\n SA index", "Date": "Thu, 1 Dec 2022 09:50:10 +0530", "Message-ID": "<20221201042011.2977887-1-psatheesh@marvell.com>", "X-Mailer": "git-send-email 2.35.3", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "EdUQWZB7bUjWe8lbHmji-2Tu25aTcR4E", "X-Proofpoint-ORIG-GUID": "EdUQWZB7bUjWe8lbHmji-2Tu25aTcR4E", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1\n definitions=2022-12-01_03,2022-11-30_02,2022-06-22_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Satheesh Paul <psatheesh@marvell.com>\n\nIn case of IPsec, the inbound SPI can be random. HW supports mapping\nSPI to an arbitrary SA index. SPI to SA index is done using a lookup\nin NPC cam entry with key as SPI, MATCH_ID, LFID. Adding Mbox API\nchanges to configure the match table. And adding RTE FLow changes to\nprogram the match table.\n\nSigned-off-by: Kiran Kumar K <kirankumark@marvell.com>\nReviewed-by: Jerin Jacob <jerinj@marvell.com>\n---\n drivers/common/cnxk/roc_mbox.h | 28 +++++++++-\n drivers/common/cnxk/roc_npc.c | 87 ++++++++++++++++++++++++-----\n drivers/common/cnxk/roc_npc.h | 19 +++++++\n drivers/common/cnxk/roc_npc_parse.c | 4 ++\n 4 files changed, 123 insertions(+), 15 deletions(-)", "diff": "diff --git a/drivers/common/cnxk/roc_mbox.h b/drivers/common/cnxk/roc_mbox.h\nindex 8b0384c737..0989bddc3b 100644\n--- a/drivers/common/cnxk/roc_mbox.h\n+++ b/drivers/common/cnxk/roc_mbox.h\n@@ -268,7 +268,11 @@ struct mbox_msghdr {\n \tM(NIX_READ_INLINE_IPSEC_CFG, 0x8023, nix_read_inline_ipsec_cfg, \\\n \t msg_req, nix_inline_ipsec_cfg)\t\t\t\t \\\n \tM(NIX_LF_INLINE_RQ_CFG, 0x8024, nix_lf_inline_rq_cfg, \\\n-\t nix_rq_cpt_field_mask_cfg_req, msg_rsp)\n+\t nix_rq_cpt_field_mask_cfg_req, msg_rsp) \\\n+\tM(NIX_SPI_TO_SA_ADD, 0x8026, nix_spi_to_sa_add, nix_spi_to_sa_add_req, \\\n+\t nix_spi_to_sa_add_rsp) \\\n+\tM(NIX_SPI_TO_SA_DELETE, 0x8027, nix_spi_to_sa_delete, \\\n+\t nix_spi_to_sa_delete_req, msg_rsp)\n \n /* Messages initiated by AF (range 0xC00 - 0xDFF) */\n #define MBOX_UP_CGX_MESSAGES \\\n@@ -2048,4 +2052,26 @@ struct sdp_chan_info_msg {\n \tstruct sdp_node_info info;\n };\n \n+/* For SPI to SA index add */\n+struct nix_spi_to_sa_add_req {\n+\tstruct mbox_msghdr hdr;\n+\tuint32_t __io sa_index;\n+\tuint32_t __io spi_index;\n+\tuint16_t __io match_id;\n+\tbool __io valid;\n+};\n+\n+struct nix_spi_to_sa_add_rsp {\n+\tstruct mbox_msghdr hdr;\n+\tuint16_t __io hash_index;\n+\tuint8_t __io way;\n+\tuint8_t __io is_duplicate;\n+};\n+\n+/* To free SPI to SA index */\n+struct nix_spi_to_sa_delete_req {\n+\tstruct mbox_msghdr hdr;\n+\tuint16_t __io hash_index;\n+\tuint8_t __io way;\n+};\n #endif /* __ROC_MBOX_H__ */\ndiff --git a/drivers/common/cnxk/roc_npc.c b/drivers/common/cnxk/roc_npc.c\nindex b38389b18a..374c5c1aef 100644\n--- a/drivers/common/cnxk/roc_npc.c\n+++ b/drivers/common/cnxk/roc_npc.c\n@@ -341,17 +341,23 @@ roc_npc_validate_portid_action(struct roc_npc *roc_npc_src,\n }\n \n static int\n-npc_parse_msns_action(struct roc_npc *roc_npc, const struct roc_npc_action *act,\n-\t\t struct roc_npc_flow *flow, uint8_t *has_msns_action)\n+npc_parse_spi_to_sa_action(struct roc_npc *roc_npc, const struct roc_npc_action *act,\n+\t\t\t struct roc_npc_flow *flow, uint8_t *has_msns_action)\n {\n \tconst struct roc_npc_sec_action *sec_action;\n+\tstruct nix_spi_to_sa_add_req *req;\n+\tstruct nix_spi_to_sa_add_rsp *rsp;\n+\tstruct nix_inl_dev *inl_dev;\n+\tstruct idev_cfg *idev;\n \tunion {\n \t\tuint64_t reg;\n \t\tunion nix_rx_vtag_action_u act;\n \t} vtag_act;\n+\tstruct mbox *mbox;\n+\tint rc;\n \n-\tif (roc_npc->roc_nix->custom_sa_action == 0 ||\n-\t roc_model_is_cn9k() == 1 || act->conf == NULL)\n+\tif (roc_npc->roc_nix->custom_sa_action == 0 || roc_model_is_cn9k() == 1 ||\n+\t act->conf == NULL || flow->is_validate)\n \t\treturn 0;\n \n \t*has_msns_action = true;\n@@ -362,6 +368,12 @@ npc_parse_msns_action(struct roc_npc *roc_npc, const struct roc_npc_action *act,\n \tvtag_act.act.sa_hi = sec_action->sa_hi;\n \tvtag_act.act.sa_lo = sec_action->sa_lo;\n \n+\tidev = idev_get_cfg();\n+\tif (!idev)\n+\t\treturn -1;\n+\n+\tinl_dev = idev->nix_inl_dev;\n+\n \tswitch (sec_action->alg) {\n \tcase ROC_NPC_SEC_ACTION_ALG0:\n \t\tbreak;\n@@ -373,6 +385,25 @@ npc_parse_msns_action(struct roc_npc *roc_npc, const struct roc_npc_action *act,\n \t\tvtag_act.act.vtag1_valid = false;\n \t\tvtag_act.act.vtag1_lid = ROC_NPC_SEC_ACTION_ALG2;\n \t\tbreak;\n+\tcase ROC_NPC_SEC_ACTION_ALG3:\n+\t\tvtag_act.act.vtag1_valid = false;\n+\t\tvtag_act.act.vtag1_lid = 0;\n+\t\tmbox = inl_dev->dev.mbox;\n+\t\treq = mbox_alloc_msg_nix_spi_to_sa_add(mbox);\n+\t\tif (req == NULL)\n+\t\t\treturn -ENOSPC;\n+\t\treq->sa_index = sec_action->sa_index;\n+\t\treq->spi_index = plt_be_to_cpu_32(flow->msns_info.spi);\n+\t\treq->match_id = flow->match_id;\n+\t\treq->valid = true;\n+\t\trc = mbox_process_msg(mbox, (void *)&rsp);\n+\t\tif (rc)\n+\t\t\treturn rc;\n+\t\tflow->msns_info.hash_index = rsp->hash_index;\n+\t\tflow->msns_info.way = rsp->way;\n+\t\tflow->msns_info.duplicate = rsp->is_duplicate;\n+\t\tflow->msns_info.has_action = true;\n+\t\tbreak;\n \tdefault:\n \t\treturn -1;\n \t}\n@@ -389,6 +420,7 @@ npc_parse_actions(struct roc_npc *roc_npc, const struct roc_npc_attr *attr,\n {\n \tconst struct roc_npc_action_port_id *act_portid;\n \tstruct npc *npc = roc_npc_to_npc_priv(roc_npc);\n+\tconst struct roc_npc_action *sec_action = NULL;\n \tconst struct roc_npc_action_mark *act_mark;\n \tconst struct roc_npc_action_meter *act_mtr;\n \tconst struct roc_npc_action_queue *act_q;\n@@ -421,6 +453,7 @@ npc_parse_actions(struct roc_npc *roc_npc, const struct roc_npc_attr *attr,\n \t\t\t}\n \t\t\tmark = act_mark->id + 1;\n \t\t\treq_act |= ROC_NPC_ACTION_TYPE_MARK;\n+\t\t\tflow->match_id = mark;\n \t\t\tbreak;\n \n \t\tcase ROC_NPC_ACTION_TYPE_FLAG:\n@@ -499,12 +532,7 @@ npc_parse_actions(struct roc_npc *roc_npc, const struct roc_npc_attr *attr,\n \t\t\t\trq = inl_rq->qid;\n \t\t\t\tpf_func = nix_inl_dev_pffunc_get();\n \t\t\t}\n-\t\t\trc = npc_parse_msns_action(roc_npc, actions, flow,\n-\t\t\t\t\t\t &has_msns_act);\n-\t\t\tif (rc) {\n-\t\t\t\terrcode = NPC_ERR_ACTION_NOTSUP;\n-\t\t\t\tgoto err_exit;\n-\t\t\t}\n+\t\t\tsec_action = actions;\n \t\t\tbreak;\n \t\tcase ROC_NPC_ACTION_TYPE_VLAN_STRIP:\n \t\t\treq_act |= ROC_NPC_ACTION_TYPE_VLAN_STRIP;\n@@ -530,13 +558,19 @@ npc_parse_actions(struct roc_npc *roc_npc, const struct roc_npc_attr *attr,\n \t\t}\n \t}\n \n-\tif (req_act & (ROC_NPC_ACTION_TYPE_VLAN_INSERT |\n-\t\t ROC_NPC_ACTION_TYPE_VLAN_ETHTYPE_INSERT |\n+\tif (sec_action) {\n+\t\trc = npc_parse_spi_to_sa_action(roc_npc, sec_action, flow, &has_msns_act);\n+\t\tif (rc) {\n+\t\t\terrcode = NPC_ERR_ACTION_NOTSUP;\n+\t\t\tgoto err_exit;\n+\t\t}\n+\t}\n+\n+\tif (req_act & (ROC_NPC_ACTION_TYPE_VLAN_INSERT | ROC_NPC_ACTION_TYPE_VLAN_ETHTYPE_INSERT |\n \t\t ROC_NPC_ACTION_TYPE_VLAN_PCP_INSERT))\n \t\tvlan_insert_action = true;\n \n-\tif ((req_act & (ROC_NPC_ACTION_TYPE_VLAN_INSERT |\n-\t\t\tROC_NPC_ACTION_TYPE_VLAN_ETHTYPE_INSERT |\n+\tif ((req_act & (ROC_NPC_ACTION_TYPE_VLAN_INSERT | ROC_NPC_ACTION_TYPE_VLAN_ETHTYPE_INSERT |\n \t\t\tROC_NPC_ACTION_TYPE_VLAN_PCP_INSERT)) ==\n \t ROC_NPC_ACTION_TYPE_VLAN_PCP_INSERT) {\n \t\tplt_err(\"PCP insert action can't be supported alone\");\n@@ -1343,12 +1377,37 @@ npc_rss_group_free(struct npc *npc, struct roc_npc_flow *flow)\n \treturn 0;\n }\n \n+static int\n+roc_npc_delete_msns_action(struct roc_npc *roc_npc, struct roc_npc_flow *flow)\n+{\n+\tstruct roc_nix *roc_nix = roc_npc->roc_nix;\n+\tstruct nix_spi_to_sa_delete_req *req;\n+\tstruct mbox *mbox;\n+\tstruct nix *nix;\n+\n+\tif (!flow->msns_info.has_action || flow->msns_info.duplicate)\n+\t\treturn 0;\n+\n+\tnix = roc_nix_to_nix_priv(roc_nix);\n+\tmbox = (&nix->dev)->mbox;\n+\treq = mbox_alloc_msg_nix_spi_to_sa_delete(mbox);\n+\tif (req == NULL)\n+\t\treturn -ENOSPC;\n+\treq->hash_index = flow->msns_info.hash_index;\n+\treq->way = flow->msns_info.way;\n+\treturn mbox_process_msg(mbox, NULL);\n+}\n+\n int\n roc_npc_flow_destroy(struct roc_npc *roc_npc, struct roc_npc_flow *flow)\n {\n \tstruct npc *npc = roc_npc_to_npc_priv(roc_npc);\n \tint rc;\n \n+\trc = roc_npc_delete_msns_action(roc_npc, flow);\n+\tif (rc)\n+\t\treturn rc;\n+\n \trc = npc_rss_group_free(npc, flow);\n \tif (rc != 0) {\n \t\tplt_err(\"Failed to free rss action rc = %d\", rc);\ndiff --git a/drivers/common/cnxk/roc_npc.h b/drivers/common/cnxk/roc_npc.h\nindex 1b4e5521cb..80d70dd4c4 100644\n--- a/drivers/common/cnxk/roc_npc.h\n+++ b/drivers/common/cnxk/roc_npc.h\n@@ -191,6 +191,14 @@ struct roc_npc_action_port_id {\n \tuint32_t id;\t\t/**< port ID. */\n };\n \n+/**\n+ * ESP Header\n+ */\n+struct roc_npc_item_esp_hdr {\n+\tuint32_t spi; /**< Security Parameters Index */\n+\tuint32_t seq; /**< packet sequence number */\n+};\n+\n struct roc_npc_action_queue {\n \tuint16_t index; /**< Queue index to use. */\n };\n@@ -242,6 +250,14 @@ struct roc_npc_flow_dump_data {\n \tuint16_t ltype;\n };\n \n+struct roc_npc_msns_action_info {\n+\tuint32_t spi;\n+\tuint32_t hash_index;\n+\tuint8_t way;\n+\tbool duplicate;\n+\tbool has_action;\n+};\n+\n struct roc_npc_flow {\n \tuint8_t nix_intf;\n \tuint8_t enable;\n@@ -261,6 +277,9 @@ struct roc_npc_flow {\n #define ROC_NPC_MAX_FLOW_PATTERNS 32\n \tstruct roc_npc_flow_dump_data dump_data[ROC_NPC_MAX_FLOW_PATTERNS];\n \tuint16_t num_patterns;\n+\tstruct roc_npc_msns_action_info msns_info;\n+\tbool is_validate;\n+\tuint16_t match_id;\n \n \tTAILQ_ENTRY(roc_npc_flow) next;\n };\ndiff --git a/drivers/common/cnxk/roc_npc_parse.c b/drivers/common/cnxk/roc_npc_parse.c\nindex 947e1ec53d..746a79a836 100644\n--- a/drivers/common/cnxk/roc_npc_parse.c\n+++ b/drivers/common/cnxk/roc_npc_parse.c\n@@ -731,6 +731,7 @@ int\n npc_parse_le(struct npc_parse_state *pst)\n {\n \tconst struct roc_npc_item_info *pattern = pst->pattern;\n+\tconst struct roc_npc_item_esp_hdr *esp = NULL;\n \tchar hw_mask[NPC_MAX_EXTRACT_HW_LEN];\n \tstruct npc_parse_item_info info;\n \tint lid, lt, lflags;\n@@ -787,6 +788,9 @@ npc_parse_le(struct npc_parse_state *pst)\n \tcase ROC_NPC_ITEM_TYPE_ESP:\n \t\tlt = NPC_LT_LE_ESP;\n \t\tinfo.len = pst->pattern->size;\n+\t\tesp = (const struct roc_npc_item_esp_hdr *)pattern->spec;\n+\t\tif (esp)\n+\t\t\tpst->flow->msns_info.spi = esp->spi;\n \t\tbreak;\n \tdefault:\n \t\treturn 0;\n", "prefixes": [ "1/2" ] }