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GET /api/patches/123056/?format=api
{ "id": 123056, "url": "http://patchwork.dpdk.org/api/patches/123056/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230205134154.408984-3-yongquanx@nvidia.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230205134154.408984-3-yongquanx@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230205134154.408984-3-yongquanx@nvidia.com", "date": "2023-02-05T13:41:53", "name": "[v3,2/3] net/mlx5: add ICMPv6 ID and sequence match support", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "a474d626449525774a9073d34921324f2f4a2836", "submitter": { "id": 2910, "url": "http://patchwork.dpdk.org/api/people/2910/?format=api", "name": "Leo Xu", "email": "yongquanx@nvidia.com" }, "delegate": { "id": 319, "url": "http://patchwork.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230205134154.408984-3-yongquanx@nvidia.com/mbox/", "series": [ { "id": 26794, "url": "http://patchwork.dpdk.org/api/series/26794/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=26794", "date": "2023-02-05T13:41:51", "name": "support match icmpv6 ID and sequence", "version": 3, "mbox": "http://patchwork.dpdk.org/series/26794/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/123056/comments/", "check": "warning", "checks": "http://patchwork.dpdk.org/api/patches/123056/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", 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b=taRMgeRP8mFy2O3MPkbhiG7KZ0yU0tCdDQnxEeeUmT0+iTfzyVFI6jqEZA/yZx0ymAGalTBEds1qA8mV/QcX05J8RO+5TxNkMSBVrSysISc8AyiICiYJkUvucWUJhXU71fL6KeqlAYWz8FXaEanzNkeTC3o7qBFKbWRdLVDHuOEHu2YFQaenUScSoBWsOJKFdcRO+10AHRAjAfVuNY5n2+yA7+JItdeWSo9WI7bucMSzwKEcXl38YUDGqWBauUEznQrgHlvdxxp7xsyEFymlrR5Kto7dAtLfpjLHQ07P2UKGS5YX6k4F+lC6z0zs4to0E6J2CFuA8MNjKghICpHMxw==", "X-MS-Exchange-Authentication-Results": "spf=pass (sender IP is 216.228.117.161)\n smtp.mailfrom=nvidia.com;\n dkim=none (message not signed)\n header.d=none;dmarc=pass action=none header.from=nvidia.com;", "Received-SPF": "Pass (protection.outlook.com: domain of nvidia.com designates\n 216.228.117.161 as permitted sender) receiver=protection.outlook.com;\n client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C", "From": "Leo Xu <yongquanx@nvidia.com>", "To": "<dev@dpdk.org>", "CC": "Matan Azrad <matan@nvidia.com>, Viacheslav Ovsiienko\n <viacheslavo@nvidia.com>", "Subject": "[PATCH v3 2/3] net/mlx5: add ICMPv6 ID and sequence match support", "Date": "Sun, 5 Feb 2023 15:41:53 +0200", "Message-ID": "<20230205134154.408984-3-yongquanx@nvidia.com>", "X-Mailer": "git-send-email 2.27.0", "In-Reply-To": "<20230205134154.408984-1-yongquanx@nvidia.com>", "References": "<20221220074403.1015411-1-yongquanx@nvidia.com>\n <20230205134154.408984-1-yongquanx@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[10.126.230.37]", "X-ClientProxiedBy": "rnnvmail203.nvidia.com (10.129.68.9) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "CO1PEPF00001A60:EE_|SN7PR12MB7251:EE_", "X-MS-Office365-Filtering-Correlation-Id": "7e27d1ef-c016-402c-da8e-08db077ee096", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n d82+xN2Tqbyr8Q1ztkBmkffIs4SbctYYFVXND9KsinYa8rThQuF1VnI/pEiSqNWildc7Li9ZbKZWDPjiIbWWroe6Czgv30dR/pQRiLayo6ZF3QLMPigE8gfoT4oN9J6IKrOx/b9E3HB4bHhYgLpJPCXrK3r3yFJQmgpJFhtemlIpyjZHxP3V2w9htPTZwVPr4GEWmf3vvLvDsUyFa4LZxhaYCoO+75oeZeaWgmfFmtIZdCVZMgyAk47e4mpWoTuw+32cJ49iR3yhpJncGAHEX0VZNUMNEEDFTK6eWSinLRNKRtqyw0g46a+xbWgc8qTdseAzs/+ncqFQexyUzfHKYeg+R6tcqiGzSHW5TdNdzLOmdHZBVb/+LTVlsfpV+MvBshzgKdW62lJwzr+HUKvZR9iBORD1zzd/62re3oah2NidwXePYblFCnFlyHMsX06d2l9Oezgdz6Ac9BYdRqLZMyG+k5ikNi+ecC0yIyODNMNlPSDgcCSKm6K4kO8SqHwtHv810N6Y7eVLQpxhnAhRBF+PcYm7wbra4DPGKzLBbE/ORpAb2WP04jVvypGEbcfavoxbDS5R2eJxFl6qEXLOuIEZFU1Bos7ydO5SJA1u4LCT4XAuk/xPX8Uv+n8ZxptVGZ/MDVZvUXwaM47nlVO8bL0C4+Ba+tcO0oFEb4k1RiLPNy4hHdun6T4hDX9uuVF+W/5hYBnI9Utd0WAiLjcJYw==", "X-Forefront-Antispam-Report": "CIP:216.228.117.161; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE;\n SFS:(13230025)(4636009)(136003)(376002)(39860400002)(396003)(346002)(451199018)(36840700001)(40470700004)(46966006)(82310400005)(40460700003)(316002)(107886003)(55016003)(40480700001)(6666004)(1076003)(2616005)(478600001)(26005)(16526019)(6286002)(4326008)(8676002)(6916009)(70206006)(7696005)(186003)(54906003)(356005)(86362001)(7636003)(36756003)(82740400003)(70586007)(47076005)(336012)(426003)(83380400001)(36860700001)(5660300002)(41300700001)(8936002)(2906002);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "05 Feb 2023 13:42:51.6594 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 7e27d1ef-c016-402c-da8e-08db077ee096", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n CO1PEPF00001A60.namprd05.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "SN7PR12MB7251", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "This patch adds ICMPv6 ID and sequence match support.\nSince type and code of ICMPv6 echo is already specified by ITEM type:\n RTE_FLOW_ITEM_TYPE_ICMP6_ECHO_REQUEST\n RTE_FLOW_ITEM_TYPE_ICMP6_ECHO_REPLY\nmlx5 pmd will set appropriate type and code automatically:\n Echo request: type(128), code(0)\n Echo reply: type(129), code(0)\ntype and code provided by application will be ignored.\n\nSigned-off-by: Leo Xu <yongquanx@nvidia.com>\n---\n doc/guides/nics/features/mlx5.ini | 2 +\n doc/guides/nics/mlx5.rst | 4 +-\n doc/guides/rel_notes/release_23_03.rst | 4 ++\n drivers/net/mlx5/mlx5_flow.c | 61 +++++++++++++++++++++\n drivers/net/mlx5/mlx5_flow.h | 4 ++\n drivers/net/mlx5/mlx5_flow_dv.c | 76 ++++++++++++++++++++++++++\n drivers/net/mlx5/mlx5_flow_hw.c | 2 +\n 7 files changed, 151 insertions(+), 2 deletions(-)", "diff": "diff --git a/doc/guides/nics/features/mlx5.ini b/doc/guides/nics/features/mlx5.ini\nindex 62fd330e2b..eb016f34da 100644\n--- a/doc/guides/nics/features/mlx5.ini\n+++ b/doc/guides/nics/features/mlx5.ini\n@@ -69,6 +69,8 @@ gtp = Y\n gtp_psc = Y\n icmp = Y\n icmp6 = Y\n+icmp6_echo_request = Y\n+icmp6_echo_reply = Y\n integrity = Y\n ipv4 = Y\n ipv6 = Y\ndiff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst\nindex f137f156f9..9c6f1cca19 100644\n--- a/doc/guides/nics/mlx5.rst\n+++ b/doc/guides/nics/mlx5.rst\n@@ -405,8 +405,8 @@ Limitations\n - The input buffer, providing the removal size, is not validated.\n - The buffer size must match the length of the headers to be removed.\n \n-- ICMP(code/type/identifier/sequence number) / ICMP6(code/type) matching, IP-in-IP and MPLS flow matching are all\n- mutually exclusive features which cannot be supported together\n+- ICMP(code/type/identifier/sequence number) / ICMP6(code/type/identifier/sequence number) matching,\n+ IP-in-IP and MPLS flow matching are all mutually exclusive features which cannot be supported together\n (see :ref:`mlx5_firmware_config`).\n \n - LRO:\ndiff --git a/doc/guides/rel_notes/release_23_03.rst b/doc/guides/rel_notes/release_23_03.rst\nindex 3f5c7af3b6..cac69e3173 100644\n--- a/doc/guides/rel_notes/release_23_03.rst\n+++ b/doc/guides/rel_notes/release_23_03.rst\n@@ -74,6 +74,10 @@ New Features\n * Added flow items to match ICMPv6 echo request and reply packets.\n Matching patterns can include ICMP identifier and sequence numbers.\n \n+* **Updated Mellanox mlx5 driver.**\n+\n+ * Added support for matching on ICMPv6 ID and sequence fields.\n+\n \n Removed Items\n -------------\ndiff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c\nindex f5e2831480..b38062c70e 100644\n--- a/drivers/net/mlx5/mlx5_flow.c\n+++ b/drivers/net/mlx5/mlx5_flow.c\n@@ -2352,6 +2352,67 @@ mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,\n \treturn 0;\n }\n \n+/**\n+ * Validate ICMP6 echo request/reply item.\n+ *\n+ * @param[in] item\n+ * Item specification.\n+ * @param[in] item_flags\n+ * Bit-fields that holds the items detected until now.\n+ * @param[in] ext_vlan_sup\n+ * Whether extended VLAN features are supported or not.\n+ * @param[out] error\n+ * Pointer to error structure.\n+ *\n+ * @return\n+ * 0 on success, a negative errno value otherwise and rte_errno is set.\n+ */\n+int\n+mlx5_flow_validate_item_icmp6_echo(const struct rte_flow_item *item,\n+\t\t\t\t uint64_t item_flags,\n+\t\t\t\t uint8_t target_protocol,\n+\t\t\t\t struct rte_flow_error *error)\n+{\n+\tconst struct rte_flow_item_icmp6_echo *mask = item->mask;\n+\tconst struct rte_flow_item_icmp6_echo nic_mask = {\n+\t\t.hdr.base.type = 0xff,\n+\t\t.hdr.base.code = 0xff,\n+\t\t.hdr.identifier = RTE_BE16(0xffff),\n+\t\t.hdr.sequence = RTE_BE16(0xffff),\n+\t};\n+\tconst int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);\n+\tconst uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :\n+\t\t\t\t MLX5_FLOW_LAYER_OUTER_L3_IPV6;\n+\tconst uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :\n+\t\t\t\t MLX5_FLOW_LAYER_OUTER_L4;\n+\tint ret;\n+\n+\tif (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)\n+\t\treturn rte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM, item,\n+\t\t\t\t\t \"protocol filtering not compatible\"\n+\t\t\t\t\t \" with ICMP6 layer\");\n+\tif (!(item_flags & l3m))\n+\t\treturn rte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM, item,\n+\t\t\t\t\t \"IPv6 is mandatory to filter on\"\n+\t\t\t\t\t \" ICMP6\");\n+\tif (item_flags & l4m)\n+\t\treturn rte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM, item,\n+\t\t\t\t\t \"multiple L4 layers not supported\");\n+\tif (!mask)\n+\t\tmask = &nic_mask;\n+\tret = mlx5_flow_item_acceptable\n+\t\t(item, (const uint8_t *)mask,\n+\t\t (const uint8_t *)&nic_mask,\n+\t\t sizeof(struct rte_flow_item_icmp6_echo),\n+\t\t MLX5_ITEM_RANGE_NOT_ACCEPTED, error);\n+\tif (ret < 0)\n+\t\treturn ret;\n+\treturn 0;\n+}\n+\n /**\n * Validate ICMP item.\n *\ndiff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h\nindex e376dcae93..86311b0b08 100644\n--- a/drivers/net/mlx5/mlx5_flow.h\n+++ b/drivers/net/mlx5/mlx5_flow.h\n@@ -2322,6 +2322,10 @@ int mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,\n \t\t\t\t uint64_t item_flags,\n \t\t\t\t uint8_t target_protocol,\n \t\t\t\t struct rte_flow_error *error);\n+int mlx5_flow_validate_item_icmp6_echo(const struct rte_flow_item *item,\n+\t\t\t\t uint64_t item_flags,\n+\t\t\t\t uint8_t target_protocol,\n+\t\t\t\t struct rte_flow_error *error);\n int mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,\n \t\t\t\t uint64_t item_flags,\n \t\t\t\t uint8_t target_protocol,\ndiff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c\nindex 7ca909999b..2ac9587761 100644\n--- a/drivers/net/mlx5/mlx5_flow_dv.c\n+++ b/drivers/net/mlx5/mlx5_flow_dv.c\n@@ -7370,6 +7370,17 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,\n \t\t\titem_ipv6_proto = IPPROTO_ICMPV6;\n \t\t\tlast_item = MLX5_FLOW_LAYER_ICMP6;\n \t\t\tbreak;\n+\t\tcase RTE_FLOW_ITEM_TYPE_ICMP6_ECHO_REQUEST:\n+\t\tcase RTE_FLOW_ITEM_TYPE_ICMP6_ECHO_REPLY:\n+\t\t\tret = mlx5_flow_validate_item_icmp6_echo(items,\n+\t\t\t\t\t\t\t\t item_flags,\n+\t\t\t\t\t\t\t\t next_protocol,\n+\t\t\t\t\t\t\t\t error);\n+\t\t\tif (ret < 0)\n+\t\t\t\treturn ret;\n+\t\t\titem_ipv6_proto = IPPROTO_ICMPV6;\n+\t\t\tlast_item = MLX5_FLOW_LAYER_ICMP6;\n+\t\t\tbreak;\n \t\tcase RTE_FLOW_ITEM_TYPE_TAG:\n \t\t\tret = flow_dv_validate_item_tag(dev, items,\n \t\t\t\t\t\t\tattr, error);\n@@ -10269,6 +10280,65 @@ flow_dv_translate_item_icmp6(void *key, const struct rte_flow_item *item,\n \t\t icmp6_v->code & icmp6_m->code);\n }\n \n+/**\n+ * Add ICMP6 echo request/reply item to the value.\n+ *\n+ * @param[in, out] key\n+ * Flow matcher value.\n+ * @param[in] item\n+ * Flow pattern to translate.\n+ * @param[in] inner\n+ * Item is inner pattern.\n+ * @param[in] key_type\n+ * Set flow matcher mask or value.\n+ */\n+static void\n+flow_dv_translate_item_icmp6_echo(void *key, const struct rte_flow_item *item,\n+\t\t\t\t int inner, uint32_t key_type)\n+{\n+\tconst struct rte_flow_item_icmp6_echo *icmp6_m;\n+\tconst struct rte_flow_item_icmp6_echo *icmp6_v;\n+\tuint32_t icmp6_header_data_m = 0;\n+\tuint32_t icmp6_header_data_v = 0;\n+\tvoid *headers_v;\n+\tvoid *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);\n+\tuint8_t icmp6_type = 0;\n+\tstruct rte_flow_item_icmp6_echo zero_mask;\n+\n+\tmemset(&zero_mask, 0, sizeof(zero_mask));\n+\theaders_v = inner ? MLX5_ADDR_OF(fte_match_param, key, inner_headers) :\n+\t\tMLX5_ADDR_OF(fte_match_param, key, outer_headers);\n+\tif (key_type & MLX5_SET_MATCHER_M)\n+\t\tMLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, 0xFF);\n+\telse\n+\t\tMLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,\n+\t\t\t IPPROTO_ICMPV6);\n+\tMLX5_ITEM_UPDATE(item, key_type, icmp6_v, icmp6_m, &zero_mask);\n+\t/* Set fixed type and code for icmpv6 echo request or reply */\n+\ticmp6_type = (item->type == RTE_FLOW_ITEM_TYPE_ICMP6_ECHO_REQUEST ?\n+\t\t RTE_ICMP6_ECHO_REQUEST : RTE_ICMP6_ECHO_REPLY);\n+\tif (key_type & MLX5_SET_MATCHER_M) {\n+\t\tMLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type, 0xFF);\n+\t\tMLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code, 0xFF);\n+\t} else {\n+\t\tMLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type, icmp6_type);\n+\t\tMLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code, 0);\n+\t}\n+\tif (icmp6_v == NULL)\n+\t\treturn;\n+\t/* Set icmp6 header data (identifier & sequence) accordingly */\n+\ticmp6_header_data_m =\n+\t\t(rte_be_to_cpu_16(icmp6_m->hdr.identifier) << 16) |\n+\t\trte_be_to_cpu_16(icmp6_m->hdr.sequence);\n+\tif (icmp6_header_data_m) {\n+\t\ticmp6_header_data_v =\n+\t\t\t(rte_be_to_cpu_16(icmp6_v->hdr.identifier) << 16) |\n+\t\t\trte_be_to_cpu_16(icmp6_v->hdr.sequence);\n+\t\tMLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_header_data,\n+\t\t\t icmp6_header_data_v & icmp6_header_data_m);\n+\t}\n+}\n+\n /**\n * Add ICMP item to the value.\n *\n@@ -13381,6 +13451,12 @@ flow_dv_translate_items(struct rte_eth_dev *dev,\n \t\twks->priority = MLX5_PRIORITY_MAP_L4;\n \t\tlast_item = MLX5_FLOW_LAYER_ICMP6;\n \t\tbreak;\n+\tcase RTE_FLOW_ITEM_TYPE_ICMP6_ECHO_REQUEST:\n+\tcase RTE_FLOW_ITEM_TYPE_ICMP6_ECHO_REPLY:\n+\t\tflow_dv_translate_item_icmp6_echo(key, items, tunnel, key_type);\n+\t\twks->priority = MLX5_PRIORITY_MAP_L4;\n+\t\tlast_item = MLX5_FLOW_LAYER_ICMP6;\n+\t\tbreak;\n \tcase RTE_FLOW_ITEM_TYPE_TAG:\n \t\tflow_dv_translate_item_tag(dev, key, items, key_type);\n \t\tlast_item = MLX5_FLOW_ITEM_TAG;\ndiff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c\nindex 20c71ff7f0..dbf935ca26 100644\n--- a/drivers/net/mlx5/mlx5_flow_hw.c\n+++ b/drivers/net/mlx5/mlx5_flow_hw.c\n@@ -4731,6 +4731,8 @@ flow_hw_pattern_validate(struct rte_eth_dev *dev,\n \t\tcase RTE_FLOW_ITEM_TYPE_GRE_OPTION:\n \t\tcase RTE_FLOW_ITEM_TYPE_ICMP:\n \t\tcase RTE_FLOW_ITEM_TYPE_ICMP6:\n+\t\tcase RTE_FLOW_ITEM_TYPE_ICMP6_ECHO_REQUEST:\n+\t\tcase RTE_FLOW_ITEM_TYPE_ICMP6_ECHO_REPLY:\n \t\tcase RTE_FLOW_ITEM_TYPE_CONNTRACK:\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ITEM_TYPE_INTEGRITY:\n", "prefixes": [ "v3", "2/3" ] }