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GET /api/patches/124764/?format=api
{ "id": 124764, "url": "http://patchwork.dpdk.org/api/patches/124764/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230303081013.589868-7-ndabilpuram@marvell.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230303081013.589868-7-ndabilpuram@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230303081013.589868-7-ndabilpuram@marvell.com", "date": "2023-03-03T08:10:05", "name": "[07/15] common/cnxk: enable 10K B0 support for inline IPsec", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "6c9b278e53fd0a9e509f19c4c342404e2c0b6b8a", "submitter": { "id": 1202, "url": "http://patchwork.dpdk.org/api/people/1202/?format=api", "name": "Nithin Dabilpuram", "email": "ndabilpuram@marvell.com" }, "delegate": { "id": 310, "url": "http://patchwork.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230303081013.589868-7-ndabilpuram@marvell.com/mbox/", "series": [ { "id": 27237, "url": "http://patchwork.dpdk.org/api/series/27237/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=27237", "date": "2023-03-03T08:09:59", "name": "[01/15] net/cnxk: resolve sefgault caused during transmit completion", "version": 1, "mbox": "http://patchwork.dpdk.org/series/27237/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/124764/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/124764/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id A2AD541DC3;\n\tFri, 3 Mar 2023 09:11:36 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 61C2B42C76;\n\tFri, 3 Mar 2023 09:11:12 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id EDB1C42D13\n for <dev@dpdk.org>; Fri, 3 Mar 2023 09:11:09 +0100 (CET)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id\n 32373jY8024813 for <dev@dpdk.org>; Fri, 3 Mar 2023 00:11:09 -0800", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3p2vg53du1-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Fri, 03 Mar 2023 00:11:08 -0800", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.42;\n Fri, 3 Mar 2023 00:11:06 -0800", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.42 via Frontend\n Transport; Fri, 3 Mar 2023 00:11:06 -0800", "from hyd1588t430.caveonetworks.com (unknown [10.29.52.204])\n by maili.marvell.com (Postfix) with ESMTP id 20FDA3F705E;\n Fri, 3 Mar 2023 00:11:03 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=OET8acqNcFr7aBVz45Kbr3Eutl9pxmYvvjlyBIUnn/0=;\n b=V4VERgEajWsd5+z7uKzFgAH6wHmCptLvFSMpSuwZD8gkaIFP59A4/zOvybV5m77/d1R5\n uzGkOXksMhME1+WDPEYWijNB8j1WiK0ZKoH9DUdk40oStduousKOEXAnpkgqOkUB4gTY\n QD9aG1n5awJ2eW5FofhWOV89PDJmAr4/DVesv3TSQt6/xNljL10aERPPAO9C2cBIuLfi\n sGUrNH9qCK3a+6Hu3Su58RnWf+lQU7EqO73goVVsWBxITrBYH06vo1h98W1w8NuHRwf5\n eD/FORuxoXGYh2qraysNwa7kMXs19+++IODkCglhymbI6k0UWANB2lQhodSfldOk+Aa0 Ew==", "From": "Nithin Dabilpuram <ndabilpuram@marvell.com>", "To": "Nithin Dabilpuram <ndabilpuram@marvell.com>, Kiran Kumar K\n <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>, Satha Rao\n <skoteshwar@marvell.com>", "CC": "<jerinj@marvell.com>, <dev@dpdk.org>", "Subject": "[PATCH 07/15] common/cnxk: enable 10K B0 support for inline IPsec", "Date": "Fri, 3 Mar 2023 13:40:05 +0530", "Message-ID": "<20230303081013.589868-7-ndabilpuram@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20230303081013.589868-1-ndabilpuram@marvell.com>", "References": "<20230303081013.589868-1-ndabilpuram@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "E5bIG2d4JHB9fjopiE0zbNykPtvtSP2k", "X-Proofpoint-GUID": "E5bIG2d4JHB9fjopiE0zbNykPtvtSP2k", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.219,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22\n definitions=2023-03-03_01,2023-03-02_02,2023-02-09_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Enable support similar to CN10KB as CN10KA_B0 is similar\nto CN10KB.\n\nSigned-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>\n---\n drivers/common/cnxk/roc_api.h | 3 +++\n drivers/common/cnxk/roc_cpt.h | 2 --\n drivers/common/cnxk/roc_features.h | 31 +++++++++++++++++++++++++++++\n drivers/common/cnxk/roc_nix_debug.c | 16 ++++++++-------\n drivers/common/cnxk/roc_nix_fc.c | 10 ++++++++--\n drivers/common/cnxk/roc_nix_inl.c | 11 ++--------\n drivers/common/cnxk/roc_nix_inl.h | 1 -\n drivers/common/cnxk/roc_nix_queue.c | 5 +++--\n drivers/common/cnxk/version.map | 1 -\n drivers/net/cnxk/cn10k_ethdev.c | 4 ++--\n drivers/net/cnxk/cn10k_ethdev_sec.c | 2 +-\n 11 files changed, 59 insertions(+), 27 deletions(-)\n create mode 100644 drivers/common/cnxk/roc_features.h", "diff": "diff --git a/drivers/common/cnxk/roc_api.h b/drivers/common/cnxk/roc_api.h\nindex 9d7f5417c2..993a2f7a68 100644\n--- a/drivers/common/cnxk/roc_api.h\n+++ b/drivers/common/cnxk/roc_api.h\n@@ -47,6 +47,9 @@\n /* HW Errata */\n #include \"roc_errata.h\"\n \n+/* HW Features */\n+#include \"roc_features.h\"\n+\n /* Mbox */\n #include \"roc_mbox.h\"\n \ndiff --git a/drivers/common/cnxk/roc_cpt.h b/drivers/common/cnxk/roc_cpt.h\nindex 6966e0f10b..d3a5683dc8 100644\n--- a/drivers/common/cnxk/roc_cpt.h\n+++ b/drivers/common/cnxk/roc_cpt.h\n@@ -9,8 +9,6 @@\n \n #include \"roc_platform.h\"\n \n-struct nix_inline_ipsec_cfg;\n-\n #define ROC_AE_CPT_BLOCK_TYPE1 0\n #define ROC_AE_CPT_BLOCK_TYPE2 1\n \ndiff --git a/drivers/common/cnxk/roc_features.h b/drivers/common/cnxk/roc_features.h\nnew file mode 100644\nindex 0000000000..27bccd6b9c\n--- /dev/null\n+++ b/drivers/common/cnxk/roc_features.h\n@@ -0,0 +1,31 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2022 Marvell.\n+ */\n+#ifndef _ROC_FEATURES_H_\n+#define _ROC_FEATURES_H_\n+\n+static inline bool\n+roc_feature_nix_has_inl_ipsec_mseg(void)\n+{\n+\treturn (roc_model_is_cn10kb() || roc_model_is_cn10ka_b0());\n+}\n+\n+static inline bool\n+roc_feature_nix_has_inl_rq_mask(void)\n+{\n+\treturn (roc_model_is_cn10kb() || roc_model_is_cn10ka_b0());\n+}\n+\n+static inline bool\n+roc_feature_nix_has_late_bp(void)\n+{\n+\treturn (roc_model_is_cn10kb() || roc_model_is_cn10ka_b0());\n+}\n+\n+static inline bool\n+roc_feature_nix_has_reass(void)\n+{\n+\treturn roc_model_is_cn10ka();\n+}\n+\n+#endif\ndiff --git a/drivers/common/cnxk/roc_nix_debug.c b/drivers/common/cnxk/roc_nix_debug.c\nindex 97d86f9a97..399d0d7eae 100644\n--- a/drivers/common/cnxk/roc_nix_debug.c\n+++ b/drivers/common/cnxk/roc_nix_debug.c\n@@ -661,6 +661,12 @@ nix_lf_cq_dump(__io struct nix_cq_ctx_s *ctx, FILE *file)\n \t\t ctx->qint_idx);\n \tnix_dump(file, \"W1: bpid \\t\\t\\t%d\\nW1: bp_ena \\t\\t\\t%d\\n\", ctx->bpid,\n \t\t ctx->bp_ena);\n+\tnix_dump(file,\n+\t\t \"W1: lbpid_high \\t\\t\\t0x%03x\\nW1: lbpid_med \\t\\t\\t0x%03x\\n\"\n+\t\t \"W1: lbpid_low \\t\\t\\t0x%03x\\n(W1: lbpid) \\t\\t\\t0x%03x\\n\",\n+\t\t ctx->lbpid_high, ctx->lbpid_med, ctx->lbpid_low,\n+\t\t ctx->lbpid_high << 6 | ctx->lbpid_med << 3 | ctx->lbpid_low);\n+\tnix_dump(file, \"W1: lbp_ena \\t\\t\\t\\t%d\\n\", ctx->lbp_ena);\n \n \tnix_dump(file, \"W2: update_time \\t\\t%d\\nW2: avg_level \\t\\t\\t%d\",\n \t\t ctx->update_time, ctx->avg_level);\n@@ -671,14 +677,10 @@ nix_lf_cq_dump(__io struct nix_cq_ctx_s *ctx, FILE *file)\n \t\t ctx->cq_err_int_ena, ctx->cq_err_int);\n \tnix_dump(file, \"W3: qsize \\t\\t\\t%d\\nW3: caching \\t\\t\\t%d\", ctx->qsize,\n \t\t ctx->caching);\n-\tnix_dump(file, \"W3: substream \\t\\t\\t0x%03x\\nW3: ena \\t\\t\\t%d\\nW3: lbp_ena \\t\\t\\t%d\",\n-\t\t ctx->substream, ctx->ena, ctx->lbp_ena);\n-\tnix_dump(file,\n-\t\t \"W3: lbpid_high \\t\\t\\t0x%03x\\nW3: lbpid_med \\t\\t\\t0x%03x\\n\"\n-\t\t \"W3: lbpid_low \\t\\t\\t0x%03x\\n(W3: lbpid) \\t\\t\\t0x%03x\",\n-\t\t ctx->lbpid_high, ctx->lbpid_med, ctx->lbpid_low,\n-\t\t ctx->lbpid_high << 6 | ctx->lbpid_med << 3 | ctx->lbpid_low);\n \tnix_dump(file, \"W3: lbp_frac \\t\\t\\t%d\\n\", ctx->lbp_frac);\n+\tnix_dump(file, \"W3: substream \\t\\t\\t0x%03x\\nW3: cpt_drop_err_en \\t\\t\\t%d\\n\",\n+\t\t ctx->substream, ctx->cpt_drop_err_en);\n+\tnix_dump(file, \"W3: ena \\t\\t\\t%d\\n\", ctx->ena);\n \tnix_dump(file, \"W3: drop_ena \\t\\t\\t%d\\nW3: drop \\t\\t\\t%d\", ctx->drop_ena,\n \t\t ctx->drop);\n \tnix_dump(file, \"W3: bp \\t\\t\\t\\t%d\\n\", ctx->bp);\ndiff --git a/drivers/common/cnxk/roc_nix_fc.c b/drivers/common/cnxk/roc_nix_fc.c\nindex 39c16995cd..7574a88bf6 100644\n--- a/drivers/common/cnxk/roc_nix_fc.c\n+++ b/drivers/common/cnxk/roc_nix_fc.c\n@@ -77,7 +77,10 @@ nix_fc_rxchan_bpid_set(struct roc_nix *roc_nix, bool enable)\n \t\tif (req == NULL)\n \t\t\tgoto exit;\n \t\treq->chan_base = 0;\n-\t\treq->chan_cnt = 1;\n+\t\tif (roc_nix_is_lbk(roc_nix) || roc_nix_is_sdp(roc_nix))\n+\t\t\treq->chan_cnt = NIX_LBK_MAX_CHAN;\n+\t\telse\n+\t\t\treq->chan_cnt = NIX_CGX_MAX_CHAN;\n \t\treq->bpid_per_chan = 0;\n \n \t\trc = mbox_process_msg(mbox, (void *)&rsp);\n@@ -89,7 +92,10 @@ nix_fc_rxchan_bpid_set(struct roc_nix *roc_nix, bool enable)\n \t\tif (req == NULL)\n \t\t\tgoto exit;\n \t\treq->chan_base = 0;\n-\t\treq->chan_cnt = 1;\n+\t\tif (roc_nix_is_lbk(roc_nix) || roc_nix_is_sdp(roc_nix))\n+\t\t\treq->chan_cnt = NIX_LBK_MAX_CHAN;\n+\t\telse\n+\t\t\treq->chan_cnt = NIX_CGX_MAX_CHAN;\n \t\treq->bpid_per_chan = 0;\n \n \t\trc = mbox_process_msg(mbox, (void *)&rsp);\ndiff --git a/drivers/common/cnxk/roc_nix_inl.c b/drivers/common/cnxk/roc_nix_inl.c\nindex 70b4ae9277..19f500ee54 100644\n--- a/drivers/common/cnxk/roc_nix_inl.c\n+++ b/drivers/common/cnxk/roc_nix_inl.c\n@@ -485,13 +485,6 @@ nix_inl_rq_mask_cfg(struct roc_nix *roc_nix, bool enable)\n \treturn rc;\n }\n \n-bool\n-roc_nix_has_reass_support(struct roc_nix *nix)\n-{\n-\tPLT_SET_USED(nix);\n-\treturn !!roc_model_is_cn10ka();\n-}\n-\n int\n roc_nix_inl_inb_init(struct roc_nix *roc_nix)\n {\n@@ -574,7 +567,7 @@ roc_nix_inl_inb_fini(struct roc_nix *roc_nix)\n \t\t\tnix_inl_meta_aura_destroy();\n \t}\n \n-\tif (roc_model_is_cn10kb_a0()) {\n+\tif (roc_feature_nix_has_inl_rq_mask()) {\n \t\trc = nix_inl_rq_mask_cfg(roc_nix, false);\n \t\tif (rc) {\n \t\t\tplt_err(\"Failed to get rq mask rc=%d\", rc);\n@@ -1046,7 +1039,7 @@ roc_nix_inl_rq_ena_dis(struct roc_nix *roc_nix, bool enable)\n \tif (!idev)\n \t\treturn -EFAULT;\n \n-\tif (roc_model_is_cn10kb_a0()) {\n+\tif (roc_feature_nix_has_inl_rq_mask()) {\n \t\trc = nix_inl_rq_mask_cfg(roc_nix, true);\n \t\tif (rc) {\n \t\t\tplt_err(\"Failed to get rq mask rc=%d\", rc);\ndiff --git a/drivers/common/cnxk/roc_nix_inl.h b/drivers/common/cnxk/roc_nix_inl.h\nindex 3bb37ce225..105a9e4ec4 100644\n--- a/drivers/common/cnxk/roc_nix_inl.h\n+++ b/drivers/common/cnxk/roc_nix_inl.h\n@@ -182,7 +182,6 @@ int __roc_api roc_nix_inl_ts_pkind_set(struct roc_nix *roc_nix, bool ts_ena,\n \t\t\t\t bool inb_inl_dev);\n int __roc_api roc_nix_inl_rq_ena_dis(struct roc_nix *roc_nix, bool ena);\n int __roc_api roc_nix_inl_meta_aura_check(struct roc_nix_rq *rq);\n-bool __roc_api roc_nix_has_reass_support(struct roc_nix *nix);\n \n /* NIX Inline Outbound API */\n int __roc_api roc_nix_inl_outb_init(struct roc_nix *roc_nix);\ndiff --git a/drivers/common/cnxk/roc_nix_queue.c b/drivers/common/cnxk/roc_nix_queue.c\nindex 07ec1270d7..33b2cdf90f 100644\n--- a/drivers/common/cnxk/roc_nix_queue.c\n+++ b/drivers/common/cnxk/roc_nix_queue.c\n@@ -863,7 +863,7 @@ roc_nix_cq_init(struct roc_nix *roc_nix, struct roc_nix_cq *cq)\n \tcq_ctx->avg_level = 0xff;\n \tcq_ctx->cq_err_int_ena = BIT(NIX_CQERRINT_CQE_FAULT);\n \tcq_ctx->cq_err_int_ena |= BIT(NIX_CQERRINT_DOOR_ERR);\n-\tif (roc_model_is_cn10kb() && roc_nix_inl_inb_is_enabled(roc_nix)) {\n+\tif (roc_feature_nix_has_late_bp() && roc_nix_inl_inb_is_enabled(roc_nix)) {\n \t\tcq_ctx->cq_err_int_ena |= BIT(NIX_CQERRINT_CPT_DROP);\n \t\tcq_ctx->cpt_drop_err_en = 1;\n \t\t/* Enable Late BP only when non zero CPT BPID */\n@@ -900,6 +900,7 @@ roc_nix_cq_init(struct roc_nix *roc_nix, struct roc_nix_cq *cq)\n \t\t\tcq_ctx->drop_ena = 1;\n \t\t}\n \t}\n+\tcq_ctx->bp = cq->drop_thresh;\n \n \trc = mbox_process(mbox);\n \tmbox_put(mbox);\n@@ -960,7 +961,7 @@ roc_nix_cq_fini(struct roc_nix_cq *cq)\n \t\taq->cq.bp_ena = 0;\n \t\taq->cq_mask.ena = ~aq->cq_mask.ena;\n \t\taq->cq_mask.bp_ena = ~aq->cq_mask.bp_ena;\n-\t\tif (roc_model_is_cn10kb() && roc_nix_inl_inb_is_enabled(cq->roc_nix)) {\n+\t\tif (roc_feature_nix_has_late_bp() && roc_nix_inl_inb_is_enabled(cq->roc_nix)) {\n \t\t\taq->cq.lbp_ena = 0;\n \t\t\taq->cq_mask.lbp_ena = ~aq->cq_mask.lbp_ena;\n \t\t}\ndiff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map\nindex 6c69c425df..53f2129e71 100644\n--- a/drivers/common/cnxk/version.map\n+++ b/drivers/common/cnxk/version.map\n@@ -138,7 +138,6 @@ INTERNAL {\n \troc_nix_get_pf_func;\n \troc_nix_get_vf;\n \troc_nix_get_vwqe_interval;\n-\troc_nix_has_reass_support;\n \troc_nix_inl_cb_register;\n \troc_nix_inl_cb_unregister;\n \troc_nix_inl_ctx_write;\ndiff --git a/drivers/net/cnxk/cn10k_ethdev.c b/drivers/net/cnxk/cn10k_ethdev.c\nindex b84fed6d90..cb88bd2dc1 100644\n--- a/drivers/net/cnxk/cn10k_ethdev.c\n+++ b/drivers/net/cnxk/cn10k_ethdev.c\n@@ -591,7 +591,7 @@ cn10k_nix_reassembly_capability_get(struct rte_eth_dev *eth_dev,\n \tint rc = -ENOTSUP;\n \tRTE_SET_USED(eth_dev);\n \n-\tif (!roc_nix_has_reass_support(&dev->nix))\n+\tif (!roc_feature_nix_has_reass())\n \t\treturn -ENOTSUP;\n \n \tif (dev->rx_offloads & RTE_ETH_RX_OFFLOAD_SECURITY) {\n@@ -621,7 +621,7 @@ cn10k_nix_reassembly_conf_set(struct rte_eth_dev *eth_dev,\n \tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n \tint rc = 0;\n \n-\tif (!roc_nix_has_reass_support(&dev->nix))\n+\tif (!roc_feature_nix_has_reass())\n \t\treturn -ENOTSUP;\n \n \tif (!conf->flags) {\ndiff --git a/drivers/net/cnxk/cn10k_ethdev_sec.c b/drivers/net/cnxk/cn10k_ethdev_sec.c\nindex ed5c335787..3c32de0f94 100644\n--- a/drivers/net/cnxk/cn10k_ethdev_sec.c\n+++ b/drivers/net/cnxk/cn10k_ethdev_sec.c\n@@ -809,7 +809,7 @@ cn10k_eth_sec_session_create(void *device,\n \t\tsess_priv.chksum = (!ipsec->options.ip_csum_enable << 1 |\n \t\t\t\t !ipsec->options.l4_csum_enable);\n \t\tsess_priv.dec_ttl = ipsec->options.dec_ttl;\n-\t\tif (roc_model_is_cn10kb_a0())\n+\t\tif (roc_feature_nix_has_inl_ipsec_mseg())\n \t\t\tsess_priv.nixtx_off = 1;\n \n \t\t/* Pointer from eth_sec -> outb_sa */\n", "prefixes": [ "07/15" ] }