Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/128196/?format=api
{ "id": 128196, "url": "http://patchwork.dpdk.org/api/patches/128196/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230606100258.26532-4-nipun.gupta@amd.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230606100258.26532-4-nipun.gupta@amd.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230606100258.26532-4-nipun.gupta@amd.com", "date": "2023-06-06T10:02:57", "name": "[v7,3/4] bus/cdx: add support for MSI", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "e3237f1cc127b29495e73c61137521c8fbf9e1bc", "submitter": { "id": 2928, "url": "http://patchwork.dpdk.org/api/people/2928/?format=api", "name": "Gupta, Nipun", "email": "nipun.gupta@amd.com" }, "delegate": { "id": 1, "url": "http://patchwork.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230606100258.26532-4-nipun.gupta@amd.com/mbox/", "series": [ { "id": 28367, "url": "http://patchwork.dpdk.org/api/series/28367/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=28367", "date": "2023-06-06T10:02:54", "name": "Support AMD CDX bus", "version": 7, "mbox": "http://patchwork.dpdk.org/series/28367/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/128196/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/128196/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 194CF42C3E;\n\tTue, 6 Jun 2023 12:03:36 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id DC6AD42BFE;\n\tTue, 6 Jun 2023 12:03:27 +0200 (CEST)", "from NAM11-CO1-obe.outbound.protection.outlook.com\n (mail-co1nam11on2060.outbound.protection.outlook.com [40.107.220.60])\n by mails.dpdk.org (Postfix) with ESMTP id ADCB9427E9\n for <dev@dpdk.org>; Tue, 6 Jun 2023 12:03:25 +0200 (CEST)", "from MW4PR02CA0027.namprd02.prod.outlook.com (2603:10b6:303:16d::32)\n by CYYPR12MB8704.namprd12.prod.outlook.com (2603:10b6:930:c2::19)\n with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6455.32; Tue, 6 Jun\n 2023 10:03:22 +0000", "from CO1NAM11FT006.eop-nam11.prod.protection.outlook.com\n (2603:10b6:303:16d:cafe::32) by MW4PR02CA0027.outlook.office365.com\n (2603:10b6:303:16d::32) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6455.33 via Frontend\n Transport; Tue, 6 Jun 2023 10:03:22 +0000", "from SATLEXMB04.amd.com (165.204.84.17) by\n CO1NAM11FT006.mail.protection.outlook.com (10.13.174.246) with Microsoft SMTP\n Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id\n 15.20.6455.33 via Frontend Transport; Tue, 6 Jun 2023 10:03:22 +0000", "from SATLEXMB04.amd.com (10.181.40.145) by SATLEXMB04.amd.com\n (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Tue, 6 Jun\n 2023 05:03:21 -0500", "from xhdipdslab41.xilinx.com (10.180.168.240) by SATLEXMB04.amd.com\n (10.181.40.145) with Microsoft SMTP Server id 15.1.2375.34 via\n Frontend Transport; Tue, 6 Jun 2023 05:03:18 -0500" ], "ARC-Seal": "i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none;\n b=fIlJBE1XEQB4mXwWmD+yIRCcWMqveA4Lg3K2idYHy+LhUJ+CZb9LbVhxtrYo4cCQCO/0ZovvMrboQpaQzhI9UklO42Q8pISVDMBDNlYKSKZ+QLOYJ/hAaxN6PUEuEJb0bd4S+wMjL7GCiUXVvEzVCxA7Ynp0BVRLS5pIfQ1um+B3MxtbOLjI8HnW8yFBCFs6R+Nw7mebYeAmJtpXV++rzDoGpg8bKYU8YN2TFGl/i5rWYQKbxGHaW1/fM9/hlQgaSn9HCKoE+nTk1XYEFzzbhr1UWvu/EGfJCFj//d/Pm9OPpIC41UxFWBLyGCuZXXiX+R4L7Bzr+PYJwV62XRAe2g==", "ARC-Message-Signature": "i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n s=arcselector9901;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1;\n bh=7QXUN1l0q9ZhT/QUlmh6+8e1qeqdUD5GxmQ2luiMPUA=;\n b=iSWwWzjrzI9MU+dPXXX/E/lmZoLHYU7C3tbDglOXoDGhczTMk9PuCeR2v6zghDwsIgMfodRnL6eUXOu1eim4+Px6NtNxVnBM2dcVieEulT4Vs99sBOq4tIfxB6klAweJM+bD6fQjK0LkPH43ZlJNk7h7I1/mz97/94oHuqN63UUOy9oOlJhdPe88WqLb3qTZf6tZph53amPzfm3x9vX1WHjmYjXknpdM3SJSCwR6mCvvTq+r+8y7YTqFPooN1jDFBA3yOpuBQ8VFVAkbP9ivcDac7ARWOHpI5fxzdE+L99MZD85TsAW6E1Pnk5/+QCn7scqb++SJ2s1jz34nEgmxXA==", "ARC-Authentication-Results": "i=1; mx.microsoft.com 1; spf=pass (sender ip is\n 165.204.84.17) smtp.rcpttodomain=dpdk.org smtp.mailfrom=amd.com; dmarc=pass\n (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com;\n dkim=none (message not signed); arc=none", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=7QXUN1l0q9ZhT/QUlmh6+8e1qeqdUD5GxmQ2luiMPUA=;\n b=QrRUBYqOFtETaW7cyHOK3pcVC92O4i+Hlho4WTOVvn7XTBaWO0jsNZ0tLRVHrJJ7b00VlDrSMdy5bOdq1m9nNg8xMoK4C+nfaRRwUnE+xRvzNZivXNtrWPyy6B3VZx9DxlFrnxYM9g0uwCMNEUVv/EVNgl1f/mAeLe97tIpI5vA=", "X-MS-Exchange-Authentication-Results": "spf=pass (sender IP is 165.204.84.17)\n smtp.mailfrom=amd.com; dkim=none (message not signed)\n header.d=none;dmarc=pass action=none header.from=amd.com;", "Received-SPF": "Pass (protection.outlook.com: domain of amd.com designates\n 165.204.84.17 as permitted sender) receiver=protection.outlook.com;\n client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C", "From": "Nipun Gupta <nipun.gupta@amd.com>", "To": "<dev@dpdk.org>, <thomas@monjalon.net>, <david.marchand@redhat.com>,\n <hkalra@marvell.com>, <anatoly.burakov@intel.com>,\n <stephen@networkplumber.org>", "CC": "<ferruh.yigit@amd.com>, <harpreet.anand@amd.com>,\n <nikhil.agarwal@amd.com>, Nipun Gupta <nipun.gupta@amd.com>", "Subject": "[PATCH v7 3/4] bus/cdx: add support for MSI", "Date": "Tue, 6 Jun 2023 15:32:57 +0530", "Message-ID": "<20230606100258.26532-4-nipun.gupta@amd.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20230606100258.26532-1-nipun.gupta@amd.com>", "References": "<20230124140746.594066-1-nipun.gupta@amd.com>\n <20230606100258.26532-1-nipun.gupta@amd.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "CO1NAM11FT006:EE_|CYYPR12MB8704:EE_", "X-MS-Office365-Filtering-Correlation-Id": "411373eb-5a01-4df4-45dd-08db667542fd", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n 6Ek4esw0IoGI1fjhx9dncC7TjdOL3eyvbS6hjosFZIxlgZIUlQI2OScEIxadToc1yp5gc7tbdnFELPdN06G2G8B6sEGQ52wWa1ON0H6jkZMLZTRneB4dhOn6FRh/N1sU/HE+hsH+2ZidY+BOkNk1Pf465OYnjYC1FQ82vGCV7MPGNgmdh+J6ogs5zvQsZsM6l2VUeo/1l+FbExC0IdxqucbTvuEiYrXG3fzMiAMwLw5qWfwUyY2vkYVd1bcGPdeF2vEcfUT0PBeAElvawC7sBYIZ2WekIt+eBGjTIkyLcEPTHP9u+XGsbsCLggDdvzI9QcybMjB1nczw6IINqvhNd669ocNPhHyLGyZBdGC4irLto8LVao4/17Jy4IWhDdpCNrf3ZsVlG9tfGq1MTXQYDyIhwGQLyd5knYICAoHCUheMUpHtkORPI7Ph8ij9vRI/K2p//E6GS868Z+Z81Cge5q6YZ/vC+XbAwMoLaE2OglUfbC6kT06EWxYgul7oZRlpa8fvGhvFSCpxY2vW7pejPNVphkAgX/m26oRFWZFigwqcIegPxM4iQr4v5bm7tZYwudm2qD9MinIBU6T48wGeer5k3BTA0/bnBEOM5kyVPR4PIXQ4nCWgPFsDF27K/+0BUoSY6KV3fKTjHqpZ41tGTi3VS5v2L+De5UIsM56uLdgQGmHWHHozIvxzSxWVspKmWwj5GgT0vCQREGanw/wyBZ4xk5axR+98g8WB1dGmdb1VmgWkYzlIqLitz2IXUsVe4Bsd0hi1sX08oKRUBl2w3A==", "X-Forefront-Antispam-Report": "CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:;\n IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE;\n SFS:(13230028)(4636009)(136003)(39860400002)(396003)(376002)(346002)(451199021)(36840700001)(40470700004)(46966006)(40460700003)(82310400005)(6666004)(26005)(1076003)(40480700001)(83380400001)(47076005)(426003)(336012)(36860700001)(36756003)(186003)(2616005)(86362001)(81166007)(82740400003)(356005)(44832011)(110136005)(54906003)(5660300002)(316002)(41300700001)(8936002)(70586007)(4326008)(478600001)(70206006)(8676002)(2906002)(36900700001);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "amd.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "06 Jun 2023 10:03:22.2596 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 411373eb-5a01-4df4-45dd-08db667542fd", "X-MS-Exchange-CrossTenant-Id": "3dd8961f-e488-4e60-8e11-a82d994e183d", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17];\n Helo=[SATLEXMB04.amd.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n CO1NAM11FT006.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "CYYPR12MB8704", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "MSI's are exposed to the devices using VFIO (vfio-cdx). This\npatch uses the same to add support for MSI for the devices on\nthe cdx bus.\n\nSigned-off-by: Nipun Gupta <nipun.gupta@amd.com>\nAcked-by: Ferruh Yigit <ferruh.yigit@amd.com>\n---\n drivers/bus/cdx/bus_cdx_driver.h | 25 +++++\n drivers/bus/cdx/cdx.c | 11 ++\n drivers/bus/cdx/cdx_vfio.c | 176 ++++++++++++++++++++++++++++++-\n drivers/bus/cdx/version.map | 2 +\n 4 files changed, 212 insertions(+), 2 deletions(-)", "diff": "diff --git a/drivers/bus/cdx/bus_cdx_driver.h b/drivers/bus/cdx/bus_cdx_driver.h\nindex 3515fcddf2..cb99c13636 100644\n--- a/drivers/bus/cdx/bus_cdx_driver.h\n+++ b/drivers/bus/cdx/bus_cdx_driver.h\n@@ -56,6 +56,7 @@ struct rte_cdx_device {\n \tstruct rte_cdx_id id;\t\t\t/**< CDX ID. */\n \tstruct rte_mem_resource mem_resource[CDX_MAX_RESOURCE];\n \t\t\t\t\t\t/**< CDX Memory Resource */\n+\tstruct rte_intr_handle *intr_handle;\t/**< Interrupt handle */\n };\n \n /**\n@@ -149,6 +150,30 @@ void rte_cdx_register(struct rte_cdx_driver *driver);\n \t} \\\n \tRTE_PMD_EXPORT_NAME(nm, __COUNTER__)\n \n+/**\n+ * Enables VFIO Interrupts for CDX bus devices.\n+ *\n+ * @param intr_handle\n+ * Pointer to the interrupt handle.\n+ *\n+ * @return\n+ * 0 on success, -1 on error.\n+ */\n+__rte_internal\n+int rte_cdx_vfio_intr_enable(const struct rte_intr_handle *intr_handle);\n+\n+/**\n+ * Disable VFIO Interrupts for CDX bus devices.\n+ *\n+ * @param intr_handle\n+ * Pointer to the interrupt handle.\n+ *\n+ * @return\n+ * 0 on success, -1 on error.\n+ */\n+__rte_internal\n+int rte_cdx_vfio_intr_disable(const struct rte_intr_handle *intr_handle);\n+\n /**\n * Unregister a CDX driver.\n *\ndiff --git a/drivers/bus/cdx/cdx.c b/drivers/bus/cdx/cdx.c\nindex 9ad8f73424..e5e6a665c3 100644\n--- a/drivers/bus/cdx/cdx.c\n+++ b/drivers/bus/cdx/cdx.c\n@@ -202,6 +202,15 @@ cdx_scan_one(const char *dirname, const char *dev_name)\n \t\tgoto err;\n \t}\n \n+\t/* Allocate interrupt instance for cdx device */\n+\tdev->intr_handle =\n+\t\trte_intr_instance_alloc(RTE_INTR_INSTANCE_F_PRIVATE);\n+\tif (dev->intr_handle == NULL) {\n+\t\tCDX_BUS_ERR(\"Failed to create interrupt instance for %s\",\n+\t\t\tdev->device.name);\n+\t\treturn -ENOMEM;\n+\t}\n+\n \t/*\n \t * Check if device is bound to 'vfio-cdx' driver, so that user-space\n \t * can gracefully access the device.\n@@ -380,6 +389,8 @@ cdx_probe_one_driver(struct rte_cdx_driver *dr,\n \treturn ret;\n \n error_probe:\n+\trte_intr_instance_free(dev->intr_handle);\n+\tdev->intr_handle = NULL;\n \tcdx_vfio_unmap_resource(dev);\n error_map_device:\n \treturn ret;\ndiff --git a/drivers/bus/cdx/cdx_vfio.c b/drivers/bus/cdx/cdx_vfio.c\nindex d320867ea8..e8ccf7fb94 100644\n--- a/drivers/bus/cdx/cdx_vfio.c\n+++ b/drivers/bus/cdx/cdx_vfio.c\n@@ -51,6 +51,10 @@ struct mapped_cdx_resource {\n /** mapped cdx device list */\n TAILQ_HEAD(mapped_cdx_res_list, mapped_cdx_resource);\n \n+/* IRQ set buffer length for MSI interrupts */\n+#define MSI_IRQ_SET_BUF_LEN (sizeof(struct vfio_irq_set) + \\\n+\t\t\t sizeof(int) * (RTE_MAX_RXTX_INTR_VEC_ID + 1))\n+\n static struct rte_tailq_elem cdx_vfio_tailq = {\n \t.name = \"VFIO_CDX_RESOURCE_LIST\",\n };\n@@ -95,6 +99,27 @@ cdx_vfio_unmap_resource_primary(struct rte_cdx_device *dev)\n \tchar cdx_addr[PATH_MAX] = {0};\n \tstruct mapped_cdx_resource *vfio_res = NULL;\n \tstruct mapped_cdx_res_list *vfio_res_list;\n+\tint ret, vfio_dev_fd;\n+\n+\tif (rte_intr_fd_get(dev->intr_handle) < 0)\n+\t\treturn -1;\n+\n+\tif (close(rte_intr_fd_get(dev->intr_handle)) < 0) {\n+\t\tCDX_BUS_ERR(\"Error when closing eventfd file descriptor for %s\",\n+\t\t\tdev->device.name);\n+\t\treturn -1;\n+\t}\n+\n+\tvfio_dev_fd = rte_intr_dev_fd_get(dev->intr_handle);\n+\tif (vfio_dev_fd < 0)\n+\t\treturn -1;\n+\n+\tret = rte_vfio_release_device(CDX_BUS_DEVICES_PATH, dev->device.name,\n+\t\t\t\t vfio_dev_fd);\n+\tif (ret < 0) {\n+\t\tCDX_BUS_ERR(\"Cannot release VFIO device\");\n+\t\treturn ret;\n+\t}\n \n \tvfio_res_list =\n \t\tRTE_TAILQ_CAST(cdx_vfio_tailq.head, mapped_cdx_res_list);\n@@ -117,6 +142,18 @@ cdx_vfio_unmap_resource_secondary(struct rte_cdx_device *dev)\n {\n \tstruct mapped_cdx_resource *vfio_res = NULL;\n \tstruct mapped_cdx_res_list *vfio_res_list;\n+\tint ret, vfio_dev_fd;\n+\n+\tvfio_dev_fd = rte_intr_dev_fd_get(dev->intr_handle);\n+\tif (vfio_dev_fd < 0)\n+\t\treturn -1;\n+\n+\tret = rte_vfio_release_device(CDX_BUS_DEVICES_PATH, dev->device.name,\n+\t\t\t\t vfio_dev_fd);\n+\tif (ret < 0) {\n+\t\tCDX_BUS_ERR(\"Cannot release VFIO device\");\n+\t\treturn ret;\n+\t}\n \n \tvfio_res_list =\n \t\tRTE_TAILQ_CAST(cdx_vfio_tailq.head, mapped_cdx_res_list);\n@@ -141,9 +178,74 @@ cdx_vfio_unmap_resource(struct rte_cdx_device *dev)\n \t\treturn cdx_vfio_unmap_resource_secondary(dev);\n }\n \n+/* set up interrupt support (but not enable interrupts) */\n static int\n-cdx_vfio_setup_device(int vfio_dev_fd)\n+cdx_vfio_setup_interrupts(struct rte_cdx_device *dev, int vfio_dev_fd,\n+\t\tint num_irqs)\n {\n+\tint i, ret;\n+\n+\tif (num_irqs == 0)\n+\t\treturn 0;\n+\n+\t/* start from MSI interrupt type */\n+\tfor (i = 0; i < num_irqs; i++) {\n+\t\tstruct vfio_irq_info irq = { .argsz = sizeof(irq) };\n+\t\tint fd = -1;\n+\n+\t\tirq.index = i;\n+\n+\t\tret = ioctl(vfio_dev_fd, VFIO_DEVICE_GET_IRQ_INFO, &irq);\n+\t\tif (ret < 0) {\n+\t\t\tCDX_BUS_ERR(\"Cannot get VFIO IRQ info, error %i (%s)\",\n+\t\t\t\terrno, strerror(errno));\n+\t\t\treturn -1;\n+\t\t}\n+\n+\t\t/* if this vector cannot be used with eventfd, fail if we explicitly\n+\t\t * specified interrupt type, otherwise continue\n+\t\t */\n+\t\tif ((irq.flags & VFIO_IRQ_INFO_EVENTFD) == 0)\n+\t\t\tcontinue;\n+\n+\t\t/* Set nb_intr to the total number of interrupts */\n+\t\tif (rte_intr_event_list_update(dev->intr_handle, irq.count))\n+\t\t\treturn -1;\n+\n+\t\t/* set up an eventfd for interrupts */\n+\t\tfd = eventfd(0, EFD_NONBLOCK | EFD_CLOEXEC);\n+\t\tif (fd < 0) {\n+\t\t\tCDX_BUS_ERR(\"Cannot set up eventfd, error %i (%s)\",\n+\t\t\t\terrno, strerror(errno));\n+\t\t\treturn -1;\n+\t\t}\n+\n+\t\tif (rte_intr_fd_set(dev->intr_handle, fd))\n+\t\t\treturn -1;\n+\n+\t\t/* DPDK CDX bus currently supports only MSI-X */\n+\t\tif (rte_intr_type_set(dev->intr_handle, RTE_INTR_HANDLE_VFIO_MSIX))\n+\t\t\treturn -1;\n+\n+\t\tif (rte_intr_dev_fd_set(dev->intr_handle, vfio_dev_fd))\n+\t\t\treturn -1;\n+\n+\t\treturn 0;\n+\t}\n+\n+\t/* if we're here, we haven't found a suitable interrupt vector */\n+\treturn -1;\n+}\n+\n+static int\n+cdx_vfio_setup_device(struct rte_cdx_device *dev, int vfio_dev_fd,\n+\t\tint num_irqs)\n+{\n+\tif (cdx_vfio_setup_interrupts(dev, vfio_dev_fd, num_irqs) != 0) {\n+\t\tCDX_BUS_ERR(\"Error setting up interrupts!\");\n+\t\treturn -1;\n+\t}\n+\n \t/*\n \t * Reset the device. If the device is not capable of resetting,\n \t * then it updates errno as EINVAL.\n@@ -279,6 +381,9 @@ cdx_vfio_map_resource_primary(struct rte_cdx_device *dev)\n \tstruct cdx_map *maps;\n \tint vfio_dev_fd, i, ret;\n \n+\tif (rte_intr_fd_set(dev->intr_handle, -1))\n+\t\treturn -1;\n+\n \tret = rte_vfio_setup_device(CDX_BUS_DEVICES_PATH, dev_name,\n \t\t\t\t &vfio_dev_fd, &device_info);\n \tif (ret)\n@@ -344,7 +449,7 @@ cdx_vfio_map_resource_primary(struct rte_cdx_device *dev)\n \t\tfree(reg);\n \t}\n \n-\tif (cdx_vfio_setup_device(vfio_dev_fd) < 0) {\n+\tif (cdx_vfio_setup_device(dev, vfio_dev_fd, device_info.num_irqs) < 0) {\n \t\tCDX_BUS_ERR(\"%s setup device failed\", dev_name);\n \t\tgoto err_vfio_res;\n \t}\n@@ -373,6 +478,9 @@ cdx_vfio_map_resource_secondary(struct rte_cdx_device *dev)\n \tconst char *dev_name = dev->device.name;\n \tstruct cdx_map *maps;\n \n+\tif (rte_intr_fd_set(dev->intr_handle, -1))\n+\t\treturn -1;\n+\n \t/* if we're in a secondary process, just find our tailq entry */\n \tTAILQ_FOREACH(vfio_res, vfio_res_list, next) {\n \t\tif (strcmp(vfio_res->name, dev_name))\n@@ -406,6 +514,10 @@ cdx_vfio_map_resource_secondary(struct rte_cdx_device *dev)\n \t\tdev->mem_resource[i].len = maps[i].size;\n \t}\n \n+\t/* we need save vfio_dev_fd, so it can be used during release */\n+\tif (rte_intr_dev_fd_set(dev->intr_handle, vfio_dev_fd))\n+\t\tgoto err_vfio_dev_fd;\n+\n \treturn 0;\n err_vfio_dev_fd:\n \trte_vfio_release_device(CDX_BUS_DEVICES_PATH, cdx_addr, vfio_dev_fd);\n@@ -424,3 +536,63 @@ cdx_vfio_map_resource(struct rte_cdx_device *dev)\n \telse\n \t\treturn cdx_vfio_map_resource_secondary(dev);\n }\n+\n+int\n+rte_cdx_vfio_intr_enable(const struct rte_intr_handle *intr_handle)\n+{\n+\tchar irq_set_buf[MSI_IRQ_SET_BUF_LEN];\n+\tstruct vfio_irq_set *irq_set;\n+\tint *fd_ptr, vfio_dev_fd, i;\n+\tint ret;\n+\n+\tirq_set = (struct vfio_irq_set *) irq_set_buf;\n+\tirq_set->count = rte_intr_nb_intr_get(intr_handle);\n+\tirq_set->argsz = sizeof(struct vfio_irq_set) +\n+\t\t\t (sizeof(int) * irq_set->count);\n+\n+\tirq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_TRIGGER;\n+\tirq_set->index = 0;\n+\tirq_set->start = 0;\n+\tfd_ptr = (int *) &irq_set->data;\n+\n+\tfor (i = 0; i < rte_intr_nb_efd_get(intr_handle); i++)\n+\t\tfd_ptr[i] = rte_intr_efds_index_get(intr_handle, i);\n+\n+\tvfio_dev_fd = rte_intr_dev_fd_get(intr_handle);\n+\tret = ioctl(vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);\n+\n+\tif (ret) {\n+\t\tCDX_BUS_ERR(\"Error enabling MSI interrupts for fd %d\",\n+\t\t\trte_intr_fd_get(intr_handle));\n+\t\treturn -1;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+/* disable MSI interrupts */\n+int\n+rte_cdx_vfio_intr_disable(const struct rte_intr_handle *intr_handle)\n+{\n+\tstruct vfio_irq_set *irq_set;\n+\tchar irq_set_buf[MSI_IRQ_SET_BUF_LEN];\n+\tint len, ret, vfio_dev_fd;\n+\n+\tlen = sizeof(struct vfio_irq_set);\n+\n+\tirq_set = (struct vfio_irq_set *) irq_set_buf;\n+\tirq_set->argsz = len;\n+\tirq_set->count = 0;\n+\tirq_set->flags = VFIO_IRQ_SET_DATA_NONE | VFIO_IRQ_SET_ACTION_TRIGGER;\n+\tirq_set->index = 0;\n+\tirq_set->start = 0;\n+\n+\tvfio_dev_fd = rte_intr_dev_fd_get(intr_handle);\n+\tret = ioctl(vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);\n+\n+\tif (ret)\n+\t\tCDX_BUS_ERR(\"Error disabling MSI interrupts for fd %d\",\n+\t\t\trte_intr_fd_get(intr_handle));\n+\n+\treturn ret;\n+}\ndiff --git a/drivers/bus/cdx/version.map b/drivers/bus/cdx/version.map\nindex 360460da18..0a15d39ae8 100644\n--- a/drivers/bus/cdx/version.map\n+++ b/drivers/bus/cdx/version.map\n@@ -5,6 +5,8 @@ INTERNAL {\n \trte_cdx_register;\n \trte_cdx_unmap_device;\n \trte_cdx_unregister;\n+\trte_cdx_vfio_intr_disable;\n+\trte_cdx_vfio_intr_enable;\n \n \tlocal: *;\n };\n", "prefixes": [ "v7", "3/4" ] }