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{
    "id": 130439,
    "url": "http://patchwork.dpdk.org/api/patches/130439/?format=api",
    "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/1692221931-32334-4-git-send-email-roretzla@linux.microsoft.com/",
    "project": {
        "id": 1,
        "url": "http://patchwork.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1692221931-32334-4-git-send-email-roretzla@linux.microsoft.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1692221931-32334-4-git-send-email-roretzla@linux.microsoft.com",
    "date": "2023-08-16T21:38:48",
    "name": "[v4,3/6] eal: add rte atomic qualifier with casts",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "f489bd8d614cf81d76e0da6e4a62e1122d38243a",
    "submitter": {
        "id": 2077,
        "url": "http://patchwork.dpdk.org/api/people/2077/?format=api",
        "name": "Tyler Retzlaff",
        "email": "roretzla@linux.microsoft.com"
    },
    "delegate": {
        "id": 1,
        "url": "http://patchwork.dpdk.org/api/users/1/?format=api",
        "username": "tmonjalo",
        "first_name": "Thomas",
        "last_name": "Monjalon",
        "email": "thomas@monjalon.net"
    },
    "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/1692221931-32334-4-git-send-email-roretzla@linux.microsoft.com/mbox/",
    "series": [
        {
            "id": 29255,
            "url": "http://patchwork.dpdk.org/api/series/29255/?format=api",
            "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=29255",
            "date": "2023-08-16T21:38:46",
            "name": "RFC optional rte optional stdatomics API",
            "version": 4,
            "mbox": "http://patchwork.dpdk.org/series/29255/mbox/"
        }
    ],
    "comments": "http://patchwork.dpdk.org/api/patches/130439/comments/",
    "check": "success",
    "checks": "http://patchwork.dpdk.org/api/patches/130439/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
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        ],
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        "From": "Tyler Retzlaff <roretzla@linux.microsoft.com>",
        "To": "dev@dpdk.org",
        "Cc": "techboard@dpdk.org, Bruce Richardson <bruce.richardson@intel.com>,\n Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>,\n Ruifeng Wang <ruifeng.wang@arm.com>, Jerin Jacob <jerinj@marvell.com>,\n Sunil Kumar Kori <skori@marvell.com>,\n =?utf-8?q?Mattias_R=C3=B6nnblom?= <mattias.ronnblom@ericsson.com>,\n Joyce Kong <joyce.kong@arm.com>, David Christensen <drc@linux.vnet.ibm.com>,\n Konstantin Ananyev <konstantin.v.ananyev@yandex.ru>,\n David Hunt <david.hunt@intel.com>, Thomas Monjalon <thomas@monjalon.net>,\n David Marchand <david.marchand@redhat.com>,\n Tyler Retzlaff <roretzla@linux.microsoft.com>",
        "Subject": "[PATCH v4 3/6] eal: add rte atomic qualifier with casts",
        "Date": "Wed, 16 Aug 2023 14:38:48 -0700",
        "Message-Id": "<1692221931-32334-4-git-send-email-roretzla@linux.microsoft.com>",
        "X-Mailer": "git-send-email 1.8.3.1",
        "In-Reply-To": "<1692221931-32334-1-git-send-email-roretzla@linux.microsoft.com>",
        "References": "<1691717521-1025-1-git-send-email-roretzla@linux.microsoft.com>\n <1692221931-32334-1-git-send-email-roretzla@linux.microsoft.com>",
        "MIME-Version": "1.0",
        "Content-Type": "text/plain; charset=UTF-8",
        "Content-Transfer-Encoding": "8bit",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
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        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
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        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "Introduce __rte_atomic qualifying casts in rte_optional atomics inline\nfunctions to prevent cascading the need to pass __rte_atomic qualified\narguments.\n\nWarning, this is really implementation dependent and being done\ntemporarily to avoid having to convert more of the libraries and tests in\nDPDK in the initial series that introduces the API. The consequence of the\nassumption of the ABI of the types in question not being ``the same'' is\nonly a risk that may be realized when enable_stdatomic=true.\n\nSigned-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>\nReviewed-by: Morten Brørup <mb@smartsharesystems.com>\n---\n lib/eal/include/generic/rte_atomic.h | 48 ++++++++++++++++++++++++------------\n lib/eal/include/generic/rte_pause.h  |  9 ++++---\n lib/eal/x86/rte_power_intrinsics.c   |  7 +++---\n 3 files changed, 42 insertions(+), 22 deletions(-)",
    "diff": "diff --git a/lib/eal/include/generic/rte_atomic.h b/lib/eal/include/generic/rte_atomic.h\nindex 5940e7e..709bf15 100644\n--- a/lib/eal/include/generic/rte_atomic.h\n+++ b/lib/eal/include/generic/rte_atomic.h\n@@ -274,7 +274,8 @@\n static inline void\n rte_atomic16_add(rte_atomic16_t *v, int16_t inc)\n {\n-\trte_atomic_fetch_add_explicit(&v->cnt, inc, rte_memory_order_seq_cst);\n+\trte_atomic_fetch_add_explicit((volatile __rte_atomic int16_t *)&v->cnt, inc,\n+\t    rte_memory_order_seq_cst);\n }\n \n /**\n@@ -288,7 +289,8 @@\n static inline void\n rte_atomic16_sub(rte_atomic16_t *v, int16_t dec)\n {\n-\trte_atomic_fetch_sub_explicit(&v->cnt, dec, rte_memory_order_seq_cst);\n+\trte_atomic_fetch_sub_explicit((volatile __rte_atomic int16_t *)&v->cnt, dec,\n+\t    rte_memory_order_seq_cst);\n }\n \n /**\n@@ -341,7 +343,8 @@\n static inline int16_t\n rte_atomic16_add_return(rte_atomic16_t *v, int16_t inc)\n {\n-\treturn rte_atomic_fetch_add_explicit(&v->cnt, inc, rte_memory_order_seq_cst) + inc;\n+\treturn rte_atomic_fetch_add_explicit((volatile __rte_atomic int16_t *)&v->cnt, inc,\n+\t    rte_memory_order_seq_cst) + inc;\n }\n \n /**\n@@ -361,7 +364,8 @@\n static inline int16_t\n rte_atomic16_sub_return(rte_atomic16_t *v, int16_t dec)\n {\n-\treturn rte_atomic_fetch_sub_explicit(&v->cnt, dec, rte_memory_order_seq_cst) - dec;\n+\treturn rte_atomic_fetch_sub_explicit((volatile __rte_atomic int16_t *)&v->cnt, dec,\n+\t    rte_memory_order_seq_cst) - dec;\n }\n \n /**\n@@ -380,7 +384,8 @@\n #ifdef RTE_FORCE_INTRINSICS\n static inline int rte_atomic16_inc_and_test(rte_atomic16_t *v)\n {\n-\treturn rte_atomic_fetch_add_explicit(&v->cnt, 1, rte_memory_order_seq_cst) + 1 == 0;\n+\treturn rte_atomic_fetch_add_explicit((volatile __rte_atomic int16_t *)&v->cnt, 1,\n+\t    rte_memory_order_seq_cst) + 1 == 0;\n }\n #endif\n \n@@ -400,7 +405,8 @@ static inline int rte_atomic16_inc_and_test(rte_atomic16_t *v)\n #ifdef RTE_FORCE_INTRINSICS\n static inline int rte_atomic16_dec_and_test(rte_atomic16_t *v)\n {\n-\treturn rte_atomic_fetch_sub_explicit(&v->cnt, 1, rte_memory_order_seq_cst) - 1 == 0;\n+\treturn rte_atomic_fetch_sub_explicit((volatile __rte_atomic int16_t *)&v->cnt, 1,\n+\t    rte_memory_order_seq_cst) - 1 == 0;\n }\n #endif\n \n@@ -553,7 +559,8 @@ static inline void rte_atomic16_clear(rte_atomic16_t *v)\n static inline void\n rte_atomic32_add(rte_atomic32_t *v, int32_t inc)\n {\n-\trte_atomic_fetch_add_explicit(&v->cnt, inc, rte_memory_order_seq_cst);\n+\trte_atomic_fetch_add_explicit((volatile __rte_atomic int32_t *)&v->cnt, inc,\n+\t    rte_memory_order_seq_cst);\n }\n \n /**\n@@ -567,7 +574,8 @@ static inline void rte_atomic16_clear(rte_atomic16_t *v)\n static inline void\n rte_atomic32_sub(rte_atomic32_t *v, int32_t dec)\n {\n-\trte_atomic_fetch_sub_explicit(&v->cnt, dec, rte_memory_order_seq_cst);\n+\trte_atomic_fetch_sub_explicit((volatile __rte_atomic int32_t *)&v->cnt, dec,\n+\t    rte_memory_order_seq_cst);\n }\n \n /**\n@@ -620,7 +628,8 @@ static inline void rte_atomic16_clear(rte_atomic16_t *v)\n static inline int32_t\n rte_atomic32_add_return(rte_atomic32_t *v, int32_t inc)\n {\n-\treturn rte_atomic_fetch_add_explicit(&v->cnt, inc, rte_memory_order_seq_cst) + inc;\n+\treturn rte_atomic_fetch_add_explicit((volatile __rte_atomic int32_t *)&v->cnt, inc,\n+\t    rte_memory_order_seq_cst) + inc;\n }\n \n /**\n@@ -640,7 +649,8 @@ static inline void rte_atomic16_clear(rte_atomic16_t *v)\n static inline int32_t\n rte_atomic32_sub_return(rte_atomic32_t *v, int32_t dec)\n {\n-\treturn rte_atomic_fetch_sub_explicit(&v->cnt, dec, rte_memory_order_seq_cst) - dec;\n+\treturn rte_atomic_fetch_sub_explicit((volatile __rte_atomic int32_t *)&v->cnt, dec,\n+\t    rte_memory_order_seq_cst) - dec;\n }\n \n /**\n@@ -659,7 +669,8 @@ static inline void rte_atomic16_clear(rte_atomic16_t *v)\n #ifdef RTE_FORCE_INTRINSICS\n static inline int rte_atomic32_inc_and_test(rte_atomic32_t *v)\n {\n-\treturn rte_atomic_fetch_add_explicit(&v->cnt, 1, rte_memory_order_seq_cst) + 1 == 0;\n+\treturn rte_atomic_fetch_add_explicit((volatile __rte_atomic int32_t *)&v->cnt, 1,\n+\t    rte_memory_order_seq_cst) + 1 == 0;\n }\n #endif\n \n@@ -679,7 +690,8 @@ static inline int rte_atomic32_inc_and_test(rte_atomic32_t *v)\n #ifdef RTE_FORCE_INTRINSICS\n static inline int rte_atomic32_dec_and_test(rte_atomic32_t *v)\n {\n-\treturn rte_atomic_fetch_sub_explicit(&v->cnt, 1, rte_memory_order_seq_cst) - 1 == 0;\n+\treturn rte_atomic_fetch_sub_explicit((volatile __rte_atomic int32_t *)&v->cnt, 1,\n+\t    rte_memory_order_seq_cst) - 1 == 0;\n }\n #endif\n \n@@ -885,7 +897,8 @@ static inline void rte_atomic32_clear(rte_atomic32_t *v)\n static inline void\n rte_atomic64_add(rte_atomic64_t *v, int64_t inc)\n {\n-\trte_atomic_fetch_add_explicit(&v->cnt, inc, rte_memory_order_seq_cst);\n+\trte_atomic_fetch_add_explicit((volatile __rte_atomic int64_t *)&v->cnt, inc,\n+\t    rte_memory_order_seq_cst);\n }\n #endif\n \n@@ -904,7 +917,8 @@ static inline void rte_atomic32_clear(rte_atomic32_t *v)\n static inline void\n rte_atomic64_sub(rte_atomic64_t *v, int64_t dec)\n {\n-\trte_atomic_fetch_sub_explicit(&v->cnt, dec, rte_memory_order_seq_cst);\n+\trte_atomic_fetch_sub_explicit((volatile __rte_atomic int64_t *)&v->cnt, dec,\n+\t    rte_memory_order_seq_cst);\n }\n #endif\n \n@@ -962,7 +976,8 @@ static inline void rte_atomic32_clear(rte_atomic32_t *v)\n static inline int64_t\n rte_atomic64_add_return(rte_atomic64_t *v, int64_t inc)\n {\n-\treturn rte_atomic_fetch_add_explicit(&v->cnt, inc, rte_memory_order_seq_cst) + inc;\n+\treturn rte_atomic_fetch_add_explicit((volatile __rte_atomic int64_t *)&v->cnt, inc,\n+\t    rte_memory_order_seq_cst) + inc;\n }\n #endif\n \n@@ -986,7 +1001,8 @@ static inline void rte_atomic32_clear(rte_atomic32_t *v)\n static inline int64_t\n rte_atomic64_sub_return(rte_atomic64_t *v, int64_t dec)\n {\n-\treturn rte_atomic_fetch_sub_explicit(&v->cnt, dec, rte_memory_order_seq_cst) - dec;\n+\treturn rte_atomic_fetch_sub_explicit((volatile __rte_atomic int64_t *)&v->cnt, dec,\n+\t    rte_memory_order_seq_cst) - dec;\n }\n #endif\n \ndiff --git a/lib/eal/include/generic/rte_pause.h b/lib/eal/include/generic/rte_pause.h\nindex 256309e..b7b059f 100644\n--- a/lib/eal/include/generic/rte_pause.h\n+++ b/lib/eal/include/generic/rte_pause.h\n@@ -81,7 +81,8 @@\n {\n \tassert(memorder == rte_memory_order_acquire || memorder == rte_memory_order_relaxed);\n \n-\twhile (rte_atomic_load_explicit(addr, memorder) != expected)\n+\twhile (rte_atomic_load_explicit((volatile __rte_atomic uint16_t *)addr, memorder)\n+\t    != expected)\n \t\trte_pause();\n }\n \n@@ -91,7 +92,8 @@\n {\n \tassert(memorder == rte_memory_order_acquire || memorder == rte_memory_order_relaxed);\n \n-\twhile (rte_atomic_load_explicit(addr, memorder) != expected)\n+\twhile (rte_atomic_load_explicit((volatile __rte_atomic uint32_t *)addr, memorder)\n+\t    != expected)\n \t\trte_pause();\n }\n \n@@ -101,7 +103,8 @@\n {\n \tassert(memorder == rte_memory_order_acquire || memorder == rte_memory_order_relaxed);\n \n-\twhile (rte_atomic_load_explicit(addr, memorder) != expected)\n+\twhile (rte_atomic_load_explicit((volatile __rte_atomic uint64_t *)addr, memorder)\n+\t    != expected)\n \t\trte_pause();\n }\n \ndiff --git a/lib/eal/x86/rte_power_intrinsics.c b/lib/eal/x86/rte_power_intrinsics.c\nindex cf70e33..fb8539f 100644\n--- a/lib/eal/x86/rte_power_intrinsics.c\n+++ b/lib/eal/x86/rte_power_intrinsics.c\n@@ -23,9 +23,10 @@\n \tuint64_t val;\n \n \t/* trigger a write but don't change the value */\n-\tval = rte_atomic_load_explicit((volatile uint64_t *)addr, rte_memory_order_relaxed);\n-\trte_atomic_compare_exchange_strong_explicit((volatile uint64_t *)addr, &val, val,\n-\t\t\trte_memory_order_relaxed, rte_memory_order_relaxed);\n+\tval = rte_atomic_load_explicit((volatile __rte_atomic uint64_t *)addr,\n+\t    rte_memory_order_relaxed);\n+\trte_atomic_compare_exchange_strong_explicit((volatile __rte_atomic uint64_t *)addr,\n+\t    &val, val, rte_memory_order_relaxed, rte_memory_order_relaxed);\n }\n \n static bool wait_supported;\n",
    "prefixes": [
        "v4",
        "3/6"
    ]
}