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GET /api/patches/132427/?format=api
{ "id": 132427, "url": "http://patchwork.dpdk.org/api/patches/132427/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/549b4cf74e6b7c9e6c56d3c693b3eb7f78db8c60.1696859505.git.gmuthukrishn@marvell.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<549b4cf74e6b7c9e6c56d3c693b3eb7f78db8c60.1696859505.git.gmuthukrishn@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/549b4cf74e6b7c9e6c56d3c693b3eb7f78db8c60.1696859505.git.gmuthukrishn@marvell.com", "date": "2023-10-09T13:54:49", "name": "[v4,2/7] cryptodev: add hash algorithms in asymmetric capability", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "592a38dea6c96c8c6dd180f15a80047f4a7677b4", "submitter": { "id": 2301, "url": "http://patchwork.dpdk.org/api/people/2301/?format=api", "name": "Gowrishankar Muthukrishnan", "email": "gmuthukrishn@marvell.com" }, "delegate": { "id": 6690, "url": "http://patchwork.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/549b4cf74e6b7c9e6c56d3c693b3eb7f78db8c60.1696859505.git.gmuthukrishn@marvell.com/mbox/", "series": [ { "id": 29773, "url": "http://patchwork.dpdk.org/api/series/29773/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=29773", "date": "2023-10-09T13:54:47", "name": "cryptodev: support digest message in SM2", "version": 4, "mbox": "http://patchwork.dpdk.org/series/29773/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/132427/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/132427/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 0B6AE4233C;\n\tMon, 9 Oct 2023 15:55:18 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id C9A1F406FF;\n\tMon, 9 Oct 2023 15:55:11 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 0C6B8406BC\n for <dev@dpdk.org>; Mon, 9 Oct 2023 15:55:09 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id\n 399D4RTd000936; Mon, 9 Oct 2023 06:55:09 -0700", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3tkh7ccd7y-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Mon, 09 Oct 2023 06:55:09 -0700", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48;\n Mon, 9 Oct 2023 06:55:07 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend\n Transport; Mon, 9 Oct 2023 06:55:07 -0700", "from BG-LT91401.marvell.com (BG-LT91401.marvell.com [10.28.168.34])\n by maili.marvell.com (Postfix) with ESMTP id 694233F70AD;\n Mon, 9 Oct 2023 06:55:04 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=QW/CFrmEJeFOPJPwunVLcg2nANajSlF3UxP6qUsOkP4=;\n b=SEQ77PtogEQ4ViA8KaHx2TE5BFAmyiaF+crQey6T1hyLO2yhN1rF26oZsXQhQ16Mvu3w\n hGpqAxttpi8SXn9RQ84faXN2iGfFY/CMGJaTVdEY1JF01o2FymkTz0KkPmw6tf0ereJu\n 6eodzGSmhHBwbX2T7JWP0zYm64M66w2vkbv/YUD0cU31LC0HRq9zpDrtdQf4qKE18vrD\n LZb78RYXfHL8fy74NrJAakgIPXjNDLhp9ckfLcyu8qvVE01YEzU5uAD7RCNiJeu1pBXb\n eXZUiEqj9JKef7HTNgbkLw3o9Hw90Hj1fUohaUhK6trSJnd76cc6irCaojhnTLidQioa uw==", "From": "Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>", "To": "<dev@dpdk.org>", "CC": "<anoobj@marvell.com>, Akhil Goyal <gakhil@marvell.com>, Fan Zhang\n <fanzhang.oss@gmail.com>, Kai Ji <kai.ji@intel.com>, Arkadiusz Kusztal\n <arkadiuszx.kusztal@intel.com>, Ciara Power <ciara.power@intel.com>,\n Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>", "Subject": "[PATCH v4 2/7] cryptodev: add hash algorithms in asymmetric\n capability", "Date": "Mon, 9 Oct 2023 19:24:49 +0530", "Message-ID": "\n <549b4cf74e6b7c9e6c56d3c693b3eb7f78db8c60.1696859505.git.gmuthukrishn@marvell.com>", "X-Mailer": "git-send-email 2.21.0", "In-Reply-To": "<cover.1696859505.git.gmuthukrishn@marvell.com>", "References": "<cover.1696859505.git.gmuthukrishn@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "_UkVcQSWseUnVXTuK7730XIxvYvGDUR2", "X-Proofpoint-ORIG-GUID": "_UkVcQSWseUnVXTuK7730XIxvYvGDUR2", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26\n definitions=2023-10-09_11,2023-10-09_01,2023-05-22_02", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Most of the asymmetric operations start with hash of the input.\nBut a PMD might also support only plain input (eg openssl).\nAdd a new field in asymmetric capability to declare support\nfor hash operations that PMD can support for the asymmetric\noperations. Application can skip computing hash if PMD already\nsupports it.\n\nSigned-off-by: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>\n---\n app/test/test_cryptodev_asym.c | 52 ++++++++++++++++++--\n drivers/crypto/openssl/rte_openssl_pmd_ops.c | 1 +\n lib/cryptodev/cryptodev_trace.h | 9 ++++\n lib/cryptodev/cryptodev_trace_points.c | 3 ++\n lib/cryptodev/rte_cryptodev.c | 16 ++++++\n lib/cryptodev/rte_cryptodev.h | 19 +++++++\n lib/cryptodev/version.map | 1 +\n 7 files changed, 97 insertions(+), 4 deletions(-)", "diff": "diff --git a/app/test/test_cryptodev_asym.c b/app/test/test_cryptodev_asym.c\nindex 39de0bdac5..af323e02d9 100644\n--- a/app/test/test_cryptodev_asym.c\n+++ b/app/test/test_cryptodev_asym.c\n@@ -1810,8 +1810,10 @@ _test_sm2_sign(bool rnd_secret)\n {\n \tstruct crypto_testsuite_params_asym *ts_params = &testsuite_params;\n \tstruct crypto_testsuite_sm2_params input_params = sm2_param_fp256;\n+\tconst struct rte_cryptodev_asymmetric_xform_capability *capa;\n \tstruct rte_mempool *sess_mpool = ts_params->session_mpool;\n \tstruct rte_mempool *op_mpool = ts_params->op_mpool;\n+\tstruct rte_cryptodev_asym_capability_idx idx;\n \tuint8_t dev_id = ts_params->valid_devs[0];\n \tstruct rte_crypto_op *result_op = NULL;\n \tuint8_t output_buf_r[TEST_DATA_SIZE];\n@@ -1822,6 +1824,12 @@ _test_sm2_sign(bool rnd_secret)\n \tint ret, status = TEST_SUCCESS;\n \tvoid *sess = NULL;\n \n+\t/* Check SM2 capability */\n+\tidx.type = RTE_CRYPTO_ASYM_XFORM_SM2;\n+\tcapa = rte_cryptodev_asym_capability_get(dev_id, &idx);\n+\tif (capa == NULL)\n+\t\treturn -ENOTSUP;\n+\n \t/* Setup crypto op data structure */\n \top = rte_crypto_op_alloc(op_mpool, RTE_CRYPTO_OP_TYPE_ASYMMETRIC);\n \tif (op == NULL) {\n@@ -1838,7 +1846,10 @@ _test_sm2_sign(bool rnd_secret)\n \t/* Setup asym xform */\n \txform.next = NULL;\n \txform.xform_type = RTE_CRYPTO_ASYM_XFORM_SM2;\n-\txform.sm2.hash = RTE_CRYPTO_AUTH_SM3;\n+\tif (rte_cryptodev_asym_xform_capability_check_hash(capa, RTE_CRYPTO_AUTH_SM3))\n+\t\txform.sm2.hash = RTE_CRYPTO_AUTH_SM3;\n+\telse\n+\t\txform.sm2.hash = RTE_CRYPTO_AUTH_NULL;\n \n \tret = rte_cryptodev_asym_session_create(dev_id, &xform, sess_mpool, &sess);\n \tif (ret < 0) {\n@@ -1993,8 +2004,10 @@ test_sm2_verify(void)\n {\n \tstruct crypto_testsuite_params_asym *ts_params = &testsuite_params;\n \tstruct crypto_testsuite_sm2_params input_params = sm2_param_fp256;\n+\tconst struct rte_cryptodev_asymmetric_xform_capability *capa;\n \tstruct rte_mempool *sess_mpool = ts_params->session_mpool;\n \tstruct rte_mempool *op_mpool = ts_params->op_mpool;\n+\tstruct rte_cryptodev_asym_capability_idx idx;\n \tuint8_t dev_id = ts_params->valid_devs[0];\n \tstruct rte_crypto_op *result_op = NULL;\n \tstruct rte_crypto_asym_xform xform;\n@@ -2003,6 +2016,12 @@ test_sm2_verify(void)\n \tint ret, status = TEST_SUCCESS;\n \tvoid *sess = NULL;\n \n+\t/* Check SM2 capability */\n+\tidx.type = RTE_CRYPTO_ASYM_XFORM_SM2;\n+\tcapa = rte_cryptodev_asym_capability_get(dev_id, &idx);\n+\tif (capa == NULL)\n+\t\treturn -ENOTSUP;\n+\n \t/* Setup crypto op data structure */\n \top = rte_crypto_op_alloc(op_mpool, RTE_CRYPTO_OP_TYPE_ASYMMETRIC);\n \tif (op == NULL) {\n@@ -2019,7 +2038,10 @@ test_sm2_verify(void)\n \t/* Setup asym xform */\n \txform.next = NULL;\n \txform.xform_type = RTE_CRYPTO_ASYM_XFORM_SM2;\n-\txform.sm2.hash = RTE_CRYPTO_AUTH_SM3;\n+\tif (rte_cryptodev_asym_xform_capability_check_hash(capa, RTE_CRYPTO_AUTH_SM3))\n+\t\txform.sm2.hash = RTE_CRYPTO_AUTH_SM3;\n+\telse\n+\t\txform.sm2.hash = RTE_CRYPTO_AUTH_NULL;\n \n \tret = rte_cryptodev_asym_session_create(dev_id, &xform, sess_mpool, &sess);\n \tif (ret < 0) {\n@@ -2094,9 +2116,11 @@ _test_sm2_enc(bool rnd_secret)\n {\n \tstruct crypto_testsuite_params_asym *ts_params = &testsuite_params;\n \tstruct crypto_testsuite_sm2_params input_params = sm2_param_fp256;\n+\tconst struct rte_cryptodev_asymmetric_xform_capability *capa;\n \tstruct rte_mempool *sess_mpool = ts_params->session_mpool;\n \tstruct rte_mempool *op_mpool = ts_params->op_mpool;\n \tuint8_t output_buf[TEST_DATA_SIZE], *pbuf = NULL;\n+\tstruct rte_cryptodev_asym_capability_idx idx;\n \tuint8_t dev_id = ts_params->valid_devs[0];\n \tstruct rte_crypto_op *result_op = NULL;\n \tstruct rte_crypto_asym_xform xform;\n@@ -2105,6 +2129,12 @@ _test_sm2_enc(bool rnd_secret)\n \tint ret, status = TEST_SUCCESS;\n \tvoid *sess = NULL;\n \n+\t/* Check SM2 capability */\n+\tidx.type = RTE_CRYPTO_ASYM_XFORM_SM2;\n+\tcapa = rte_cryptodev_asym_capability_get(dev_id, &idx);\n+\tif (capa == NULL)\n+\t\treturn -ENOTSUP;\n+\n \t/* Setup crypto op data structure */\n \top = rte_crypto_op_alloc(op_mpool, RTE_CRYPTO_OP_TYPE_ASYMMETRIC);\n \tif (op == NULL) {\n@@ -2120,7 +2150,10 @@ _test_sm2_enc(bool rnd_secret)\n \t/* Setup asym xform */\n \txform.next = NULL;\n \txform.xform_type = RTE_CRYPTO_ASYM_XFORM_SM2;\n-\txform.sm2.hash = RTE_CRYPTO_AUTH_SM3;\n+\tif (rte_cryptodev_asym_xform_capability_check_hash(capa, RTE_CRYPTO_AUTH_SM3))\n+\t\txform.sm2.hash = RTE_CRYPTO_AUTH_SM3;\n+\telse\n+\t\txform.sm2.hash = RTE_CRYPTO_AUTH_NULL;\n \n \tret = rte_cryptodev_asym_session_create(dev_id, &xform, sess_mpool, &sess);\n \tif (ret < 0) {\n@@ -2273,8 +2306,10 @@ test_sm2_dec(void)\n {\n \tstruct crypto_testsuite_params_asym *ts_params = &testsuite_params;\n \tstruct crypto_testsuite_sm2_params input_params = sm2_param_fp256;\n+\tconst struct rte_cryptodev_asymmetric_xform_capability *capa;\n \tstruct rte_mempool *sess_mpool = ts_params->session_mpool;\n \tstruct rte_mempool *op_mpool = ts_params->op_mpool;\n+\tstruct rte_cryptodev_asym_capability_idx idx;\n \tuint8_t dev_id = ts_params->valid_devs[0];\n \tstruct rte_crypto_op *result_op = NULL;\n \tuint8_t output_buf_m[TEST_DATA_SIZE];\n@@ -2284,6 +2319,12 @@ test_sm2_dec(void)\n \tint ret, status = TEST_SUCCESS;\n \tvoid *sess = NULL;\n \n+\t/* Check SM2 capability */\n+\tidx.type = RTE_CRYPTO_ASYM_XFORM_SM2;\n+\tcapa = rte_cryptodev_asym_capability_get(dev_id, &idx);\n+\tif (capa == NULL)\n+\t\treturn -ENOTSUP;\n+\n \t/* Setup crypto op data structure */\n \top = rte_crypto_op_alloc(op_mpool, RTE_CRYPTO_OP_TYPE_ASYMMETRIC);\n \tif (op == NULL) {\n@@ -2299,7 +2340,10 @@ test_sm2_dec(void)\n \t/* Setup asym xform */\n \txform.next = NULL;\n \txform.xform_type = RTE_CRYPTO_ASYM_XFORM_SM2;\n-\txform.sm2.hash = RTE_CRYPTO_AUTH_SM3;\n+\tif (rte_cryptodev_asym_xform_capability_check_hash(capa, RTE_CRYPTO_AUTH_SM3))\n+\t\txform.sm2.hash = RTE_CRYPTO_AUTH_SM3;\n+\telse\n+\t\txform.sm2.hash = RTE_CRYPTO_AUTH_NULL;\n \n \tret = rte_cryptodev_asym_session_create(dev_id, &xform, sess_mpool, &sess);\n \tif (ret < 0) {\ndiff --git a/drivers/crypto/openssl/rte_openssl_pmd_ops.c b/drivers/crypto/openssl/rte_openssl_pmd_ops.c\nindex 2eb450fcfd..d5dc365064 100644\n--- a/drivers/crypto/openssl/rte_openssl_pmd_ops.c\n+++ b/drivers/crypto/openssl/rte_openssl_pmd_ops.c\n@@ -598,6 +598,7 @@ static const struct rte_cryptodev_capabilities openssl_pmd_capabilities[] = {\n \t\t{.asym = {\n \t\t\t.xform_capa = {\n \t\t\t\t.xform_type = RTE_CRYPTO_ASYM_XFORM_SM2,\n+\t\t\t\t.hash_algos = (1 << RTE_CRYPTO_AUTH_SM3),\n \t\t\t\t.op_types =\n \t\t\t\t((1<<RTE_CRYPTO_ASYM_OP_SIGN) |\n \t\t\t\t (1 << RTE_CRYPTO_ASYM_OP_VERIFY) |\ndiff --git a/lib/cryptodev/cryptodev_trace.h b/lib/cryptodev/cryptodev_trace.h\nindex aab44af96b..935f0d564b 100644\n--- a/lib/cryptodev/cryptodev_trace.h\n+++ b/lib/cryptodev/cryptodev_trace.h\n@@ -520,6 +520,15 @@ RTE_TRACE_POINT(\n \trte_trace_point_emit_int(ret);\n )\n \n+RTE_TRACE_POINT(\n+\trte_cryptodev_trace_asym_xform_capability_check_hash,\n+\tRTE_TRACE_POINT_ARGS(uint64_t hash_algos,\n+\t\tenum rte_crypto_auth_algorithm hash, int ret),\n+\trte_trace_point_emit_u64(hash_algos);\n+\trte_trace_point_emit_int(hash);\n+\trte_trace_point_emit_int(ret);\n+)\n+\n RTE_TRACE_POINT(\n \trte_cryptodev_trace_count,\n \tRTE_TRACE_POINT_ARGS(uint8_t nb_devs),\ndiff --git a/lib/cryptodev/cryptodev_trace_points.c b/lib/cryptodev/cryptodev_trace_points.c\nindex e2303fdb52..8c47ab1e78 100644\n--- a/lib/cryptodev/cryptodev_trace_points.c\n+++ b/lib/cryptodev/cryptodev_trace_points.c\n@@ -144,6 +144,9 @@ RTE_TRACE_POINT_REGISTER(rte_cryptodev_trace_asym_xform_capability_check_modlen,\n RTE_TRACE_POINT_REGISTER(rte_cryptodev_trace_asym_xform_capability_check_optype,\n \tlib.cryptodev.asym.xform.capability.check.optype)\n \n+RTE_TRACE_POINT_REGISTER(rte_cryptodev_trace_asym_xform_capability_check_hash,\n+\tlib.cryptodev.asym.xform.capability.check.hash)\n+\n RTE_TRACE_POINT_REGISTER(rte_cryptodev_trace_sym_cpu_crypto_process,\n \tlib.cryptodev.sym.cpu.crypto.process)\n \ndiff --git a/lib/cryptodev/rte_cryptodev.c b/lib/cryptodev/rte_cryptodev.c\nindex 0f65992444..314710b5f4 100644\n--- a/lib/cryptodev/rte_cryptodev.c\n+++ b/lib/cryptodev/rte_cryptodev.c\n@@ -610,6 +610,22 @@ rte_cryptodev_asym_xform_capability_check_modlen(\n \treturn ret;\n }\n \n+bool\n+rte_cryptodev_asym_xform_capability_check_hash(\n+\tconst struct rte_cryptodev_asymmetric_xform_capability *capability,\n+\tenum rte_crypto_auth_algorithm hash)\n+{\n+\tbool ret = false;\n+\n+\tif (capability->hash_algos & (1 << hash))\n+\t\tret = true;\n+\n+\trte_cryptodev_trace_asym_xform_capability_check_hash(\n+\t\tcapability->hash_algos, hash, ret);\n+\n+\treturn ret;\n+}\n+\n /* spinlock for crypto device enq callbacks */\n static rte_spinlock_t rte_cryptodev_callback_lock = RTE_SPINLOCK_INITIALIZER;\n \ndiff --git a/lib/cryptodev/rte_cryptodev.h b/lib/cryptodev/rte_cryptodev.h\nindex 9f07e1ed2c..3a1b4dc501 100644\n--- a/lib/cryptodev/rte_cryptodev.h\n+++ b/lib/cryptodev/rte_cryptodev.h\n@@ -182,6 +182,9 @@ struct rte_cryptodev_asymmetric_xform_capability {\n \t\t * Value 0 mean implementation default\n \t\t */\n \t};\n+\n+\tuint64_t hash_algos;\n+\t/**< Bitmask of hash algorithms supported for op_type. */\n };\n \n /**\n@@ -340,6 +343,22 @@ rte_cryptodev_asym_xform_capability_check_modlen(\n \tconst struct rte_cryptodev_asymmetric_xform_capability *capability,\n \t\tuint16_t modlen);\n \n+/**\n+ * Check if hash algorithm is supported.\n+ *\n+ * @param\tcapability\tAsymmetric crypto capability.\n+ * @param\thash\t\tHash algorithm.\n+ *\n+ * @return\n+ * - Return true if the hash algorithm is supported.\n+ * - Return false if the hash algorithm is not supported.\n+ */\n+__rte_experimental\n+bool\n+rte_cryptodev_asym_xform_capability_check_hash(\n+\tconst struct rte_cryptodev_asymmetric_xform_capability *capability,\n+\tenum rte_crypto_auth_algorithm hash);\n+\n /**\n * Provide the cipher algorithm enum, given an algorithm string\n *\ndiff --git a/lib/cryptodev/version.map b/lib/cryptodev/version.map\nindex 20f7b24960..208919b819 100644\n--- a/lib/cryptodev/version.map\n+++ b/lib/cryptodev/version.map\n@@ -51,6 +51,7 @@ EXPERIMENTAL {\n \trte_cryptodev_asym_get_xform_enum;\n \trte_cryptodev_asym_session_create;\n \trte_cryptodev_asym_session_free;\n+\trte_cryptodev_asym_xform_capability_check_hash;\n \trte_cryptodev_asym_xform_capability_check_modlen;\n \trte_cryptodev_asym_xform_capability_check_optype;\n \trte_cryptodev_sym_cpu_crypto_process;\n", "prefixes": [ "v4", "2/7" ] }