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GET /api/patches/132682/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 132682,
    "url": "http://patchwork.dpdk.org/api/patches/132682/?format=api",
    "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/1697497745-20664-22-git-send-email-roretzla@linux.microsoft.com/",
    "project": {
        "id": 1,
        "url": "http://patchwork.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1697497745-20664-22-git-send-email-roretzla@linux.microsoft.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1697497745-20664-22-git-send-email-roretzla@linux.microsoft.com",
    "date": "2023-10-16T23:09:05",
    "name": "[21/21] ring: use rte optional stdatomic API",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "f534c63c22507fcd414a703f5e4ff95067de55c8",
    "submitter": {
        "id": 2077,
        "url": "http://patchwork.dpdk.org/api/people/2077/?format=api",
        "name": "Tyler Retzlaff",
        "email": "roretzla@linux.microsoft.com"
    },
    "delegate": {
        "id": 24651,
        "url": "http://patchwork.dpdk.org/api/users/24651/?format=api",
        "username": "dmarchand",
        "first_name": "David",
        "last_name": "Marchand",
        "email": "david.marchand@redhat.com"
    },
    "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/1697497745-20664-22-git-send-email-roretzla@linux.microsoft.com/mbox/",
    "series": [
        {
            "id": 29858,
            "url": "http://patchwork.dpdk.org/api/series/29858/?format=api",
            "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=29858",
            "date": "2023-10-16T23:08:44",
            "name": "use rte optional stdatomic API",
            "version": 1,
            "mbox": "http://patchwork.dpdk.org/series/29858/mbox/"
        }
    ],
    "comments": "http://patchwork.dpdk.org/api/patches/132682/comments/",
    "check": "fail",
    "checks": "http://patchwork.dpdk.org/api/patches/132682/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 3558643183;\n\tTue, 17 Oct 2023 01:11:29 +0200 (CEST)",
            "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 3245A42D0C;\n\tTue, 17 Oct 2023 01:09:34 +0200 (CEST)",
            "from linux.microsoft.com (linux.microsoft.com [13.77.154.182])\n by mails.dpdk.org (Postfix) with ESMTP id 7E56640A8B\n for <dev@dpdk.org>; Tue, 17 Oct 2023 01:09:09 +0200 (CEST)",
            "by linux.microsoft.com (Postfix, from userid 1086)\n id 18C2F20B74D5; Mon, 16 Oct 2023 16:09:07 -0700 (PDT)"
        ],
        "DKIM-Filter": "OpenDKIM Filter v2.11.0 linux.microsoft.com 18C2F20B74D5",
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com;\n s=default; t=1697497748;\n bh=u7FitjutMYjQFehkj/FDh2iHqYgZ5Qfn714C4siO/3M=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=qB1f4CcbLVJk5LsSPEieL5wM+7hoFXpGcltbUO2C3iQI55jSO3+s8sGsTyLKjsFgl\n /AeH/CFksGGKlQCIXc4fICMYehLQQ1QMwKIC95uNc0ytfcsl2zha3OSrMUmKIL4dR/\n /dJX5x1LwOiVKy4/1mRWSnKhyVGIOyJ0sWHoWcGw=",
        "From": "Tyler Retzlaff <roretzla@linux.microsoft.com>",
        "To": "dev@dpdk.org",
        "Cc": "Akhil Goyal <gakhil@marvell.com>,\n Anatoly Burakov <anatoly.burakov@intel.com>,\n Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>,\n Bruce Richardson <bruce.richardson@intel.com>,\n Chenbo Xia <chenbo.xia@intel.com>, Ciara Power <ciara.power@intel.com>,\n David Christensen <drc@linux.vnet.ibm.com>,\n David Hunt <david.hunt@intel.com>,\n Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>,\n Dmitry Malloy <dmitrym@microsoft.com>,\n Elena Agostini <eagostini@nvidia.com>,\n Erik Gabriel Carrillo <erik.g.carrillo@intel.com>,\n Fan Zhang <fanzhang.oss@gmail.com>, Ferruh Yigit <ferruh.yigit@amd.com>,\n Harman Kalra <hkalra@marvell.com>,\n Harry van Haaren <harry.van.haaren@intel.com>,\n Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>,\n Jerin Jacob <jerinj@marvell.com>,\n Konstantin Ananyev <konstantin.v.ananyev@yandex.ru>,\n Matan Azrad <matan@nvidia.com>,\n Maxime Coquelin <maxime.coquelin@redhat.com>,\n Narcisa Ana Maria Vasile <navasile@linux.microsoft.com>,\n Nicolas Chautru <nicolas.chautru@intel.com>,\n Olivier Matz <olivier.matz@6wind.com>, Ori Kam <orika@nvidia.com>,\n Pallavi Kadam <pallavi.kadam@intel.com>,\n Pavan Nikhilesh <pbhagavatula@marvell.com>,\n Reshma Pattan <reshma.pattan@intel.com>,\n Sameh Gobriel <sameh.gobriel@intel.com>,\n Shijith Thotton <sthotton@marvell.com>,\n Sivaprasad Tummala <sivaprasad.tummala@amd.com>,\n Stephen Hemminger <stephen@networkplumber.org>,\n Suanming Mou <suanmingm@nvidia.com>, Sunil Kumar Kori <skori@marvell.com>,\n Thomas Monjalon <thomas@monjalon.net>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>,\n Vladimir Medvedkin <vladimir.medvedkin@intel.com>,\n Yipeng Wang <yipeng1.wang@intel.com>,\n Tyler Retzlaff <roretzla@linux.microsoft.com>",
        "Subject": "[PATCH 21/21] ring: use rte optional stdatomic API",
        "Date": "Mon, 16 Oct 2023 16:09:05 -0700",
        "Message-Id": "<1697497745-20664-22-git-send-email-roretzla@linux.microsoft.com>",
        "X-Mailer": "git-send-email 1.8.3.1",
        "In-Reply-To": "<1697497745-20664-1-git-send-email-roretzla@linux.microsoft.com>",
        "References": "<1697497745-20664-1-git-send-email-roretzla@linux.microsoft.com>",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "Replace the use of gcc builtin __atomic_xxx intrinsics with\ncorresponding rte_atomic_xxx optional stdatomic API\n\nSigned-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>\n---\n drivers/net/mlx5/mlx5_hws_cnt.h   |  2 +-\n lib/ring/rte_ring_c11_pvt.h       | 33 +++++++++++++++++----------------\n lib/ring/rte_ring_core.h          | 10 +++++-----\n lib/ring/rte_ring_generic_pvt.h   |  3 ++-\n lib/ring/rte_ring_hts_elem_pvt.h  | 22 ++++++++++++----------\n lib/ring/rte_ring_peek_elem_pvt.h |  6 +++---\n lib/ring/rte_ring_rts_elem_pvt.h  | 27 ++++++++++++++-------------\n 7 files changed, 54 insertions(+), 49 deletions(-)",
    "diff": "diff --git a/drivers/net/mlx5/mlx5_hws_cnt.h b/drivers/net/mlx5/mlx5_hws_cnt.h\nindex f462665..cc9ac10 100644\n--- a/drivers/net/mlx5/mlx5_hws_cnt.h\n+++ b/drivers/net/mlx5/mlx5_hws_cnt.h\n@@ -394,7 +394,7 @@ struct mlx5_hws_age_param {\n \t__rte_ring_get_elem_addr(r, revert2head, sizeof(cnt_id_t), n,\n \t\t\t&zcd->ptr1, &zcd->n1, &zcd->ptr2);\n \t/* Update tail */\n-\t__atomic_store_n(&r->prod.tail, revert2head, __ATOMIC_RELEASE);\n+\trte_atomic_store_explicit(&r->prod.tail, revert2head, rte_memory_order_release);\n \treturn n;\n }\n \ndiff --git a/lib/ring/rte_ring_c11_pvt.h b/lib/ring/rte_ring_c11_pvt.h\nindex f895950..f8be538 100644\n--- a/lib/ring/rte_ring_c11_pvt.h\n+++ b/lib/ring/rte_ring_c11_pvt.h\n@@ -22,9 +22,10 @@\n \t * we need to wait for them to complete\n \t */\n \tif (!single)\n-\t\trte_wait_until_equal_32(&ht->tail, old_val, __ATOMIC_RELAXED);\n+\t\trte_wait_until_equal_32((volatile uint32_t *)(uintptr_t)&ht->tail, old_val,\n+\t\t\trte_memory_order_relaxed);\n \n-\t__atomic_store_n(&ht->tail, new_val, __ATOMIC_RELEASE);\n+\trte_atomic_store_explicit(&ht->tail, new_val, rte_memory_order_release);\n }\n \n /**\n@@ -61,19 +62,19 @@\n \tunsigned int max = n;\n \tint success;\n \n-\t*old_head = __atomic_load_n(&r->prod.head, __ATOMIC_RELAXED);\n+\t*old_head = rte_atomic_load_explicit(&r->prod.head, rte_memory_order_relaxed);\n \tdo {\n \t\t/* Reset n to the initial burst count */\n \t\tn = max;\n \n \t\t/* Ensure the head is read before tail */\n-\t\t__atomic_thread_fence(__ATOMIC_ACQUIRE);\n+\t\t__atomic_thread_fence(rte_memory_order_acquire);\n \n \t\t/* load-acquire synchronize with store-release of ht->tail\n \t\t * in update_tail.\n \t\t */\n-\t\tcons_tail = __atomic_load_n(&r->cons.tail,\n-\t\t\t\t\t__ATOMIC_ACQUIRE);\n+\t\tcons_tail = rte_atomic_load_explicit(&r->cons.tail,\n+\t\t\t\t\trte_memory_order_acquire);\n \n \t\t/* The subtraction is done between two unsigned 32bits value\n \t\t * (the result is always modulo 32 bits even if we have\n@@ -95,10 +96,10 @@\n \t\t\tr->prod.head = *new_head, success = 1;\n \t\telse\n \t\t\t/* on failure, *old_head is updated */\n-\t\t\tsuccess = __atomic_compare_exchange_n(&r->prod.head,\n+\t\t\tsuccess = rte_atomic_compare_exchange_strong_explicit(&r->prod.head,\n \t\t\t\t\told_head, *new_head,\n-\t\t\t\t\t0, __ATOMIC_RELAXED,\n-\t\t\t\t\t__ATOMIC_RELAXED);\n+\t\t\t\t\trte_memory_order_relaxed,\n+\t\t\t\t\trte_memory_order_relaxed);\n \t} while (unlikely(success == 0));\n \treturn n;\n }\n@@ -137,19 +138,19 @@\n \tint success;\n \n \t/* move cons.head atomically */\n-\t*old_head = __atomic_load_n(&r->cons.head, __ATOMIC_RELAXED);\n+\t*old_head = rte_atomic_load_explicit(&r->cons.head, rte_memory_order_relaxed);\n \tdo {\n \t\t/* Restore n as it may change every loop */\n \t\tn = max;\n \n \t\t/* Ensure the head is read before tail */\n-\t\t__atomic_thread_fence(__ATOMIC_ACQUIRE);\n+\t\t__atomic_thread_fence(rte_memory_order_acquire);\n \n \t\t/* this load-acquire synchronize with store-release of ht->tail\n \t\t * in update_tail.\n \t\t */\n-\t\tprod_tail = __atomic_load_n(&r->prod.tail,\n-\t\t\t\t\t__ATOMIC_ACQUIRE);\n+\t\tprod_tail = rte_atomic_load_explicit(&r->prod.tail,\n+\t\t\t\t\trte_memory_order_acquire);\n \n \t\t/* The subtraction is done between two unsigned 32bits value\n \t\t * (the result is always modulo 32 bits even if we have\n@@ -170,10 +171,10 @@\n \t\t\tr->cons.head = *new_head, success = 1;\n \t\telse\n \t\t\t/* on failure, *old_head will be updated */\n-\t\t\tsuccess = __atomic_compare_exchange_n(&r->cons.head,\n+\t\t\tsuccess = rte_atomic_compare_exchange_strong_explicit(&r->cons.head,\n \t\t\t\t\t\t\told_head, *new_head,\n-\t\t\t\t\t\t\t0, __ATOMIC_RELAXED,\n-\t\t\t\t\t\t\t__ATOMIC_RELAXED);\n+\t\t\t\t\t\t\trte_memory_order_relaxed,\n+\t\t\t\t\t\t\trte_memory_order_relaxed);\n \t} while (unlikely(success == 0));\n \treturn n;\n }\ndiff --git a/lib/ring/rte_ring_core.h b/lib/ring/rte_ring_core.h\nindex 327fdcf..7a2b577 100644\n--- a/lib/ring/rte_ring_core.h\n+++ b/lib/ring/rte_ring_core.h\n@@ -67,7 +67,7 @@ enum rte_ring_sync_type {\n  */\n struct rte_ring_headtail {\n \tvolatile uint32_t head;      /**< prod/consumer head. */\n-\tvolatile uint32_t tail;      /**< prod/consumer tail. */\n+\tvolatile RTE_ATOMIC(uint32_t) tail;      /**< prod/consumer tail. */\n \tunion {\n \t\t/** sync type of prod/cons */\n \t\tenum rte_ring_sync_type sync_type;\n@@ -78,7 +78,7 @@ struct rte_ring_headtail {\n \n union __rte_ring_rts_poscnt {\n \t/** raw 8B value to read/write *cnt* and *pos* as one atomic op */\n-\tuint64_t raw __rte_aligned(8);\n+\tRTE_ATOMIC(uint64_t) raw __rte_aligned(8);\n \tstruct {\n \t\tuint32_t cnt; /**< head/tail reference counter */\n \t\tuint32_t pos; /**< head/tail position */\n@@ -94,10 +94,10 @@ struct rte_ring_rts_headtail {\n \n union __rte_ring_hts_pos {\n \t/** raw 8B value to read/write *head* and *tail* as one atomic op */\n-\tuint64_t raw __rte_aligned(8);\n+\tRTE_ATOMIC(uint64_t) raw __rte_aligned(8);\n \tstruct {\n-\t\tuint32_t head; /**< head position */\n-\t\tuint32_t tail; /**< tail position */\n+\t\tRTE_ATOMIC(uint32_t) head; /**< head position */\n+\t\tRTE_ATOMIC(uint32_t) tail; /**< tail position */\n \t} pos;\n };\n \ndiff --git a/lib/ring/rte_ring_generic_pvt.h b/lib/ring/rte_ring_generic_pvt.h\nindex 5acb6e5..ffb3654 100644\n--- a/lib/ring/rte_ring_generic_pvt.h\n+++ b/lib/ring/rte_ring_generic_pvt.h\n@@ -23,7 +23,8 @@\n \t * we need to wait for them to complete\n \t */\n \tif (!single)\n-\t\trte_wait_until_equal_32(&ht->tail, old_val, __ATOMIC_RELAXED);\n+\t\trte_wait_until_equal_32((volatile uint32_t *)(uintptr_t)&ht->tail, old_val,\n+\t\t\trte_memory_order_relaxed);\n \n \tht->tail = new_val;\n }\ndiff --git a/lib/ring/rte_ring_hts_elem_pvt.h b/lib/ring/rte_ring_hts_elem_pvt.h\nindex a8678d3..91f5eec 100644\n--- a/lib/ring/rte_ring_hts_elem_pvt.h\n+++ b/lib/ring/rte_ring_hts_elem_pvt.h\n@@ -10,6 +10,8 @@\n #ifndef _RTE_RING_HTS_ELEM_PVT_H_\n #define _RTE_RING_HTS_ELEM_PVT_H_\n \n+#include <rte_stdatomic.h>\n+\n /**\n  * @file rte_ring_hts_elem_pvt.h\n  * It is not recommended to include this file directly,\n@@ -30,7 +32,7 @@\n \tRTE_SET_USED(enqueue);\n \n \ttail = old_tail + num;\n-\t__atomic_store_n(&ht->ht.pos.tail, tail, __ATOMIC_RELEASE);\n+\trte_atomic_store_explicit(&ht->ht.pos.tail, tail, rte_memory_order_release);\n }\n \n /**\n@@ -44,7 +46,7 @@\n {\n \twhile (p->pos.head != p->pos.tail) {\n \t\trte_pause();\n-\t\tp->raw = __atomic_load_n(&ht->ht.raw, __ATOMIC_ACQUIRE);\n+\t\tp->raw = rte_atomic_load_explicit(&ht->ht.raw, rte_memory_order_acquire);\n \t}\n }\n \n@@ -61,7 +63,7 @@\n \n \tconst uint32_t capacity = r->capacity;\n \n-\top.raw = __atomic_load_n(&r->hts_prod.ht.raw, __ATOMIC_ACQUIRE);\n+\top.raw = rte_atomic_load_explicit(&r->hts_prod.ht.raw, rte_memory_order_acquire);\n \n \tdo {\n \t\t/* Reset n to the initial burst count */\n@@ -98,9 +100,9 @@\n \t *  - OOO reads of cons tail value\n \t *  - OOO copy of elems from the ring\n \t */\n-\t} while (__atomic_compare_exchange_n(&r->hts_prod.ht.raw,\n-\t\t\t&op.raw, np.raw,\n-\t\t\t0, __ATOMIC_ACQUIRE, __ATOMIC_ACQUIRE) == 0);\n+\t} while (rte_atomic_compare_exchange_strong_explicit(&r->hts_prod.ht.raw,\n+\t\t\t(uint64_t *)(uintptr_t)&op.raw, np.raw,\n+\t\t\trte_memory_order_acquire, rte_memory_order_acquire) == 0);\n \n \t*old_head = op.pos.head;\n \treturn n;\n@@ -117,7 +119,7 @@\n \tuint32_t n;\n \tunion __rte_ring_hts_pos np, op;\n \n-\top.raw = __atomic_load_n(&r->hts_cons.ht.raw, __ATOMIC_ACQUIRE);\n+\top.raw = rte_atomic_load_explicit(&r->hts_cons.ht.raw, rte_memory_order_acquire);\n \n \t/* move cons.head atomically */\n \tdo {\n@@ -153,9 +155,9 @@\n \t *  - OOO reads of prod tail value\n \t *  - OOO copy of elems from the ring\n \t */\n-\t} while (__atomic_compare_exchange_n(&r->hts_cons.ht.raw,\n-\t\t\t&op.raw, np.raw,\n-\t\t\t0, __ATOMIC_ACQUIRE, __ATOMIC_ACQUIRE) == 0);\n+\t} while (rte_atomic_compare_exchange_strong_explicit(&r->hts_cons.ht.raw,\n+\t\t\t(uint64_t *)(uintptr_t)&op.raw, np.raw,\n+\t\t\trte_memory_order_acquire, rte_memory_order_acquire) == 0);\n \n \t*old_head = op.pos.head;\n \treturn n;\ndiff --git a/lib/ring/rte_ring_peek_elem_pvt.h b/lib/ring/rte_ring_peek_elem_pvt.h\nindex bb0a7d5..b5f0822 100644\n--- a/lib/ring/rte_ring_peek_elem_pvt.h\n+++ b/lib/ring/rte_ring_peek_elem_pvt.h\n@@ -59,7 +59,7 @@\n \n \tpos = tail + num;\n \tht->head = pos;\n-\t__atomic_store_n(&ht->tail, pos, __ATOMIC_RELEASE);\n+\trte_atomic_store_explicit(&ht->tail, pos, rte_memory_order_release);\n }\n \n /**\n@@ -78,7 +78,7 @@\n \tuint32_t n;\n \tunion __rte_ring_hts_pos p;\n \n-\tp.raw = __atomic_load_n(&ht->ht.raw, __ATOMIC_RELAXED);\n+\tp.raw = rte_atomic_load_explicit(&ht->ht.raw, rte_memory_order_relaxed);\n \tn = p.pos.head - p.pos.tail;\n \n \tRTE_ASSERT(n >= num);\n@@ -104,7 +104,7 @@\n \tp.pos.head = tail + num;\n \tp.pos.tail = p.pos.head;\n \n-\t__atomic_store_n(&ht->ht.raw, p.raw, __ATOMIC_RELEASE);\n+\trte_atomic_store_explicit(&ht->ht.raw, p.raw, rte_memory_order_release);\n }\n \n /**\ndiff --git a/lib/ring/rte_ring_rts_elem_pvt.h b/lib/ring/rte_ring_rts_elem_pvt.h\nindex 7164213..1226503 100644\n--- a/lib/ring/rte_ring_rts_elem_pvt.h\n+++ b/lib/ring/rte_ring_rts_elem_pvt.h\n@@ -31,18 +31,19 @@\n \t * might preceded us, then don't update tail with new value.\n \t */\n \n-\tot.raw = __atomic_load_n(&ht->tail.raw, __ATOMIC_ACQUIRE);\n+\tot.raw = rte_atomic_load_explicit(&ht->tail.raw, rte_memory_order_acquire);\n \n \tdo {\n \t\t/* on 32-bit systems we have to do atomic read here */\n-\t\th.raw = __atomic_load_n(&ht->head.raw, __ATOMIC_RELAXED);\n+\t\th.raw = rte_atomic_load_explicit(&ht->head.raw, rte_memory_order_relaxed);\n \n \t\tnt.raw = ot.raw;\n \t\tif (++nt.val.cnt == h.val.cnt)\n \t\t\tnt.val.pos = h.val.pos;\n \n-\t} while (__atomic_compare_exchange_n(&ht->tail.raw, &ot.raw, nt.raw,\n-\t\t\t0, __ATOMIC_RELEASE, __ATOMIC_ACQUIRE) == 0);\n+\t} while (rte_atomic_compare_exchange_strong_explicit(&ht->tail.raw,\n+\t\t\t(uint64_t *)(uintptr_t)&ot.raw, nt.raw,\n+\t\t\trte_memory_order_release, rte_memory_order_acquire) == 0);\n }\n \n /**\n@@ -59,7 +60,7 @@\n \n \twhile (h->val.pos - ht->tail.val.pos > max) {\n \t\trte_pause();\n-\t\th->raw = __atomic_load_n(&ht->head.raw, __ATOMIC_ACQUIRE);\n+\t\th->raw = rte_atomic_load_explicit(&ht->head.raw, rte_memory_order_acquire);\n \t}\n }\n \n@@ -76,7 +77,7 @@\n \n \tconst uint32_t capacity = r->capacity;\n \n-\toh.raw = __atomic_load_n(&r->rts_prod.head.raw, __ATOMIC_ACQUIRE);\n+\toh.raw = rte_atomic_load_explicit(&r->rts_prod.head.raw, rte_memory_order_acquire);\n \n \tdo {\n \t\t/* Reset n to the initial burst count */\n@@ -113,9 +114,9 @@\n \t *  - OOO reads of cons tail value\n \t *  - OOO copy of elems to the ring\n \t */\n-\t} while (__atomic_compare_exchange_n(&r->rts_prod.head.raw,\n-\t\t\t&oh.raw, nh.raw,\n-\t\t\t0, __ATOMIC_ACQUIRE, __ATOMIC_ACQUIRE) == 0);\n+\t} while (rte_atomic_compare_exchange_strong_explicit(&r->rts_prod.head.raw,\n+\t\t\t(uint64_t *)(uintptr_t)&oh.raw, nh.raw,\n+\t\t\trte_memory_order_acquire, rte_memory_order_acquire) == 0);\n \n \t*old_head = oh.val.pos;\n \treturn n;\n@@ -132,7 +133,7 @@\n \tuint32_t n;\n \tunion __rte_ring_rts_poscnt nh, oh;\n \n-\toh.raw = __atomic_load_n(&r->rts_cons.head.raw, __ATOMIC_ACQUIRE);\n+\toh.raw = rte_atomic_load_explicit(&r->rts_cons.head.raw, rte_memory_order_acquire);\n \n \t/* move cons.head atomically */\n \tdo {\n@@ -168,9 +169,9 @@\n \t *  - OOO reads of prod tail value\n \t *  - OOO copy of elems from the ring\n \t */\n-\t} while (__atomic_compare_exchange_n(&r->rts_cons.head.raw,\n-\t\t\t&oh.raw, nh.raw,\n-\t\t\t0, __ATOMIC_ACQUIRE, __ATOMIC_ACQUIRE) == 0);\n+\t} while (rte_atomic_compare_exchange_strong_explicit(&r->rts_cons.head.raw,\n+\t\t\t(uint64_t *)(uintptr_t)&oh.raw, nh.raw,\n+\t\t\trte_memory_order_acquire, rte_memory_order_acquire) == 0);\n \n \t*old_head = oh.val.pos;\n \treturn n;\n",
    "prefixes": [
        "21/21"
    ]
}