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GET /api/patches/133183/?format=api
{ "id": 133183, "url": "http://patchwork.dpdk.org/api/patches/133183/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20231023124225.141461-10-getelson@nvidia.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20231023124225.141461-10-getelson@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20231023124225.141461-10-getelson@nvidia.com", "date": "2023-10-23T12:42:24", "name": "[v4,09/10] net/mlx5: reformat HWS code for indirect list actions", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "15b068b91356e320a0891776b21c8b9964f4b516", "submitter": { "id": 1882, "url": "http://patchwork.dpdk.org/api/people/1882/?format=api", "name": "Gregory Etelson", "email": "getelson@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patchwork.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20231023124225.141461-10-getelson@nvidia.com/mbox/", "series": [ { "id": 29953, "url": "http://patchwork.dpdk.org/api/series/29953/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=29953", "date": "2023-10-23T12:42:15", "name": "net/mlx5: support indirect actions list", "version": 4, "mbox": "http://patchwork.dpdk.org/series/29953/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/133183/comments/", "check": "warning", "checks": "http://patchwork.dpdk.org/api/patches/133183/checks/", "tags": {}, "related": [], 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<matan@nvidia.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>, Ori Kam <orika@nvidia.com>", "Subject": "[PATCH v4 09/10] net/mlx5: reformat HWS code for indirect list\n actions", "Date": "Mon, 23 Oct 2023 15:42:24 +0300", "Message-ID": "<20231023124225.141461-10-getelson@nvidia.com>", "X-Mailer": "git-send-email 2.39.2", "In-Reply-To": "<20231023124225.141461-1-getelson@nvidia.com>", "References": "<20231017080928.30454-1-getelson@nvidia.com>\n <20231023124225.141461-1-getelson@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[10.126.230.35]", "X-ClientProxiedBy": "rnnvmail201.nvidia.com (10.129.68.8) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "CO1PEPF000044F3:EE_|SA1PR12MB8967:EE_", "X-MS-Office365-Filtering-Correlation-Id": "4c77a01f-b598-4ca5-9f98-08dbd3c5a552", "X-MS-Exchange-SenderADCheck": "1", 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Ip=[216.228.117.161];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n CO1PEPF000044F3.namprd05.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "SA1PR12MB8967", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Signed-off-by: Gregory Etelson <getelson@nvidia.com>\nAcked-by: Suanming Mou <suanmingm@nvidia.com>\n---\n drivers/net/mlx5/mlx5_flow.h | 4 +-\n drivers/net/mlx5/mlx5_flow_hw.c | 252 +++++++++++++++++---------------\n 2 files changed, 140 insertions(+), 116 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h\nindex f6a752475d..19b26ad333 100644\n--- a/drivers/net/mlx5/mlx5_flow.h\n+++ b/drivers/net/mlx5/mlx5_flow.h\n@@ -1331,11 +1331,11 @@ struct rte_flow_actions_template {\n \tuint64_t action_flags; /* Bit-map of all valid action in template. */\n \tuint16_t dr_actions_num; /* Amount of DR rules actions. */\n \tuint16_t actions_num; /* Amount of flow actions */\n-\tuint16_t *actions_off; /* DR action offset for given rte action offset. */\n+\tuint16_t *dr_off; /* DR action offset for given rte action offset. */\n+\tuint16_t *src_off; /* RTE action displacement from app. template */\n \tuint16_t reformat_off; /* Offset of DR reformat action. */\n \tuint16_t mhdr_off; /* Offset of DR modify header action. */\n \tuint32_t refcnt; /* Reference counter. */\n-\tuint16_t rx_cpy_pos; /* Action position of Rx metadata to be copied. */\n \tuint8_t flex_item; /* flex item index. */\n };\n \ndiff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c\nindex 22a6508ae8..e8544a4f2b 100644\n--- a/drivers/net/mlx5/mlx5_flow_hw.c\n+++ b/drivers/net/mlx5/mlx5_flow_hw.c\n@@ -1015,11 +1015,11 @@ flow_hw_modify_field_init(struct mlx5_hw_modify_header_action *mhdr,\n static __rte_always_inline int\n flow_hw_modify_field_compile(struct rte_eth_dev *dev,\n \t\t\t const struct rte_flow_attr *attr,\n-\t\t\t const struct rte_flow_action *action_start, /* Start of AT actions. */\n \t\t\t const struct rte_flow_action *action, /* Current action from AT. */\n \t\t\t const struct rte_flow_action *action_mask, /* Current mask from AT. */\n \t\t\t struct mlx5_hw_actions *acts,\n \t\t\t struct mlx5_hw_modify_header_action *mhdr,\n+\t\t\t uint16_t src_pos,\n \t\t\t struct rte_flow_error *error)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n@@ -1122,7 +1122,7 @@ flow_hw_modify_field_compile(struct rte_eth_dev *dev,\n \tif (shared)\n \t\treturn 0;\n \tret = __flow_hw_act_data_hdr_modify_append(priv, acts, RTE_FLOW_ACTION_TYPE_MODIFY_FIELD,\n-\t\t\t\t\t\t action - action_start, mhdr->pos,\n+\t\t\t\t\t\t src_pos, mhdr->pos,\n \t\t\t\t\t\t cmds_start, cmds_end, shared,\n \t\t\t\t\t\t field, dcopy, mask);\n \tif (ret)\n@@ -1181,11 +1181,10 @@ flow_hw_validate_compiled_modify_field(struct rte_eth_dev *dev,\n static int\n flow_hw_represented_port_compile(struct rte_eth_dev *dev,\n \t\t\t\t const struct rte_flow_attr *attr,\n-\t\t\t\t const struct rte_flow_action *action_start,\n \t\t\t\t const struct rte_flow_action *action,\n \t\t\t\t const struct rte_flow_action *action_mask,\n \t\t\t\t struct mlx5_hw_actions *acts,\n-\t\t\t\t uint16_t action_dst,\n+\t\t\t\t uint16_t action_src, uint16_t action_dst,\n \t\t\t\t struct rte_flow_error *error)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n@@ -1241,7 +1240,7 @@ flow_hw_represented_port_compile(struct rte_eth_dev *dev,\n \t} else {\n \t\tret = __flow_hw_act_data_general_append\n \t\t\t\t(priv, acts, action->type,\n-\t\t\t\t action - action_start, action_dst);\n+\t\t\t\t action_src, action_dst);\n \t\tif (ret)\n \t\t\treturn rte_flow_error_set\n \t\t\t\t\t(error, ENOMEM,\n@@ -1493,7 +1492,6 @@ __flow_hw_actions_translate(struct rte_eth_dev *dev,\n \tconst struct rte_flow_template_table_attr *table_attr = &cfg->attr;\n \tconst struct rte_flow_attr *attr = &table_attr->flow_attr;\n \tstruct rte_flow_action *actions = at->actions;\n-\tstruct rte_flow_action *action_start = actions;\n \tstruct rte_flow_action *masks = at->masks;\n \tenum mlx5dr_action_type refmt_type = MLX5DR_ACTION_TYP_LAST;\n \tconst struct rte_flow_action_raw_encap *raw_encap_data;\n@@ -1506,7 +1504,6 @@ __flow_hw_actions_translate(struct rte_eth_dev *dev,\n \tuint32_t type;\n \tbool reformat_used = false;\n \tunsigned int of_vlan_offset;\n-\tuint16_t action_pos;\n \tuint16_t jump_pos;\n \tuint32_t ct_idx;\n \tint ret, err;\n@@ -1521,71 +1518,69 @@ __flow_hw_actions_translate(struct rte_eth_dev *dev,\n \telse\n \t\ttype = MLX5DR_TABLE_TYPE_NIC_RX;\n \tfor (; !actions_end; actions++, masks++) {\n+\t\tuint64_t pos = actions - at->actions;\n+\t\tuint16_t src_pos = pos - at->src_off[pos];\n+\t\tuint16_t dr_pos = at->dr_off[pos];\n+\n \t\tswitch ((int)actions->type) {\n \t\tcase RTE_FLOW_ACTION_TYPE_INDIRECT_LIST:\n-\t\t\taction_pos = at->actions_off[actions - at->actions];\n \t\t\tif (!attr->group) {\n \t\t\t\tDRV_LOG(ERR, \"Indirect action is not supported in root table.\");\n \t\t\t\tgoto err;\n \t\t\t}\n \t\t\tret = table_template_translate_indirect_list\n-\t\t\t\t(dev, actions, masks, acts,\n-\t\t\t\t actions - action_start,\n-\t\t\t\t action_pos);\n+\t\t\t\t(dev, actions, masks, acts, src_pos, dr_pos);\n \t\t\tif (ret)\n \t\t\t\tgoto err;\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_INDIRECT:\n-\t\t\taction_pos = at->actions_off[actions - at->actions];\n \t\t\tif (!attr->group) {\n \t\t\t\tDRV_LOG(ERR, \"Indirect action is not supported in root table.\");\n \t\t\t\tgoto err;\n \t\t\t}\n \t\t\tif (actions->conf && masks->conf) {\n \t\t\t\tif (flow_hw_shared_action_translate\n-\t\t\t\t(dev, actions, acts, actions - action_start, action_pos))\n+\t\t\t\t(dev, actions, acts, src_pos, dr_pos))\n \t\t\t\t\tgoto err;\n \t\t\t} else if (__flow_hw_act_data_general_append\n-\t\t\t\t\t(priv, acts, actions->type,\n-\t\t\t\t\t actions - action_start, action_pos)){\n+\t\t\t\t\t(priv, acts, RTE_FLOW_ACTION_TYPE_INDIRECT,\n+\t\t\t\t\t src_pos, dr_pos)){\n \t\t\t\tgoto err;\n \t\t\t}\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_VOID:\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_DROP:\n-\t\t\taction_pos = at->actions_off[actions - at->actions];\n-\t\t\tacts->rule_acts[action_pos].action =\n+\t\t\tacts->rule_acts[dr_pos].action =\n \t\t\t\tpriv->hw_drop[!!attr->group];\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_MARK:\n-\t\t\taction_pos = at->actions_off[actions - at->actions];\n \t\t\tacts->mark = true;\n \t\t\tif (masks->conf &&\n \t\t\t ((const struct rte_flow_action_mark *)\n \t\t\t masks->conf)->id)\n-\t\t\t\tacts->rule_acts[action_pos].tag.value =\n+\t\t\t\tacts->rule_acts[dr_pos].tag.value =\n \t\t\t\t\tmlx5_flow_mark_set\n \t\t\t\t\t(((const struct rte_flow_action_mark *)\n \t\t\t\t\t(actions->conf))->id);\n \t\t\telse if (__flow_hw_act_data_general_append(priv, acts,\n-\t\t\t\tactions->type, actions - action_start, action_pos))\n+\t\t\t\t\t\t\t\t actions->type,\n+\t\t\t\t\t\t\t\t src_pos, dr_pos))\n \t\t\t\tgoto err;\n-\t\t\tacts->rule_acts[action_pos].action =\n+\t\t\tacts->rule_acts[dr_pos].action =\n \t\t\t\tpriv->hw_tag[!!attr->group];\n \t\t\t__atomic_fetch_add(&priv->hws_mark_refcnt, 1, __ATOMIC_RELAXED);\n \t\t\tflow_hw_rxq_flag_set(dev, true);\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:\n-\t\t\taction_pos = at->actions_off[actions - at->actions];\n-\t\t\tacts->rule_acts[action_pos].action =\n+\t\t\tacts->rule_acts[dr_pos].action =\n \t\t\t\tpriv->hw_push_vlan[type];\n \t\t\tif (is_template_masked_push_vlan(masks->conf))\n-\t\t\t\tacts->rule_acts[action_pos].push_vlan.vlan_hdr =\n+\t\t\t\tacts->rule_acts[dr_pos].push_vlan.vlan_hdr =\n \t\t\t\t\tvlan_hdr_to_be32(actions);\n \t\t\telse if (__flow_hw_act_data_general_append\n \t\t\t\t\t(priv, acts, actions->type,\n-\t\t\t\t\t actions - action_start, action_pos))\n+\t\t\t\t\t src_pos, dr_pos))\n \t\t\t\tgoto err;\n \t\t\tof_vlan_offset = is_of_vlan_pcp_present(actions) ?\n \t\t\t\t\tMLX5_HW_VLAN_PUSH_PCP_IDX :\n@@ -1594,12 +1589,10 @@ __flow_hw_actions_translate(struct rte_eth_dev *dev,\n \t\t\tmasks += of_vlan_offset;\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:\n-\t\t\taction_pos = at->actions_off[actions - at->actions];\n-\t\t\tacts->rule_acts[action_pos].action =\n+\t\t\tacts->rule_acts[dr_pos].action =\n \t\t\t\tpriv->hw_pop_vlan[type];\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_JUMP:\n-\t\t\taction_pos = at->actions_off[actions - at->actions];\n \t\t\tif (masks->conf &&\n \t\t\t ((const struct rte_flow_action_jump *)\n \t\t\t masks->conf)->group) {\n@@ -1610,17 +1603,16 @@ __flow_hw_actions_translate(struct rte_eth_dev *dev,\n \t\t\t\t\t\t(dev, cfg, jump_group, error);\n \t\t\t\tif (!acts->jump)\n \t\t\t\t\tgoto err;\n-\t\t\t\tacts->rule_acts[action_pos].action = (!!attr->group) ?\n-\t\t\t\t\t\tacts->jump->hws_action :\n-\t\t\t\t\t\tacts->jump->root_action;\n+\t\t\t\tacts->rule_acts[dr_pos].action = (!!attr->group) ?\n+\t\t\t\t\t\t\t\t acts->jump->hws_action :\n+\t\t\t\t\t\t\t\t acts->jump->root_action;\n \t\t\t} else if (__flow_hw_act_data_general_append\n \t\t\t\t\t(priv, acts, actions->type,\n-\t\t\t\t\t actions - action_start, action_pos)){\n+\t\t\t\t\t src_pos, dr_pos)){\n \t\t\t\tgoto err;\n \t\t\t}\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_QUEUE:\n-\t\t\taction_pos = at->actions_off[actions - at->actions];\n \t\t\tif (masks->conf &&\n \t\t\t ((const struct rte_flow_action_queue *)\n \t\t\t masks->conf)->index) {\n@@ -1630,16 +1622,15 @@ __flow_hw_actions_translate(struct rte_eth_dev *dev,\n \t\t\t\t actions);\n \t\t\t\tif (!acts->tir)\n \t\t\t\t\tgoto err;\n-\t\t\t\tacts->rule_acts[action_pos].action =\n+\t\t\t\tacts->rule_acts[dr_pos].action =\n \t\t\t\t\tacts->tir->action;\n \t\t\t} else if (__flow_hw_act_data_general_append\n \t\t\t\t\t(priv, acts, actions->type,\n-\t\t\t\t\t actions - action_start, action_pos)) {\n+\t\t\t\t\t src_pos, dr_pos)) {\n \t\t\t\tgoto err;\n \t\t\t}\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_RSS:\n-\t\t\taction_pos = at->actions_off[actions - at->actions];\n \t\t\tif (actions->conf && masks->conf) {\n \t\t\t\tacts->tir = flow_hw_tir_action_register\n \t\t\t\t(dev,\n@@ -1647,11 +1638,11 @@ __flow_hw_actions_translate(struct rte_eth_dev *dev,\n \t\t\t\t actions);\n \t\t\t\tif (!acts->tir)\n \t\t\t\t\tgoto err;\n-\t\t\t\tacts->rule_acts[action_pos].action =\n+\t\t\t\tacts->rule_acts[dr_pos].action =\n \t\t\t\t\tacts->tir->action;\n \t\t\t} else if (__flow_hw_act_data_general_append\n \t\t\t\t\t(priv, acts, actions->type,\n-\t\t\t\t\t actions - action_start, action_pos)) {\n+\t\t\t\t\t src_pos, dr_pos)) {\n \t\t\t\tgoto err;\n \t\t\t}\n \t\t\tbreak;\n@@ -1663,7 +1654,7 @@ __flow_hw_actions_translate(struct rte_eth_dev *dev,\n \t\t\t\tenc_item_m = ((const struct rte_flow_action_vxlan_encap *)\n \t\t\t\t\t masks->conf)->definition;\n \t\t\treformat_used = true;\n-\t\t\treformat_src = actions - action_start;\n+\t\t\treformat_src = src_pos;\n \t\t\trefmt_type = MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L2;\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:\n@@ -1674,7 +1665,7 @@ __flow_hw_actions_translate(struct rte_eth_dev *dev,\n \t\t\t\tenc_item_m = ((const struct rte_flow_action_nvgre_encap *)\n \t\t\t\t\t masks->conf)->definition;\n \t\t\treformat_used = true;\n-\t\t\treformat_src = actions - action_start;\n+\t\t\treformat_src = src_pos;\n \t\t\trefmt_type = MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L2;\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:\n@@ -1704,7 +1695,7 @@ __flow_hw_actions_translate(struct rte_eth_dev *dev,\n \t\t\t\trefmt_type =\n \t\t\t\tMLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L2;\n \t\t\t}\n-\t\t\treformat_src = actions - action_start;\n+\t\t\treformat_src = src_pos;\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_RAW_DECAP:\n \t\t\treformat_used = true;\n@@ -1720,34 +1711,22 @@ __flow_hw_actions_translate(struct rte_eth_dev *dev,\n \t\t\t\t\t\tNULL,\n \t\t\t\t\t\t\"Send to kernel action on root table is not supported in HW steering mode\");\n \t\t\t}\n-\t\t\taction_pos = at->actions_off[actions - at->actions];\n \t\t\ttable_type = attr->ingress ? MLX5DR_TABLE_TYPE_NIC_RX :\n \t\t\t\t ((attr->egress) ? MLX5DR_TABLE_TYPE_NIC_TX :\n-\t\t\t\t MLX5DR_TABLE_TYPE_FDB);\n-\t\t\tacts->rule_acts[action_pos].action = priv->hw_send_to_kernel[table_type];\n+\t\t\t\t MLX5DR_TABLE_TYPE_FDB);\n+\t\t\tacts->rule_acts[dr_pos].action = priv->hw_send_to_kernel[table_type];\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:\n-\t\t\terr = flow_hw_modify_field_compile(dev, attr, action_start,\n-\t\t\t\t\t\t\t actions, masks, acts, &mhdr,\n-\t\t\t\t\t\t\t error);\n+\t\t\terr = flow_hw_modify_field_compile(dev, attr, actions,\n+\t\t\t\t\t\t\t masks, acts, &mhdr,\n+\t\t\t\t\t\t\t src_pos, error);\n \t\t\tif (err)\n \t\t\t\tgoto err;\n-\t\t\t/*\n-\t\t\t * Adjust the action source position for the following.\n-\t\t\t * ... / MODIFY_FIELD: rx_cpy_pos / (QUEUE|RSS) / ...\n-\t\t\t * The next action will be Q/RSS, there will not be\n-\t\t\t * another adjustment and the real source position of\n-\t\t\t * the following actions will be decreased by 1.\n-\t\t\t * No change of the total actions in the new template.\n-\t\t\t */\n-\t\t\tif ((actions - action_start) == at->rx_cpy_pos)\n-\t\t\t\taction_start += 1;\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:\n-\t\t\taction_pos = at->actions_off[actions - at->actions];\n \t\t\tif (flow_hw_represented_port_compile\n-\t\t\t\t\t(dev, attr, action_start, actions,\n-\t\t\t\t\t masks, acts, action_pos, error))\n+\t\t\t\t\t(dev, attr, actions,\n+\t\t\t\t\t masks, acts, src_pos, dr_pos, error))\n \t\t\t\tgoto err;\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_METER:\n@@ -1756,19 +1735,18 @@ __flow_hw_actions_translate(struct rte_eth_dev *dev,\n \t\t\t * Calculated DR offset is stored only for ASO_METER and FT\n \t\t\t * is assumed to be the next action.\n \t\t\t */\n-\t\t\taction_pos = at->actions_off[actions - at->actions];\n-\t\t\tjump_pos = action_pos + 1;\n+\t\t\tjump_pos = dr_pos + 1;\n \t\t\tif (actions->conf && masks->conf &&\n \t\t\t ((const struct rte_flow_action_meter *)\n \t\t\t masks->conf)->mtr_id) {\n \t\t\t\terr = flow_hw_meter_compile(dev, cfg,\n-\t\t\t\t\t\taction_pos, jump_pos, actions, acts, error);\n+\t\t\t\t\t\t\t dr_pos, jump_pos, actions, acts, error);\n \t\t\t\tif (err)\n \t\t\t\t\tgoto err;\n \t\t\t} else if (__flow_hw_act_data_general_append(priv, acts,\n-\t\t\t\t\t\t\tactions->type,\n-\t\t\t\t\t\t\tactions - action_start,\n-\t\t\t\t\t\t\taction_pos))\n+\t\t\t\t\t\t\t\t actions->type,\n+\t\t\t\t\t\t\t\t src_pos,\n+\t\t\t\t\t\t\t\t dr_pos))\n \t\t\t\tgoto err;\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_AGE:\n@@ -1781,11 +1759,10 @@ __flow_hw_actions_translate(struct rte_eth_dev *dev,\n \t\t\t\t\t\tNULL,\n \t\t\t\t\t\t\"Age action on root table is not supported in HW steering mode\");\n \t\t\t}\n-\t\t\taction_pos = at->actions_off[actions - at->actions];\n \t\t\tif (__flow_hw_act_data_general_append(priv, acts,\n-\t\t\t\t\t\t\t actions->type,\n-\t\t\t\t\t\t\t actions - action_start,\n-\t\t\t\t\t\t\t action_pos))\n+\t\t\t\t\t\t\t actions->type,\n+\t\t\t\t\t\t\t src_pos,\n+\t\t\t\t\t\t\t dr_pos))\n \t\t\t\tgoto err;\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_COUNT:\n@@ -1806,49 +1783,46 @@ __flow_hw_actions_translate(struct rte_eth_dev *dev,\n \t\t\t\t * counter.\n \t\t\t\t */\n \t\t\t\tbreak;\n-\t\t\taction_pos = at->actions_off[actions - at->actions];\n \t\t\tif (masks->conf &&\n \t\t\t ((const struct rte_flow_action_count *)\n \t\t\t masks->conf)->id) {\n-\t\t\t\terr = flow_hw_cnt_compile(dev, action_pos, acts);\n+\t\t\t\terr = flow_hw_cnt_compile(dev, dr_pos, acts);\n \t\t\t\tif (err)\n \t\t\t\t\tgoto err;\n \t\t\t} else if (__flow_hw_act_data_general_append\n \t\t\t\t\t(priv, acts, actions->type,\n-\t\t\t\t\t actions - action_start, action_pos)) {\n+\t\t\t\t\t src_pos, dr_pos)) {\n \t\t\t\tgoto err;\n \t\t\t}\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_CONNTRACK:\n-\t\t\taction_pos = at->actions_off[actions - at->actions];\n \t\t\tif (masks->conf) {\n \t\t\t\tct_idx = MLX5_ACTION_CTX_CT_GET_IDX\n \t\t\t\t\t ((uint32_t)(uintptr_t)actions->conf);\n \t\t\t\tif (flow_hw_ct_compile(dev, MLX5_HW_INV_QUEUE, ct_idx,\n-\t\t\t\t\t\t &acts->rule_acts[action_pos]))\n+\t\t\t\t\t\t &acts->rule_acts[dr_pos]))\n \t\t\t\t\tgoto err;\n \t\t\t} else if (__flow_hw_act_data_general_append\n \t\t\t\t\t(priv, acts, actions->type,\n-\t\t\t\t\t actions - action_start, action_pos)) {\n+\t\t\t\t\t src_pos, dr_pos)) {\n \t\t\t\tgoto err;\n \t\t\t}\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_METER_MARK:\n-\t\t\taction_pos = at->actions_off[actions - at->actions];\n \t\t\tif (actions->conf && masks->conf &&\n \t\t\t ((const struct rte_flow_action_meter_mark *)\n \t\t\t masks->conf)->profile) {\n \t\t\t\terr = flow_hw_meter_mark_compile(dev,\n-\t\t\t\t\t\t\taction_pos, actions,\n-\t\t\t\t\t\t\tacts->rule_acts,\n-\t\t\t\t\t\t\t&acts->mtr_id,\n-\t\t\t\t\t\t\tMLX5_HW_INV_QUEUE);\n+\t\t\t\t\t\t\t\t dr_pos, actions,\n+\t\t\t\t\t\t\t\t acts->rule_acts,\n+\t\t\t\t\t\t\t\t &acts->mtr_id,\n+\t\t\t\t\t\t\t\t MLX5_HW_INV_QUEUE);\n \t\t\t\tif (err)\n \t\t\t\t\tgoto err;\n \t\t\t} else if (__flow_hw_act_data_general_append(priv, acts,\n-\t\t\t\t\t\t\tactions->type,\n-\t\t\t\t\t\t\tactions - action_start,\n-\t\t\t\t\t\t\taction_pos))\n+\t\t\t\t\t\t\t\t actions->type,\n+\t\t\t\t\t\t\t\t src_pos,\n+\t\t\t\t\t\t\t\t dr_pos))\n \t\t\t\tgoto err;\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_END:\n@@ -1931,7 +1905,7 @@ __flow_hw_actions_translate(struct rte_eth_dev *dev,\n \t\tif (shared_rfmt)\n \t\t\tacts->rule_acts[at->reformat_off].reformat.offset = 0;\n \t\telse if (__flow_hw_act_data_encap_append(priv, acts,\n-\t\t\t\t (action_start + reformat_src)->type,\n+\t\t\t\t (at->actions + reformat_src)->type,\n \t\t\t\t reformat_src, at->reformat_off, data_size))\n \t\t\tgoto err;\n \t\tacts->encap_decap->shared = shared_rfmt;\n@@ -4283,6 +4257,31 @@ flow_hw_validate_action_raw_encap(struct rte_eth_dev *dev __rte_unused,\n \treturn 0;\n }\n \n+/**\n+ * Process `... / raw_decap / raw_encap / ...` actions sequence.\n+ * The PMD handles the sequence as a single encap or decap reformat action,\n+ * depending on the raw_encap configuration.\n+ *\n+ * The function assumes that the raw_decap / raw_encap location\n+ * in actions template list complies with relative HWS actions order:\n+ * for the required reformat configuration:\n+ * ENCAP configuration must appear before [JUMP|DROP|PORT]\n+ * DECAP configuration must appear at the template head.\n+ */\n+static uint64_t\n+mlx5_decap_encap_reformat_type(const struct rte_flow_action *actions,\n+\t\t\t uint32_t encap_ind, uint64_t flags)\n+{\n+\tconst struct rte_flow_action_raw_encap *encap = actions[encap_ind].conf;\n+\n+\tif ((flags & MLX5_FLOW_ACTION_DECAP) == 0)\n+\t\treturn MLX5_FLOW_ACTION_ENCAP;\n+\tif (actions[encap_ind - 1].type != RTE_FLOW_ACTION_TYPE_RAW_DECAP)\n+\t\treturn MLX5_FLOW_ACTION_ENCAP;\n+\treturn encap->size >= MLX5_ENCAPSULATION_DECISION_SIZE ?\n+\t MLX5_FLOW_ACTION_ENCAP : MLX5_FLOW_ACTION_DECAP;\n+}\n+\n static inline uint16_t\n flow_hw_template_expand_modify_field(struct rte_flow_action actions[],\n \t\t\t\t struct rte_flow_action masks[],\n@@ -4320,13 +4319,13 @@ flow_hw_template_expand_modify_field(struct rte_flow_action actions[],\n \t */\n \tfor (i = act_num - 2; (int)i >= 0; i--) {\n \t\tenum rte_flow_action_type type = actions[i].type;\n+\t\tuint64_t reformat_type;\n \n \t\tif (type == RTE_FLOW_ACTION_TYPE_INDIRECT)\n \t\t\ttype = masks[i].type;\n \t\tswitch (type) {\n \t\tcase RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:\n \t\tcase RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:\n-\t\tcase RTE_FLOW_ACTION_TYPE_RAW_ENCAP:\n \t\tcase RTE_FLOW_ACTION_TYPE_DROP:\n \t\tcase RTE_FLOW_ACTION_TYPE_SEND_TO_KERNEL:\n \t\tcase RTE_FLOW_ACTION_TYPE_JUMP:\n@@ -4337,10 +4336,20 @@ flow_hw_template_expand_modify_field(struct rte_flow_action actions[],\n \t\tcase RTE_FLOW_ACTION_TYPE_VOID:\n \t\tcase RTE_FLOW_ACTION_TYPE_END:\n \t\t\tbreak;\n+\t\tcase RTE_FLOW_ACTION_TYPE_RAW_ENCAP:\n+\t\t\treformat_type =\n+\t\t\t\tmlx5_decap_encap_reformat_type(actions, i,\n+\t\t\t\t\t\t\t flags);\n+\t\t\tif (reformat_type == MLX5_FLOW_ACTION_DECAP) {\n+\t\t\t\ti++;\n+\t\t\t\tgoto insert;\n+\t\t\t}\n+\t\t\tif (actions[i - 1].type == RTE_FLOW_ACTION_TYPE_RAW_DECAP)\n+\t\t\t\ti--;\n+\t\t\tbreak;\n \t\tdefault:\n \t\t\ti++; /* new MF inserted AFTER actions[i] */\n \t\t\tgoto insert;\n-\t\t\tbreak;\n \t\t}\n \t}\n \ti = 0;\n@@ -4649,7 +4658,7 @@ action_template_set_type(struct rte_flow_actions_template *at,\n \t\t\t unsigned int action_src, uint16_t *curr_off,\n \t\t\t enum mlx5dr_action_type type)\n {\n-\tat->actions_off[action_src] = *curr_off;\n+\tat->dr_off[action_src] = *curr_off;\n \taction_types[*curr_off] = type;\n \t*curr_off = *curr_off + 1;\n }\n@@ -4680,11 +4689,13 @@ flow_hw_dr_actions_template_handle_shared(const struct rte_flow_action *mask,\n \t\t * Both AGE and COUNT action need counter, the first one fills\n \t\t * the action_types array, and the second only saves the offset.\n \t\t */\n-\t\tif (*cnt_off == UINT16_MAX)\n+\t\tif (*cnt_off == UINT16_MAX) {\n+\t\t\t*cnt_off = *curr_off;\n \t\t\taction_template_set_type(at, action_types,\n \t\t\t\t\t\t action_src, curr_off,\n \t\t\t\t\t\t MLX5DR_ACTION_TYP_CTR);\n-\t\tat->actions_off[action_src] = *cnt_off;\n+\t\t}\n+\t\tat->dr_off[action_src] = *cnt_off;\n \t\tbreak;\n \tcase RTE_FLOW_ACTION_TYPE_CONNTRACK:\n \t\taction_template_set_type(at, action_types, action_src, curr_off,\n@@ -4804,7 +4815,7 @@ flow_hw_dr_actions_template_create(struct rte_flow_actions_template *at)\n \t\t\t}\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_METER:\n-\t\t\tat->actions_off[i] = curr_off;\n+\t\t\tat->dr_off[i] = curr_off;\n \t\t\taction_types[curr_off++] = MLX5DR_ACTION_TYP_ASO_METER;\n \t\t\tif (curr_off >= MLX5_HW_MAX_ACTS)\n \t\t\t\tgoto err_actions_num;\n@@ -4812,14 +4823,14 @@ flow_hw_dr_actions_template_create(struct rte_flow_actions_template *at)\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:\n \t\t\ttype = mlx5_hw_dr_action_types[at->actions[i].type];\n-\t\t\tat->actions_off[i] = curr_off;\n+\t\t\tat->dr_off[i] = curr_off;\n \t\t\taction_types[curr_off++] = type;\n \t\t\ti += is_of_vlan_pcp_present(at->actions + i) ?\n \t\t\t\tMLX5_HW_VLAN_PUSH_PCP_IDX :\n \t\t\t\tMLX5_HW_VLAN_PUSH_VID_IDX;\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_METER_MARK:\n-\t\t\tat->actions_off[i] = curr_off;\n+\t\t\tat->dr_off[i] = curr_off;\n \t\t\taction_types[curr_off++] = MLX5DR_ACTION_TYP_ASO_METER;\n \t\t\tif (curr_off >= MLX5_HW_MAX_ACTS)\n \t\t\t\tgoto err_actions_num;\n@@ -4835,11 +4846,11 @@ flow_hw_dr_actions_template_create(struct rte_flow_actions_template *at)\n \t\t\t\tcnt_off = curr_off++;\n \t\t\t\taction_types[cnt_off] = MLX5DR_ACTION_TYP_CTR;\n \t\t\t}\n-\t\t\tat->actions_off[i] = cnt_off;\n+\t\t\tat->dr_off[i] = cnt_off;\n \t\t\tbreak;\n \t\tdefault:\n \t\t\ttype = mlx5_hw_dr_action_types[at->actions[i].type];\n-\t\t\tat->actions_off[i] = curr_off;\n+\t\t\tat->dr_off[i] = curr_off;\n \t\t\taction_types[curr_off++] = type;\n \t\t\tbreak;\n \t\t}\n@@ -5112,6 +5123,7 @@ flow_hw_actions_template_create(struct rte_eth_dev *dev,\n \tstruct rte_flow_action mf_actions[MLX5_HW_MAX_ACTS];\n \tstruct rte_flow_action mf_masks[MLX5_HW_MAX_ACTS];\n \tuint32_t expand_mf_num = 0;\n+\tuint16_t src_off[MLX5_HW_MAX_ACTS] = {0, };\n \n \tif (mlx5_flow_hw_actions_validate(dev, attr, actions, masks,\n \t\t\t\t\t &action_flags, error))\n@@ -5190,6 +5202,8 @@ flow_hw_actions_template_create(struct rte_eth_dev *dev,\n \t\t\t\t\t\t\t act_num,\n \t\t\t\t\t\t\t expand_mf_num);\n \t\tact_num += expand_mf_num;\n+\t\tfor (i = pos + expand_mf_num; i < act_num; i++)\n+\t\t\tsrc_off[i] += expand_mf_num;\n \t\taction_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;\n \t}\n \tact_len = rte_flow_conv(RTE_FLOW_CONV_OP_ACTIONS, NULL, 0, ra, error);\n@@ -5200,7 +5214,8 @@ flow_hw_actions_template_create(struct rte_eth_dev *dev,\n \tif (mask_len <= 0)\n \t\treturn NULL;\n \tlen += RTE_ALIGN(mask_len, 16);\n-\tlen += RTE_ALIGN(act_num * sizeof(*at->actions_off), 16);\n+\tlen += RTE_ALIGN(act_num * sizeof(*at->dr_off), 16);\n+\tlen += RTE_ALIGN(act_num * sizeof(*at->src_off), 16);\n \tat = mlx5_malloc(MLX5_MEM_ZERO, len + sizeof(*at),\n \t\t\t RTE_CACHE_LINE_SIZE, rte_socket_id());\n \tif (!at) {\n@@ -5224,13 +5239,15 @@ flow_hw_actions_template_create(struct rte_eth_dev *dev,\n \tif (mask_len <= 0)\n \t\tgoto error;\n \t/* DR actions offsets in the third part. */\n-\tat->actions_off = (uint16_t *)((uint8_t *)at->masks + mask_len);\n+\tat->dr_off = (uint16_t *)((uint8_t *)at->masks + mask_len);\n+\tat->src_off = RTE_PTR_ADD(at->dr_off,\n+\t\t\t\t RTE_ALIGN(act_num * sizeof(*at->dr_off), 16));\n+\tmemcpy(at->src_off, src_off, act_num * sizeof(at->src_off[0]));\n \tat->actions_num = act_num;\n \tfor (i = 0; i < at->actions_num; ++i)\n-\t\tat->actions_off[i] = UINT16_MAX;\n+\t\tat->dr_off[i] = UINT16_MAX;\n \tat->reformat_off = UINT16_MAX;\n \tat->mhdr_off = UINT16_MAX;\n-\tat->rx_cpy_pos = pos;\n \tfor (i = 0; actions->type != RTE_FLOW_ACTION_TYPE_END;\n \t actions++, masks++, i++) {\n \t\tconst struct rte_flow_action_modify_field *info;\n@@ -9547,14 +9564,15 @@ mlx5_mirror_terminal_action(const struct rte_flow_action *action)\n \n static bool\n mlx5_mirror_validate_sample_action(struct rte_eth_dev *dev,\n-\tconst struct rte_flow_action *action)\n+\t\t\t\t const struct rte_flow_attr *flow_attr,\n+\t\t\t\t const struct rte_flow_action *action)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n \n \tswitch(action->type) {\n \tcase RTE_FLOW_ACTION_TYPE_QUEUE:\n \tcase RTE_FLOW_ACTION_TYPE_RSS:\n-\t\tif (priv->sh->esw_mode)\n+\t\tif (flow_attr->transfer)\n \t\t\treturn false;\n \t\tbreak;\n \tcase RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:\n@@ -9562,7 +9580,7 @@ mlx5_mirror_validate_sample_action(struct rte_eth_dev *dev,\n \tcase RTE_FLOW_ACTION_TYPE_RAW_DECAP:\n \tcase RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:\n \tcase RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:\n-\t\tif (!priv->sh->esw_mode)\n+\t\tif (!priv->sh->esw_mode && !flow_attr->transfer)\n \t\t\treturn false;\n \t\tif (action[0].type == RTE_FLOW_ACTION_TYPE_RAW_DECAP &&\n \t\t action[1].type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP)\n@@ -9584,19 +9602,22 @@ mlx5_mirror_validate_sample_action(struct rte_eth_dev *dev,\n */\n static int\n mlx5_hw_mirror_actions_list_validate(struct rte_eth_dev *dev,\n+\t\t\t\t const struct rte_flow_attr *flow_attr,\n \t\t\t\t const struct rte_flow_action *actions)\n {\n \tif (actions[0].type == RTE_FLOW_ACTION_TYPE_SAMPLE) {\n \t\tint i = 1;\n \t\tbool valid;\n \t\tconst struct rte_flow_action_sample *sample = actions[0].conf;\n-\t\tvalid = mlx5_mirror_validate_sample_action(dev, sample->actions);\n+\t\tvalid = mlx5_mirror_validate_sample_action(dev, flow_attr,\n+\t\t\t\t\t\t\t sample->actions);\n \t\tif (!valid)\n \t\t\treturn -EINVAL;\n \t\tif (actions[1].type == RTE_FLOW_ACTION_TYPE_SAMPLE) {\n \t\t\ti = 2;\n \t\t\tsample = actions[1].conf;\n-\t\t\tvalid = mlx5_mirror_validate_sample_action(dev, sample->actions);\n+\t\t\tvalid = mlx5_mirror_validate_sample_action(dev, flow_attr,\n+\t\t\t\t\t\t\t\t sample->actions);\n \t\t\tif (!valid)\n \t\t\t\treturn -EINVAL;\n \t\t}\n@@ -9669,11 +9690,11 @@ mirror_format_port(struct rte_eth_dev *dev,\n \n static int\n hw_mirror_clone_reformat(const struct rte_flow_action *actions,\n- struct mlx5dr_action_dest_attr *dest_attr,\n- enum mlx5dr_action_type *action_type, bool decap)\n+\t\t\t struct mlx5dr_action_dest_attr *dest_attr,\n+\t\t\t enum mlx5dr_action_type *action_type,\n+\t\t\t uint8_t *reformat_buf, bool decap)\n {\n \tint ret;\n-\tuint8_t encap_buf[MLX5_ENCAP_MAX_LEN];\n \tconst struct rte_flow_item *encap_item = NULL;\n \tconst struct rte_flow_action_raw_encap *encap_conf = NULL;\n \ttypeof(dest_attr->reformat) *reformat = &dest_attr->reformat;\n@@ -9697,11 +9718,11 @@ hw_mirror_clone_reformat(const struct rte_flow_action *actions,\n \t\t MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L3 :\n \t\t MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L2;\n \tif (encap_item) {\n-\t\tret = flow_dv_convert_encap_data(encap_item, encap_buf,\n+\t\tret = flow_dv_convert_encap_data(encap_item, reformat_buf,\n \t\t\t\t\t\t &reformat->reformat_data_sz, NULL);\n \t\tif (ret)\n \t\t\treturn -EINVAL;\n-\t\treformat->reformat_data = (void *)(uintptr_t)encap_buf;\n+\t\treformat->reformat_data = reformat_buf;\n \t} else {\n \t\treformat->reformat_data = (void *)(uintptr_t)encap_conf->data;\n \t\treformat->reformat_data_sz = encap_conf->size;\n@@ -9715,7 +9736,7 @@ hw_mirror_format_clone(struct rte_eth_dev *dev,\n const struct mlx5_flow_template_table_cfg *table_cfg,\n const struct rte_flow_action *actions,\n struct mlx5dr_action_dest_attr *dest_attr,\n- struct rte_flow_error *error)\n+\t\t uint8_t *reformat_buf, struct rte_flow_error *error)\n {\n \tint ret;\n \tuint32_t i;\n@@ -9751,7 +9772,7 @@ hw_mirror_format_clone(struct rte_eth_dev *dev,\n \t\tcase RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:\n \t\t\tret = hw_mirror_clone_reformat(&actions[i], dest_attr,\n \t\t\t\t\t\t &dest_attr->action_type[i],\n-\t\t\t\t\t\t decap_seen);\n+\t\t\t\t\t\t reformat_buf, decap_seen);\n \t\t\tif (ret < 0)\n \t\t\t\treturn rte_flow_error_set(error, EINVAL,\n \t\t\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ACTION,\n@@ -9780,15 +9801,18 @@ mlx5_hw_mirror_handle_create(struct rte_eth_dev *dev,\n \tstruct mlx5_mirror *mirror;\n \tenum mlx5dr_table_type table_type;\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n+\tconst struct rte_flow_attr *flow_attr = &table_cfg->attr.flow_attr;\n+\tuint8_t reformat_buf[MLX5_MIRROR_MAX_CLONES_NUM][MLX5_ENCAP_MAX_LEN];\n \tstruct mlx5dr_action_dest_attr mirror_attr[MLX5_MIRROR_MAX_CLONES_NUM + 1];\n \tenum mlx5dr_action_type array_action_types[MLX5_MIRROR_MAX_CLONES_NUM + 1]\n \t\t\t\t\t\t [MLX5_MIRROR_MAX_SAMPLE_ACTIONS_LEN + 1];\n \n \tmemset(mirror_attr, 0, sizeof(mirror_attr));\n \tmemset(array_action_types, 0, sizeof(array_action_types));\n-\ttable_type = get_mlx5dr_table_type(&table_cfg->attr.flow_attr);\n+\ttable_type = get_mlx5dr_table_type(flow_attr);\n \thws_flags = mlx5_hw_act_flag[MLX5_HW_ACTION_FLAG_NONE_ROOT][table_type];\n-\tclones_num = mlx5_hw_mirror_actions_list_validate(dev, actions);\n+\tclones_num = mlx5_hw_mirror_actions_list_validate(dev, flow_attr,\n+\t\t\t\t\t\t\t actions);\n \tif (clones_num < 0) {\n \t\trte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,\n \t\t\t\t actions, \"Invalid mirror list format\");\n@@ -9816,7 +9840,7 @@ mlx5_hw_mirror_handle_create(struct rte_eth_dev *dev,\n \t\t}\n \t\tret = hw_mirror_format_clone(dev, &mirror->clone[i], table_cfg,\n \t\t\t\t\t clone_actions, &mirror_attr[i],\n-\t\t\t\t\t error);\n+\t\t\t\t\t reformat_buf[i], error);\n \n \t\tif (ret)\n \t\t\tgoto error;\n", "prefixes": [ "v4", "09/10" ] }