get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/patches/133300/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 133300,
    "url": "http://patchwork.dpdk.org/api/patches/133300/?format=api",
    "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20231025112232.201606-8-getelson@nvidia.com/",
    "project": {
        "id": 1,
        "url": "http://patchwork.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20231025112232.201606-8-getelson@nvidia.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20231025112232.201606-8-getelson@nvidia.com",
    "date": "2023-10-25T11:22:28",
    "name": "[v6,07/10] net/mlx5: reformat HWS code for HWS mirror action",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "917d50f3486d771df48509ccf12ccd67cef95f71",
    "submitter": {
        "id": 1882,
        "url": "http://patchwork.dpdk.org/api/people/1882/?format=api",
        "name": "Gregory Etelson",
        "email": "getelson@nvidia.com"
    },
    "delegate": {
        "id": 3268,
        "url": "http://patchwork.dpdk.org/api/users/3268/?format=api",
        "username": "rasland",
        "first_name": "Raslan",
        "last_name": "Darawsheh",
        "email": "rasland@nvidia.com"
    },
    "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20231025112232.201606-8-getelson@nvidia.com/mbox/",
    "series": [
        {
            "id": 29979,
            "url": "http://patchwork.dpdk.org/api/series/29979/?format=api",
            "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=29979",
            "date": "2023-10-25T11:22:21",
            "name": "net/mlx5: support indirect actions list",
            "version": 6,
            "mbox": "http://patchwork.dpdk.org/series/29979/mbox/"
        }
    ],
    "comments": "http://patchwork.dpdk.org/api/patches/133300/comments/",
    "check": "success",
    "checks": "http://patchwork.dpdk.org/api/patches/133300/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 5D5DF431FB;\n\tWed, 25 Oct 2023 13:24:05 +0200 (CEST)",
            "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id BDEA942D8C;\n\tWed, 25 Oct 2023 13:23:29 +0200 (CEST)",
            "from NAM02-SN1-obe.outbound.protection.outlook.com\n (mail-sn1nam02on2066.outbound.protection.outlook.com [40.107.96.66])\n by mails.dpdk.org (Postfix) with ESMTP id 1452B42D7B\n for <dev@dpdk.org>; Wed, 25 Oct 2023 13:23:28 +0200 (CEST)",
            "from MW4PR03CA0076.namprd03.prod.outlook.com (2603:10b6:303:b6::21)\n by LV8PR12MB9418.namprd12.prod.outlook.com (2603:10b6:408:202::15)\n with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6907.33; Wed, 25 Oct\n 2023 11:23:26 +0000",
            "from CO1PEPF000044F7.namprd21.prod.outlook.com\n (2603:10b6:303:b6:cafe::5a) by MW4PR03CA0076.outlook.office365.com\n (2603:10b6:303:b6::21) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6933.19 via Frontend\n Transport; Wed, 25 Oct 2023 11:23:25 +0000",
            "from mail.nvidia.com (216.228.117.161) by\n CO1PEPF000044F7.mail.protection.outlook.com (10.167.241.197) with Microsoft\n SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.20.6954.0 via Frontend Transport; Wed, 25 Oct 2023 11:23:25 +0000",
            "from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com\n (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Wed, 25 Oct\n 2023 04:23:10 -0700",
            "from nvidia.com (10.126.230.35) by rnnvmail201.nvidia.com\n (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Wed, 25 Oct\n 2023 04:23:07 -0700"
        ],
        "ARC-Seal": "i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none;\n b=ZnIReZMYJUzbcrnvKe876PxKXooqJFABsSNFgYF3MVC8jWnbkpSQL+E5I03mmlN+8/F6FiyrS5IpATwdW/vf/PHBaSBBYJs3uZPAQDWEVgS+wK23IWRO8tsAfumuYPIShqsN4VVXv3/cIDRmNkjOQBQ8BeGZxCXfbXa3ILw1uZSDBKwh51h7XCy5FSN81B4MVq2wAoIsfjUmhqULtIPqgxhnllfnEVvsEEBuuLcyaQcyB2z+NUFqpyaI6XC/oYeA2GXKXryUdKzwtx1dAATvpk5LyVK8zKa4ugjk5EIWUmLWzOu0K3HI6ylEW1q39sH6u91k8g3cJ7VfZ+WQVaAJKw==",
        "ARC-Message-Signature": "i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n s=arcselector9901;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1;\n bh=41KmvLZUfRDOPvEREZNK1ZTON50ok9RcxwZLZQ2u5tk=;\n b=b/D+usTL9paDnddI7KUite2M7M8Xz7QgvampFNyZuslSObeccdXcq8g5yzqwRl+C3ETeo51CAItZZ1efmXNl+matZ1ywn6nV24F9Zi9u5FJ9zf8++KpKNJbTIb+lqYzjuMS1VkXzp9LI8sS33ysA6LpatzynS1adwsDm1YoU1ve1Gsr7H+CA6BZBe8X6oaWJYcUu6ZkJYYjDB3Sd/KKiAiAEECyHzgHnwMF17UgEik8IoWP/jnVIpHZfsuqeRwYh6aieQhL1k1zBxsZo+bgAEY17iqmVNy4dEEwLi6Ag82RPupSOIv8tIF03dnpKri6hdvkRwqC0jp2l+ml+xgFGhA==",
        "ARC-Authentication-Results": "i=1; mx.microsoft.com 1; spf=pass (sender ip is\n 216.228.117.161) smtp.rcpttodomain=dpdk.org smtp.mailfrom=nvidia.com;\n dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com;\n dkim=none (message not signed); arc=none",
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com;\n s=selector2;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=41KmvLZUfRDOPvEREZNK1ZTON50ok9RcxwZLZQ2u5tk=;\n b=PI/RrwrsKfsy8WIiBkMv2JbQ4zDtXWKmz1160FC/kdZnk3RQeFuzYwZmky7AWLpDQi7mzVrqThyShaVEgtFjxdPpXFV8iqXxF6kuuA70nJkVM+VFYl55KQO8pA268B2UXPPSyiVPtJdkZmgpw2fegU/DYI3TPMaMgDL9BLvUYN8vLldEDidwOYEiqC3qAn36TxX6Ld2QDLrCAmIdGkSgVlqoZVvt8CG7rTErJGBxMXyiKFSojXWNYpYth0uokoje6i3HNe8o4y4HsWS0tv0rNsxfM8uDtKXDoOXGS9kJzHc8f6C14E6j9En7V6vzqAuhz9ZlUXgChV68J2b1b90Kqw==",
        "X-MS-Exchange-Authentication-Results": "spf=pass (sender IP is 216.228.117.161)\n smtp.mailfrom=nvidia.com;\n dkim=none (message not signed)\n header.d=none;dmarc=pass action=none header.from=nvidia.com;",
        "Received-SPF": "Pass (protection.outlook.com: domain of nvidia.com designates\n 216.228.117.161 as permitted sender) receiver=protection.outlook.com;\n client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C",
        "From": "Gregory Etelson <getelson@nvidia.com>",
        "To": "<dev@dpdk.org>",
        "CC": "<getelson@nvidia.com>, =?utf-8?b?wqA=?= <mkashani@nvidia.com>,\n <rasland@nvidia.com>, Suanming Mou <suanmingm@nvidia.com>,\n Matan Azrad <matan@nvidia.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>, Ori Kam <orika@nvidia.com>",
        "Subject": "[PATCH v6 07/10] net/mlx5: reformat HWS code for HWS mirror action",
        "Date": "Wed, 25 Oct 2023 14:22:28 +0300",
        "Message-ID": "<20231025112232.201606-8-getelson@nvidia.com>",
        "X-Mailer": "git-send-email 2.39.2",
        "In-Reply-To": "<20231025112232.201606-1-getelson@nvidia.com>",
        "References": "<20231017080928.30454-1-getelson@nvidia.com>\n <20231025112232.201606-1-getelson@nvidia.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Content-Type": "text/plain",
        "X-Originating-IP": "[10.126.230.35]",
        "X-ClientProxiedBy": "rnnvmail202.nvidia.com (10.129.68.7) To\n rnnvmail201.nvidia.com (10.129.68.8)",
        "X-EOPAttributedMessage": "0",
        "X-MS-PublicTrafficType": "Email",
        "X-MS-TrafficTypeDiagnostic": "CO1PEPF000044F7:EE_|LV8PR12MB9418:EE_",
        "X-MS-Office365-Filtering-Correlation-Id": "35af0dfe-ced6-4425-7178-08dbd54cce0c",
        "X-MS-Exchange-SenderADCheck": "1",
        "X-MS-Exchange-AntiSpam-Relay": "0",
        "X-Microsoft-Antispam": "BCL:0;",
        "X-Microsoft-Antispam-Message-Info": "\n Xgv+XaVDLR1XxC3R5Xc/5nM6HGatd9ikCoTBzziUa7ZrHz+C64IGsFA5briXoB+p7lwMumFFHqcH0v8NYhLmw+edQCQPfj3x5IQnO21FMl01MHd2wpB6l7lmsn5r+VBjlKLTUg2gOcW+J87FmIzdggXiH5Y/tptYsKY4tx6hTHeOFS0WunTboc7DrBtc3+djY0g1elfgo4YHmgU4FSKIWFJ61mgt0SKCGcp6pS0I+MSTVpHJ9ULLHgHpzNHiEyatYf302quJavJe1ZEvaq+PArlpWGW4D2/Uz2AFCpHR9JdIJmH0U4euFQ/BI0zVzKTgfkAdXS/eoyv7MFbuzvjI2fzsjGGeLbedANDgJ/z2Kqcc7p/gscoTpFoIk0rm6+zthL4u+h2LJ3t5fi0w2T/9Zd1CTc/J9qrShC8Ae5Qv44JOp39zml366Wj0kEHq/i2hnbftZ+aIyenVp+vXEk9k4u2SOobC4Jr/8SR8ugWE/0o142zz2DopRQ+cTpm8nQvfJoNwLF4Bqy1jCZWJzJRR9N9IkeCTxAbRGXFpXR9j3Ki973W0NanlpPyxydMepB56HrjmbC0x82ygKjDxuJfiZe+DFOmAx1e5aystFp47Ako9WNDXQYsY0wRxxggeu9H7y1VtxvWYgqQ4t4MCjDoK2U+RLPdjXy1vZrY8/XbFofmI4z5vcRMg2GdeoQdVGi2WPM3K3KELmIYT0qR5QVtKwPibuvp+520AKGRL8rnRpqM=",
        "X-Forefront-Antispam-Report": "CIP:216.228.117.161; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE;\n SFS:(13230031)(4636009)(396003)(346002)(39860400002)(376002)(136003)(230922051799003)(1800799009)(64100799003)(82310400011)(186009)(451199024)(40470700004)(36840700001)(46966006)(55016003)(2906002)(86362001)(41300700001)(82740400003)(6916009)(54906003)(316002)(70586007)(6666004)(7696005)(478600001)(107886003)(70206006)(1076003)(7636003)(426003)(47076005)(83380400001)(356005)(40480700001)(336012)(36860700001)(40460700003)(5660300002)(36756003)(4326008)(2616005)(8676002)(8936002)(16526019)(26005)(6286002);\n DIR:OUT; SFP:1101;",
        "X-OriginatorOrg": "Nvidia.com",
        "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "25 Oct 2023 11:23:25.3272 (UTC)",
        "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 35af0dfe-ced6-4425-7178-08dbd54cce0c",
        "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a",
        "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161];\n Helo=[mail.nvidia.com]",
        "X-MS-Exchange-CrossTenant-AuthSource": "\n CO1PEPF000044F7.namprd21.prod.outlook.com",
        "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous",
        "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem",
        "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "LV8PR12MB9418",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "Reformat HWS code for HWS mirror action.\n\nSigned-off-by: Gregory Etelson <getelson@nvidia.com>\nAcked-by: Suanming Mou <suanmingm@nvidia.com>\n---\n drivers/net/mlx5/mlx5_flow_hw.c | 70 ++++++++++++++++++---------------\n 1 file changed, 39 insertions(+), 31 deletions(-)",
    "diff": "diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c\nindex 6fcf654e4a..b2215fb5cf 100644\n--- a/drivers/net/mlx5/mlx5_flow_hw.c\n+++ b/drivers/net/mlx5/mlx5_flow_hw.c\n@@ -4548,6 +4548,17 @@ static enum mlx5dr_action_type mlx5_hw_dr_action_types[] = {\n \t[RTE_FLOW_ACTION_TYPE_SEND_TO_KERNEL] = MLX5DR_ACTION_TYP_DEST_ROOT,\n };\n \n+static inline void\n+action_template_set_type(struct rte_flow_actions_template *at,\n+\t\t\t enum mlx5dr_action_type *action_types,\n+\t\t\t unsigned int action_src, uint16_t *curr_off,\n+\t\t\t enum mlx5dr_action_type type)\n+{\n+\tat->actions_off[action_src] = *curr_off;\n+\taction_types[*curr_off] = type;\n+\t*curr_off = *curr_off + 1;\n+}\n+\n static int\n flow_hw_dr_actions_template_handle_shared(const struct rte_flow_action *mask,\n \t\t\t\t\t  unsigned int action_src,\n@@ -4565,9 +4576,8 @@ flow_hw_dr_actions_template_handle_shared(const struct rte_flow_action *mask,\n \ttype = mask->type;\n \tswitch (type) {\n \tcase RTE_FLOW_ACTION_TYPE_RSS:\n-\t\tat->actions_off[action_src] = *curr_off;\n-\t\taction_types[*curr_off] = MLX5DR_ACTION_TYP_TIR;\n-\t\t*curr_off = *curr_off + 1;\n+\t\taction_template_set_type(at, action_types, action_src, curr_off,\n+\t\t\t\t\t MLX5DR_ACTION_TYP_TIR);\n \t\tbreak;\n \tcase RTE_FLOW_ACTION_TYPE_AGE:\n \tcase RTE_FLOW_ACTION_TYPE_COUNT:\n@@ -4575,23 +4585,20 @@ flow_hw_dr_actions_template_handle_shared(const struct rte_flow_action *mask,\n \t\t * Both AGE and COUNT action need counter, the first one fills\n \t\t * the action_types array, and the second only saves the offset.\n \t\t */\n-\t\tif (*cnt_off == UINT16_MAX) {\n-\t\t\t*cnt_off = *curr_off;\n-\t\t\taction_types[*cnt_off] = MLX5DR_ACTION_TYP_CTR;\n-\t\t\t*curr_off = *curr_off + 1;\n-\t\t}\n+\t\tif (*cnt_off == UINT16_MAX)\n+\t\t\taction_template_set_type(at, action_types,\n+\t\t\t\t\t\t action_src, curr_off,\n+\t\t\t\t\t\t MLX5DR_ACTION_TYP_CTR);\n \t\tat->actions_off[action_src] = *cnt_off;\n \t\tbreak;\n \tcase RTE_FLOW_ACTION_TYPE_CONNTRACK:\n-\t\tat->actions_off[action_src] = *curr_off;\n-\t\taction_types[*curr_off] = MLX5DR_ACTION_TYP_ASO_CT;\n-\t\t*curr_off = *curr_off + 1;\n+\t\taction_template_set_type(at, action_types, action_src, curr_off,\n+\t\t\t\t\t MLX5DR_ACTION_TYP_ASO_CT);\n \t\tbreak;\n \tcase RTE_FLOW_ACTION_TYPE_QUOTA:\n \tcase RTE_FLOW_ACTION_TYPE_METER_MARK:\n-\t\tat->actions_off[action_src] = *curr_off;\n-\t\taction_types[*curr_off] = MLX5DR_ACTION_TYP_ASO_METER;\n-\t\t*curr_off = *curr_off + 1;\n+\t\taction_template_set_type(at, action_types, action_src, curr_off,\n+\t\t\t\t\t MLX5DR_ACTION_TYP_ASO_METER);\n \t\tbreak;\n \tdefault:\n \t\tDRV_LOG(WARNING, \"Unsupported shared action type: %d\", type);\n@@ -5101,31 +5108,32 @@ flow_hw_actions_template_create(struct rte_eth_dev *dev,\n \tat->reformat_off = UINT16_MAX;\n \tat->mhdr_off = UINT16_MAX;\n \tat->rx_cpy_pos = pos;\n-\t/*\n-\t * mlx5 PMD hacks indirect action index directly to the action conf.\n-\t * The rte_flow_conv() function copies the content from conf pointer.\n-\t * Need to restore the indirect action index from action conf here.\n-\t */\n \tfor (i = 0; actions->type != RTE_FLOW_ACTION_TYPE_END;\n \t     actions++, masks++, i++) {\n-\t\tif (actions->type == RTE_FLOW_ACTION_TYPE_INDIRECT) {\n+\t\tconst struct rte_flow_action_modify_field *info;\n+\n+\t\tswitch (actions->type) {\n+\t\t/*\n+\t\t * mlx5 PMD hacks indirect action index directly to the action conf.\n+\t\t * The rte_flow_conv() function copies the content from conf pointer.\n+\t\t * Need to restore the indirect action index from action conf here.\n+\t\t */\n+\t\tcase RTE_FLOW_ACTION_TYPE_INDIRECT:\n \t\t\tat->actions[i].conf = actions->conf;\n \t\t\tat->masks[i].conf = masks->conf;\n-\t\t}\n-\t\tif (actions->type == RTE_FLOW_ACTION_TYPE_MODIFY_FIELD) {\n-\t\t\tconst struct rte_flow_action_modify_field *info = actions->conf;\n-\n+\t\t\tbreak;\n+\t\tcase RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:\n+\t\t\tinfo = actions->conf;\n \t\t\tif ((info->dst.field == RTE_FLOW_FIELD_FLEX_ITEM &&\n \t\t\t     flow_hw_flex_item_acquire(dev, info->dst.flex_handle,\n \t\t\t\t\t\t       &at->flex_item)) ||\n-\t\t\t     (info->src.field == RTE_FLOW_FIELD_FLEX_ITEM &&\n-\t\t\t      flow_hw_flex_item_acquire(dev, info->src.flex_handle,\n-\t\t\t\t\t\t\t&at->flex_item))) {\n-\t\t\t\trte_flow_error_set(error, rte_errno,\n-\t\t\t\t\t\t   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,\n-\t\t\t\t\t\t   \"Failed to acquire flex item\");\n+\t\t\t    (info->src.field == RTE_FLOW_FIELD_FLEX_ITEM &&\n+\t\t\t     flow_hw_flex_item_acquire(dev, info->src.flex_handle,\n+\t\t\t\t\t\t       &at->flex_item)))\n \t\t\t\tgoto error;\n-\t\t\t}\n+\t\t\tbreak;\n+\t\tdefault:\n+\t\t\tbreak;\n \t\t}\n \t}\n \tat->tmpl = flow_hw_dr_actions_template_create(at);\n",
    "prefixes": [
        "v6",
        "07/10"
    ]
}