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{
    "id": 133391,
    "url": "http://patchwork.dpdk.org/api/patches/133391/?format=api",
    "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20231026124347.22477-4-syalavarthi@marvell.com/",
    "project": {
        "id": 1,
        "url": "http://patchwork.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20231026124347.22477-4-syalavarthi@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20231026124347.22477-4-syalavarthi@marvell.com",
    "date": "2023-10-26T12:43:12",
    "name": "[v9,03/34] ml/cnxk: add generic model and layer structures",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "f21620efea932b69cb69a7a6677f456a2da6bf2b",
    "submitter": {
        "id": 2480,
        "url": "http://patchwork.dpdk.org/api/people/2480/?format=api",
        "name": "Srikanth Yalavarthi",
        "email": "syalavarthi@marvell.com"
    },
    "delegate": {
        "id": 310,
        "url": "http://patchwork.dpdk.org/api/users/310/?format=api",
        "username": "jerin",
        "first_name": "Jerin",
        "last_name": "Jacob",
        "email": "jerinj@marvell.com"
    },
    "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20231026124347.22477-4-syalavarthi@marvell.com/mbox/",
    "series": [
        {
            "id": 30002,
            "url": "http://patchwork.dpdk.org/api/series/30002/?format=api",
            "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=30002",
            "date": "2023-10-26T12:43:09",
            "name": "Implementation of revised ml/cnxk driver",
            "version": 9,
            "mbox": "http://patchwork.dpdk.org/series/30002/mbox/"
        }
    ],
    "comments": "http://patchwork.dpdk.org/api/patches/133391/comments/",
    "check": "success",
    "checks": "http://patchwork.dpdk.org/api/patches/133391/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
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        ],
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        "From": "Srikanth Yalavarthi <syalavarthi@marvell.com>",
        "To": "Srikanth Yalavarthi <syalavarthi@marvell.com>",
        "CC": "<dev@dpdk.org>, <sshankarnara@marvell.com>, <aprabhu@marvell.com>,\n <ptakkar@marvell.com>",
        "Subject": "[PATCH v9 03/34] ml/cnxk: add generic model and layer structures",
        "Date": "Thu, 26 Oct 2023 05:43:12 -0700",
        "Message-ID": "<20231026124347.22477-4-syalavarthi@marvell.com>",
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        "References": "<20230830155927.3566-1-syalavarthi@marvell.com>\n <20231026124347.22477-1-syalavarthi@marvell.com>",
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    },
    "content": "Introduce generic cnxk model and layer structure. These\nstructures would enable supporting models with multiple\nlayers. A model is a collection of multiple independent\nlayers with flow dependencies between the layers.\n\nSigned-off-by: Srikanth Yalavarthi <syalavarthi@marvell.com>\n---\n drivers/ml/cnxk/cn10k_ml_dev.h   |   9 +-\n drivers/ml/cnxk/cn10k_ml_model.c | 247 ++++++++--------\n drivers/ml/cnxk/cn10k_ml_model.h | 122 ++------\n drivers/ml/cnxk/cn10k_ml_ocm.c   |  50 ++--\n drivers/ml/cnxk/cn10k_ml_ocm.h   |   9 +-\n drivers/ml/cnxk/cn10k_ml_ops.c   | 488 +++++++++++++++++--------------\n drivers/ml/cnxk/cnxk_ml_io.h     |  79 +++++\n drivers/ml/cnxk/cnxk_ml_model.c  |   7 +\n drivers/ml/cnxk/cnxk_ml_model.h  | 111 +++++++\n drivers/ml/cnxk/meson.build      |   1 +\n 10 files changed, 653 insertions(+), 470 deletions(-)\n create mode 100644 drivers/ml/cnxk/cnxk_ml_io.h\n create mode 100644 drivers/ml/cnxk/cnxk_ml_model.c\n create mode 100644 drivers/ml/cnxk/cnxk_ml_model.h",
    "diff": "diff --git a/drivers/ml/cnxk/cn10k_ml_dev.h b/drivers/ml/cnxk/cn10k_ml_dev.h\nindex f9da1548c4..99ff0a344a 100644\n--- a/drivers/ml/cnxk/cn10k_ml_dev.h\n+++ b/drivers/ml/cnxk/cn10k_ml_dev.h\n@@ -9,6 +9,8 @@\n \n #include \"cn10k_ml_ocm.h\"\n \n+#include \"cnxk_ml_io.h\"\n+\n /* Dummy Device ops */\n extern struct rte_ml_dev_ops ml_dev_dummy_ops;\n \n@@ -21,9 +23,6 @@ extern struct rte_ml_dev_ops ml_dev_dummy_ops;\n /* Device alignment size */\n #define ML_CN10K_ALIGN_SIZE 128\n \n-/* Maximum number of models per device */\n-#define ML_CN10K_MAX_MODELS 16\n-\n /* Maximum number of queue-pairs per device, spinlock version */\n #define ML_CN10K_MAX_QP_PER_DEVICE_SL 16\n \n@@ -455,8 +454,8 @@ struct cn10k_ml_xstats {\n \tstruct cn10k_ml_xstats_entry *entries;\n \n \t/* Store num stats and offset of the stats for each model */\n-\tuint16_t count_per_model[ML_CN10K_MAX_MODELS];\n-\tuint16_t offset_for_model[ML_CN10K_MAX_MODELS];\n+\tuint16_t count_per_model[ML_CNXK_MAX_MODELS];\n+\tuint16_t offset_for_model[ML_CNXK_MAX_MODELS];\n \tuint16_t count_mode_device;\n \tuint16_t count_mode_model;\n \tuint16_t count;\ndiff --git a/drivers/ml/cnxk/cn10k_ml_model.c b/drivers/ml/cnxk/cn10k_ml_model.c\nindex cc46ca2efd..d033d6deff 100644\n--- a/drivers/ml/cnxk/cn10k_ml_model.c\n+++ b/drivers/ml/cnxk/cn10k_ml_model.c\n@@ -6,10 +6,10 @@\n \n #include <mldev_utils.h>\n \n-#include \"cn10k_ml_model.h\"\n #include \"cn10k_ml_ocm.h\"\n \n #include \"cnxk_ml_dev.h\"\n+#include \"cnxk_ml_model.h\"\n \n static enum rte_ml_io_type\n cn10k_ml_io_type_map(uint8_t type)\n@@ -311,19 +311,17 @@ cn10k_ml_model_metadata_update(struct cn10k_ml_model_metadata *metadata)\n }\n \n void\n-cn10k_ml_model_addr_update(struct cn10k_ml_model *model, uint8_t *buffer, uint8_t *base_dma_addr)\n+cn10k_ml_layer_addr_update(struct cnxk_ml_layer *layer, uint8_t *buffer, uint8_t *base_dma_addr)\n {\n \tstruct cn10k_ml_model_metadata *metadata;\n-\tstruct cn10k_ml_model_addr *addr;\n+\tstruct cn10k_ml_layer_addr *addr;\n \tsize_t model_data_size;\n \tuint8_t *dma_addr_load;\n \tuint8_t *dma_addr_run;\n-\tuint8_t i;\n-\tuint8_t j;\n \tint fpos;\n \n-\tmetadata = &model->metadata;\n-\taddr = &model->addr;\n+\tmetadata = &layer->glow.metadata;\n+\taddr = &layer->glow.addr;\n \tmodel_data_size = metadata->init_model.file_size + metadata->main_model.file_size +\n \t\t\t  metadata->finish_model.file_size + metadata->weights_bias.file_size;\n \n@@ -361,102 +359,138 @@ cn10k_ml_model_addr_update(struct cn10k_ml_model *model, uint8_t *buffer, uint8_\n \taddr->wb_base_addr = PLT_PTR_SUB(dma_addr_load, metadata->weights_bias.mem_offset);\n \taddr->wb_load_addr = PLT_PTR_ADD(addr->wb_base_addr, metadata->weights_bias.mem_offset);\n \trte_memcpy(addr->wb_load_addr, PLT_PTR_ADD(buffer, fpos), metadata->weights_bias.file_size);\n+}\n+\n+void\n+cn10k_ml_layer_info_update(struct cnxk_ml_layer *layer)\n+{\n+\tstruct cn10k_ml_model_metadata *metadata;\n+\tuint8_t i;\n+\tuint8_t j;\n+\n+\tmetadata = &layer->glow.metadata;\n \n \t/* Inputs */\n-\taddr->total_input_sz_d = 0;\n-\taddr->total_input_sz_q = 0;\n+\tlayer->info.nb_inputs = metadata->model.num_input;\n+\tlayer->info.total_input_sz_d = 0;\n+\tlayer->info.total_input_sz_q = 0;\n \tfor (i = 0; i < metadata->model.num_input; i++) {\n \t\tif (i < MRVL_ML_NUM_INPUT_OUTPUT_1) {\n-\t\t\taddr->input[i].nb_dims = 4;\n-\t\t\taddr->input[i].shape[0] = metadata->input1[i].shape.w;\n-\t\t\taddr->input[i].shape[1] = metadata->input1[i].shape.x;\n-\t\t\taddr->input[i].shape[2] = metadata->input1[i].shape.y;\n-\t\t\taddr->input[i].shape[3] = metadata->input1[i].shape.z;\n-\n-\t\t\taddr->input[i].nb_elements =\n+\t\t\trte_strscpy(layer->info.input[i].name,\n+\t\t\t\t    (char *)metadata->input1[i].input_name, MRVL_ML_INPUT_NAME_LEN);\n+\t\t\tlayer->info.input[i].dtype = metadata->input1[i].input_type;\n+\t\t\tlayer->info.input[i].qtype = metadata->input1[i].model_input_type;\n+\t\t\tlayer->info.input[i].nb_dims = 4;\n+\t\t\tlayer->info.input[i].shape[0] = metadata->input1[i].shape.w;\n+\t\t\tlayer->info.input[i].shape[1] = metadata->input1[i].shape.x;\n+\t\t\tlayer->info.input[i].shape[2] = metadata->input1[i].shape.y;\n+\t\t\tlayer->info.input[i].shape[3] = metadata->input1[i].shape.z;\n+\t\t\tlayer->info.input[i].nb_elements =\n \t\t\t\tmetadata->input1[i].shape.w * metadata->input1[i].shape.x *\n \t\t\t\tmetadata->input1[i].shape.y * metadata->input1[i].shape.z;\n-\t\t\taddr->input[i].sz_d =\n-\t\t\t\taddr->input[i].nb_elements *\n+\t\t\tlayer->info.input[i].sz_d =\n+\t\t\t\tlayer->info.input[i].nb_elements *\n \t\t\t\trte_ml_io_type_size_get(metadata->input1[i].input_type);\n-\t\t\taddr->input[i].sz_q =\n-\t\t\t\taddr->input[i].nb_elements *\n+\t\t\tlayer->info.input[i].sz_q =\n+\t\t\t\tlayer->info.input[i].nb_elements *\n \t\t\t\trte_ml_io_type_size_get(metadata->input1[i].model_input_type);\n-\t\t\taddr->total_input_sz_d += addr->input[i].sz_d;\n-\t\t\taddr->total_input_sz_q += addr->input[i].sz_q;\n+\t\t\tlayer->info.input[i].scale = metadata->input1[i].qscale;\n+\n+\t\t\tlayer->info.total_input_sz_d += layer->info.input[i].sz_d;\n+\t\t\tlayer->info.total_input_sz_q += layer->info.input[i].sz_q;\n \n \t\t\tplt_ml_dbg(\n-\t\t\t\t\"model_id = %u, input[%u] - w:%u x:%u y:%u z:%u, sz_d = %u sz_q = %u\",\n-\t\t\t\tmodel->model_id, i, metadata->input1[i].shape.w,\n+\t\t\t\t\"index = %u, input1[%u] - w:%u x:%u y:%u z:%u, sz_d = %u sz_q = %u\",\n+\t\t\t\tlayer->index, i, metadata->input1[i].shape.w,\n \t\t\t\tmetadata->input1[i].shape.x, metadata->input1[i].shape.y,\n-\t\t\t\tmetadata->input1[i].shape.z, addr->input[i].sz_d,\n-\t\t\t\taddr->input[i].sz_q);\n+\t\t\t\tmetadata->input1[i].shape.z, layer->info.input[i].sz_d,\n+\t\t\t\tlayer->info.input[i].sz_q);\n \t\t} else {\n \t\t\tj = i - MRVL_ML_NUM_INPUT_OUTPUT_1;\n \n-\t\t\taddr->input[i].nb_dims = 4;\n-\t\t\taddr->input[i].shape[0] = metadata->input2[j].shape.w;\n-\t\t\taddr->input[i].shape[1] = metadata->input2[j].shape.x;\n-\t\t\taddr->input[i].shape[2] = metadata->input2[j].shape.y;\n-\t\t\taddr->input[i].shape[3] = metadata->input2[j].shape.z;\n-\n-\t\t\taddr->input[i].nb_elements =\n+\t\t\trte_strscpy(layer->info.input[i].name,\n+\t\t\t\t    (char *)metadata->input2[j].input_name, MRVL_ML_INPUT_NAME_LEN);\n+\t\t\tlayer->info.input[i].dtype = metadata->input2[j].input_type;\n+\t\t\tlayer->info.input[i].qtype = metadata->input2[j].model_input_type;\n+\t\t\tlayer->info.input[i].nb_dims = 4;\n+\t\t\tlayer->info.input[i].shape[0] = metadata->input2[j].shape.w;\n+\t\t\tlayer->info.input[i].shape[1] = metadata->input2[j].shape.x;\n+\t\t\tlayer->info.input[i].shape[2] = metadata->input2[j].shape.y;\n+\t\t\tlayer->info.input[i].shape[3] = metadata->input2[j].shape.z;\n+\t\t\tlayer->info.input[i].nb_elements =\n \t\t\t\tmetadata->input2[j].shape.w * metadata->input2[j].shape.x *\n \t\t\t\tmetadata->input2[j].shape.y * metadata->input2[j].shape.z;\n-\t\t\taddr->input[i].sz_d =\n-\t\t\t\taddr->input[i].nb_elements *\n+\t\t\tlayer->info.input[i].sz_d =\n+\t\t\t\tlayer->info.input[i].nb_elements *\n \t\t\t\trte_ml_io_type_size_get(metadata->input2[j].input_type);\n-\t\t\taddr->input[i].sz_q =\n-\t\t\t\taddr->input[i].nb_elements *\n+\t\t\tlayer->info.input[i].sz_q =\n+\t\t\t\tlayer->info.input[i].nb_elements *\n \t\t\t\trte_ml_io_type_size_get(metadata->input2[j].model_input_type);\n-\t\t\taddr->total_input_sz_d += addr->input[i].sz_d;\n-\t\t\taddr->total_input_sz_q += addr->input[i].sz_q;\n+\t\t\tlayer->info.input[i].scale = metadata->input2[j].qscale;\n+\n+\t\t\tlayer->info.total_input_sz_d += layer->info.input[i].sz_d;\n+\t\t\tlayer->info.total_input_sz_q += layer->info.input[i].sz_q;\n \n \t\t\tplt_ml_dbg(\n-\t\t\t\t\"model_id = %u, input2[%u] - w:%u x:%u y:%u z:%u, sz_d = %u sz_q = %u\",\n-\t\t\t\tmodel->model_id, j, metadata->input2[j].shape.w,\n+\t\t\t\t\"index = %u, input2[%u] - w:%u x:%u y:%u z:%u, sz_d = %u sz_q = %u\",\n+\t\t\t\tlayer->index, j, metadata->input2[j].shape.w,\n \t\t\t\tmetadata->input2[j].shape.x, metadata->input2[j].shape.y,\n-\t\t\t\tmetadata->input2[j].shape.z, addr->input[i].sz_d,\n-\t\t\t\taddr->input[i].sz_q);\n+\t\t\t\tmetadata->input2[j].shape.z, layer->info.input[i].sz_d,\n+\t\t\t\tlayer->info.input[i].sz_q);\n \t\t}\n \t}\n \n \t/* Outputs */\n-\taddr->total_output_sz_q = 0;\n-\taddr->total_output_sz_d = 0;\n+\tlayer->info.nb_outputs = metadata->model.num_output;\n+\tlayer->info.total_output_sz_q = 0;\n+\tlayer->info.total_output_sz_d = 0;\n \tfor (i = 0; i < metadata->model.num_output; i++) {\n \t\tif (i < MRVL_ML_NUM_INPUT_OUTPUT_1) {\n-\t\t\taddr->output[i].nb_dims = 1;\n-\t\t\taddr->output[i].shape[0] = metadata->output1[i].size;\n-\t\t\taddr->output[i].nb_elements = metadata->output1[i].size;\n-\t\t\taddr->output[i].sz_d =\n-\t\t\t\taddr->output[i].nb_elements *\n+\t\t\trte_strscpy(layer->info.output[i].name,\n+\t\t\t\t    (char *)metadata->output1[i].output_name,\n+\t\t\t\t    MRVL_ML_OUTPUT_NAME_LEN);\n+\t\t\tlayer->info.output[i].dtype = metadata->output1[i].output_type;\n+\t\t\tlayer->info.output[i].qtype = metadata->output1[i].model_output_type;\n+\t\t\tlayer->info.output[i].nb_dims = 1;\n+\t\t\tlayer->info.output[i].shape[0] = metadata->output1[i].size;\n+\t\t\tlayer->info.output[i].nb_elements = metadata->output1[i].size;\n+\t\t\tlayer->info.output[i].sz_d =\n+\t\t\t\tlayer->info.output[i].nb_elements *\n \t\t\t\trte_ml_io_type_size_get(metadata->output1[i].output_type);\n-\t\t\taddr->output[i].sz_q =\n-\t\t\t\taddr->output[i].nb_elements *\n+\t\t\tlayer->info.output[i].sz_q =\n+\t\t\t\tlayer->info.output[i].nb_elements *\n \t\t\t\trte_ml_io_type_size_get(metadata->output1[i].model_output_type);\n-\t\t\taddr->total_output_sz_q += addr->output[i].sz_q;\n-\t\t\taddr->total_output_sz_d += addr->output[i].sz_d;\n+\t\t\tlayer->info.output[i].scale = metadata->output1[i].dscale;\n \n-\t\t\tplt_ml_dbg(\"model_id = %u, output[%u] - sz_d = %u, sz_q = %u\",\n-\t\t\t\t   model->model_id, i, addr->output[i].sz_d, addr->output[i].sz_q);\n+\t\t\tlayer->info.total_output_sz_q += layer->info.output[i].sz_q;\n+\t\t\tlayer->info.total_output_sz_d += layer->info.output[i].sz_d;\n+\n+\t\t\tplt_ml_dbg(\"index = %u, output1[%u] - sz_d = %u, sz_q = %u\", layer->index,\n+\t\t\t\t   i, layer->info.output[i].sz_d, layer->info.output[i].sz_q);\n \t\t} else {\n \t\t\tj = i - MRVL_ML_NUM_INPUT_OUTPUT_1;\n \n-\t\t\taddr->output[i].nb_dims = 1;\n-\t\t\taddr->output[i].shape[0] = metadata->output2[j].size;\n-\t\t\taddr->output[i].nb_elements = metadata->output2[j].size;\n-\t\t\taddr->output[i].sz_d =\n-\t\t\t\taddr->output[i].nb_elements *\n+\t\t\trte_strscpy(layer->info.output[i].name,\n+\t\t\t\t    (char *)metadata->output2[j].output_name,\n+\t\t\t\t    MRVL_ML_OUTPUT_NAME_LEN);\n+\t\t\tlayer->info.output[i].dtype = metadata->output2[j].output_type;\n+\t\t\tlayer->info.output[i].qtype = metadata->output2[j].model_output_type;\n+\t\t\tlayer->info.output[i].nb_dims = 1;\n+\t\t\tlayer->info.output[i].shape[0] = metadata->output2[j].size;\n+\t\t\tlayer->info.output[i].nb_elements = metadata->output2[j].size;\n+\t\t\tlayer->info.output[i].sz_d =\n+\t\t\t\tlayer->info.output[i].nb_elements *\n \t\t\t\trte_ml_io_type_size_get(metadata->output2[j].output_type);\n-\t\t\taddr->output[i].sz_q =\n-\t\t\t\taddr->output[i].nb_elements *\n+\t\t\tlayer->info.output[i].sz_q =\n+\t\t\t\tlayer->info.output[i].nb_elements *\n \t\t\t\trte_ml_io_type_size_get(metadata->output2[j].model_output_type);\n-\t\t\taddr->total_output_sz_q += addr->output[i].sz_q;\n-\t\t\taddr->total_output_sz_d += addr->output[i].sz_d;\n+\t\t\tlayer->info.output[i].scale = metadata->output2[j].dscale;\n+\n+\t\t\tlayer->info.total_output_sz_q += layer->info.output[i].sz_q;\n+\t\t\tlayer->info.total_output_sz_d += layer->info.output[i].sz_d;\n \n-\t\t\tplt_ml_dbg(\"model_id = %u, output2[%u] - sz_d = %u, sz_q = %u\",\n-\t\t\t\t   model->model_id, j, addr->output[i].sz_d, addr->output[i].sz_q);\n+\t\t\tplt_ml_dbg(\"index = %u, output2[%u] - sz_d = %u, sz_q = %u\", layer->index,\n+\t\t\t\t   j, layer->info.output[i].sz_d, layer->info.output[i].sz_q);\n \t\t}\n \t}\n }\n@@ -514,23 +548,23 @@ cn10k_ml_model_ocm_pages_count(struct cn10k_ml_dev *cn10k_mldev, uint16_t model_\n }\n \n void\n-cn10k_ml_model_info_set(struct rte_ml_dev *dev, struct cn10k_ml_model *model)\n+cn10k_ml_model_info_set(struct rte_ml_dev *dev, struct cnxk_ml_model *model)\n {\n \tstruct cn10k_ml_model_metadata *metadata;\n-\tstruct cn10k_ml_model_addr *addr;\n+\tstruct cn10k_ml_dev *cn10k_mldev;\n+\tstruct cnxk_ml_dev *cnxk_mldev;\n \tstruct rte_ml_model_info *info;\n \tstruct rte_ml_io_info *output;\n \tstruct rte_ml_io_info *input;\n-\tstruct cn10k_ml_dev *mldev;\n+\tstruct cnxk_ml_layer *layer;\n \tuint8_t i;\n-\tuint8_t j;\n \n-\tmldev = dev->data->dev_private;\n-\tmetadata = &model->metadata;\n+\tcnxk_mldev = dev->data->dev_private;\n+\tcn10k_mldev = &cnxk_mldev->cn10k_mldev;\n+\tmetadata = &model->glow.metadata;\n \tinfo = PLT_PTR_CAST(model->info);\n \tinput = PLT_PTR_ADD(info, sizeof(struct rte_ml_model_info));\n \toutput = PLT_PTR_ADD(input, metadata->model.num_input * sizeof(struct rte_ml_io_info));\n-\taddr = &model->addr;\n \n \t/* Set model info */\n \tmemset(info, 0, sizeof(struct rte_ml_model_info));\n@@ -542,7 +576,8 @@ cn10k_ml_model_info_set(struct rte_ml_dev *dev, struct cn10k_ml_model *model)\n \tinfo->device_id = dev->data->dev_id;\n \tinfo->io_layout = RTE_ML_IO_LAYOUT_PACKED;\n \tinfo->min_batches = model->batch_size;\n-\tinfo->max_batches = mldev->fw.req->jd.fw_load.cap.s.max_num_batches / model->batch_size;\n+\tinfo->max_batches =\n+\t\tcn10k_mldev->fw.req->jd.fw_load.cap.s.max_num_batches / model->batch_size;\n \tinfo->nb_inputs = metadata->model.num_input;\n \tinfo->input_info = input;\n \tinfo->nb_outputs = metadata->model.num_output;\n@@ -550,56 +585,26 @@ cn10k_ml_model_info_set(struct rte_ml_dev *dev, struct cn10k_ml_model *model)\n \tinfo->wb_size = metadata->weights_bias.file_size;\n \n \t/* Set input info */\n+\tlayer = &model->layer[0];\n \tfor (i = 0; i < info->nb_inputs; i++) {\n-\t\tif (i < MRVL_ML_NUM_INPUT_OUTPUT_1) {\n-\t\t\trte_memcpy(input[i].name, metadata->input1[i].input_name,\n-\t\t\t\t   MRVL_ML_INPUT_NAME_LEN);\n-\t\t\tinput[i].nb_dims = addr->input[i].nb_dims;\n-\t\t\tinput[i].shape = addr->input[i].shape;\n-\t\t\tinput[i].type = metadata->input1[i].model_input_type;\n-\t\t\tinput[i].nb_elements = addr->input[i].nb_elements;\n-\t\t\tinput[i].size =\n-\t\t\t\taddr->input[i].nb_elements *\n-\t\t\t\trte_ml_io_type_size_get(metadata->input1[i].model_input_type);\n-\t\t} else {\n-\t\t\tj = i - MRVL_ML_NUM_INPUT_OUTPUT_1;\n-\n-\t\t\trte_memcpy(input[i].name, metadata->input2[j].input_name,\n-\t\t\t\t   MRVL_ML_INPUT_NAME_LEN);\n-\t\t\tinput[i].nb_dims = addr->input[i].nb_dims;\n-\t\t\tinput[i].shape = addr->input[i].shape;\n-\t\t\tinput[i].type = metadata->input2[j].model_input_type;\n-\t\t\tinput[i].nb_elements = addr->input[i].nb_elements;\n-\t\t\tinput[i].size =\n-\t\t\t\taddr->input[i].nb_elements *\n-\t\t\t\trte_ml_io_type_size_get(metadata->input2[j].model_input_type);\n-\t\t}\n+\t\trte_memcpy(input[i].name, layer->info.input[i].name, MRVL_ML_INPUT_NAME_LEN);\n+\t\tinput[i].nb_dims = layer->info.input[i].nb_dims;\n+\t\tinput[i].shape = &layer->info.input[i].shape[0];\n+\t\tinput[i].type = layer->info.input[i].qtype;\n+\t\tinput[i].nb_elements = layer->info.input[i].nb_elements;\n+\t\tinput[i].size = layer->info.input[i].nb_elements *\n+\t\t\t\trte_ml_io_type_size_get(layer->info.input[i].qtype);\n \t}\n \n \t/* Set output info */\n+\tlayer = &model->layer[0];\n \tfor (i = 0; i < info->nb_outputs; i++) {\n-\t\tif (i < MRVL_ML_NUM_INPUT_OUTPUT_1) {\n-\t\t\trte_memcpy(output[i].name, metadata->output1[i].output_name,\n-\t\t\t\t   MRVL_ML_OUTPUT_NAME_LEN);\n-\t\t\toutput[i].nb_dims = addr->output[i].nb_dims;\n-\t\t\toutput[i].shape = addr->output[i].shape;\n-\t\t\toutput[i].type = metadata->output1[i].model_output_type;\n-\t\t\toutput[i].nb_elements = addr->output[i].nb_elements;\n-\t\t\toutput[i].size =\n-\t\t\t\taddr->output[i].nb_elements *\n-\t\t\t\trte_ml_io_type_size_get(metadata->output1[i].model_output_type);\n-\t\t} else {\n-\t\t\tj = i - MRVL_ML_NUM_INPUT_OUTPUT_1;\n-\n-\t\t\trte_memcpy(output[i].name, metadata->output2[j].output_name,\n-\t\t\t\t   MRVL_ML_OUTPUT_NAME_LEN);\n-\t\t\toutput[i].nb_dims = addr->output[i].nb_dims;\n-\t\t\toutput[i].shape = addr->output[i].shape;\n-\t\t\toutput[i].type = metadata->output2[j].model_output_type;\n-\t\t\toutput[i].nb_elements = addr->output[i].nb_elements;\n-\t\t\toutput[i].size =\n-\t\t\t\taddr->output[i].nb_elements *\n-\t\t\t\trte_ml_io_type_size_get(metadata->output2[j].model_output_type);\n-\t\t}\n+\t\trte_memcpy(output[i].name, layer->info.output[i].name, MRVL_ML_INPUT_NAME_LEN);\n+\t\toutput[i].nb_dims = layer->info.output[i].nb_dims;\n+\t\toutput[i].shape = &layer->info.output[i].shape[0];\n+\t\toutput[i].type = layer->info.output[i].qtype;\n+\t\toutput[i].nb_elements = layer->info.output[i].nb_elements;\n+\t\toutput[i].size = layer->info.output[i].nb_elements *\n+\t\t\t\t rte_ml_io_type_size_get(layer->info.output[i].qtype);\n \t}\n }\ndiff --git a/drivers/ml/cnxk/cn10k_ml_model.h b/drivers/ml/cnxk/cn10k_ml_model.h\nindex 3128b28db7..206a369ca7 100644\n--- a/drivers/ml/cnxk/cn10k_ml_model.h\n+++ b/drivers/ml/cnxk/cn10k_ml_model.h\n@@ -13,15 +13,8 @@\n #include \"cn10k_ml_ocm.h\"\n #include \"cn10k_ml_ops.h\"\n \n-struct cnxk_ml_dev;\n-\n-/* Model state */\n-enum cn10k_ml_model_state {\n-\tML_CN10K_MODEL_STATE_LOADED,\n-\tML_CN10K_MODEL_STATE_JOB_ACTIVE,\n-\tML_CN10K_MODEL_STATE_STARTED,\n-\tML_CN10K_MODEL_STATE_UNKNOWN,\n-};\n+struct cnxk_ml_model;\n+struct cnxk_ml_layer;\n \n /* Model Metadata : v 2.3.0.1 */\n #define MRVL_ML_MODEL_MAGIC_STRING \"MRVL\"\n@@ -369,7 +362,7 @@ struct cn10k_ml_model_metadata {\n };\n \n /* Model address structure */\n-struct cn10k_ml_model_addr {\n+struct cn10k_ml_layer_addr {\n \t/* Base DMA address for load */\n \tvoid *base_dma_addr_load;\n \n@@ -408,58 +401,10 @@ struct cn10k_ml_model_addr {\n \n \t/* End tile */\n \tuint8_t tile_end;\n-\n-\t/* Input address and size */\n-\tstruct {\n-\t\t/* Number of dimensions in shape */\n-\t\tuint32_t nb_dims;\n-\n-\t\t/* Shape of input */\n-\t\tuint32_t shape[4];\n-\n-\t\t/* Number of elements */\n-\t\tuint32_t nb_elements;\n-\n-\t\t/* Dequantized input size */\n-\t\tuint32_t sz_d;\n-\n-\t\t/* Quantized input size */\n-\t\tuint32_t sz_q;\n-\t} input[MRVL_ML_NUM_INPUT_OUTPUT];\n-\n-\t/* Output address and size */\n-\tstruct {\n-\t\t/* Number of dimensions in shape */\n-\t\tuint32_t nb_dims;\n-\n-\t\t/* Shape of input */\n-\t\tuint32_t shape[4];\n-\n-\t\t/* Number of elements */\n-\t\tuint32_t nb_elements;\n-\n-\t\t/* Dequantize output size */\n-\t\tuint32_t sz_d;\n-\n-\t\t/* Quantized output size */\n-\t\tuint32_t sz_q;\n-\t} output[MRVL_ML_NUM_INPUT_OUTPUT];\n-\n-\t/* Total size of quantized input */\n-\tuint32_t total_input_sz_q;\n-\n-\t/* Total size of dequantized input */\n-\tuint32_t total_input_sz_d;\n-\n-\t/* Total size of quantized output */\n-\tuint32_t total_output_sz_q;\n-\n-\t/* Total size of dequantized output */\n-\tuint32_t total_output_sz_d;\n };\n \n /* Model fast-path stats */\n-struct cn10k_ml_model_stats {\n+struct cn10k_ml_layer_stats {\n \t/* Total hardware latency, sum of all inferences */\n \tuint64_t hw_latency_tot;\n \n@@ -488,59 +433,38 @@ struct cn10k_ml_model_stats {\n \tuint64_t fw_reset_count;\n };\n \n-/* Model Object */\n-struct cn10k_ml_model {\n-\t/* Device reference */\n-\tstruct cnxk_ml_dev *mldev;\n-\n-\t/* Name */\n-\tchar name[RTE_ML_STR_MAX];\n-\n-\t/* ID */\n-\tuint16_t model_id;\n-\n-\t/* Batch size */\n-\tuint32_t batch_size;\n-\n-\t/* Metadata */\n+struct cn10k_ml_layer_data {\n+\t/* Model / Layer: metadata */\n \tstruct cn10k_ml_model_metadata metadata;\n \n-\t/* Address structure */\n-\tstruct cn10k_ml_model_addr addr;\n+\t/* Layer: address structure */\n+\tstruct cn10k_ml_layer_addr addr;\n \n-\t/* Tile and memory information object */\n-\tstruct cn10k_ml_ocm_model_map model_mem_map;\n+\t/* Layer: Tile and memory information object */\n+\tstruct cn10k_ml_ocm_layer_map ocm_map;\n \n-\t/* Internal model information structure\n-\t * Size of the buffer = sizeof(struct rte_ml_model_info)\n-\t *                    + num_inputs * sizeof(struct rte_ml_io_info)\n-\t *                    + num_outputs * sizeof(struct rte_ml_io_info).\n-\t * Structures would be arranged in the same order in the buffer.\n-\t */\n-\tuint8_t *info;\n-\n-\t/* Spinlock, used to update model state */\n-\tplt_spinlock_t lock;\n-\n-\t/* State */\n-\tenum cn10k_ml_model_state state;\n-\n-\t/* Slow-path operations request pointer */\n+\t/* Layer: Slow-path operations request pointer */\n \tstruct cn10k_ml_req *req;\n \n-\t/* Stats for burst ops */\n-\tstruct cn10k_ml_model_stats *burst_stats;\n+\t/* Layer: Stats for burst ops */\n+\tstruct cn10k_ml_layer_stats *burst_stats;\n \n-\t/* Stats for sync ops */\n-\tstruct cn10k_ml_model_stats *sync_stats;\n+\t/* Layer: Stats for sync ops */\n+\tstruct cn10k_ml_layer_stats *sync_stats;\n+};\n+\n+struct cn10k_ml_model_data {\n+\t/* Model / Layer: metadata */\n+\tstruct cn10k_ml_model_metadata metadata;\n };\n \n int cn10k_ml_model_metadata_check(uint8_t *buffer, uint64_t size);\n void cn10k_ml_model_metadata_update(struct cn10k_ml_model_metadata *metadata);\n-void cn10k_ml_model_addr_update(struct cn10k_ml_model *model, uint8_t *buffer,\n+void cn10k_ml_layer_addr_update(struct cnxk_ml_layer *layer, uint8_t *buffer,\n \t\t\t\tuint8_t *base_dma_addr);\n+void cn10k_ml_layer_info_update(struct cnxk_ml_layer *layer);\n int cn10k_ml_model_ocm_pages_count(struct cn10k_ml_dev *cn10k_mldev, uint16_t model_id,\n \t\t\t\t   uint8_t *buffer, uint16_t *wb_pages, uint16_t *scratch_pages);\n-void cn10k_ml_model_info_set(struct rte_ml_dev *dev, struct cn10k_ml_model *model);\n+void cn10k_ml_model_info_set(struct rte_ml_dev *dev, struct cnxk_ml_model *model);\n \n #endif /* _CN10K_ML_MODEL_H_ */\ndiff --git a/drivers/ml/cnxk/cn10k_ml_ocm.c b/drivers/ml/cnxk/cn10k_ml_ocm.c\nindex 8094a0fab1..d71c36eae6 100644\n--- a/drivers/ml/cnxk/cn10k_ml_ocm.c\n+++ b/drivers/ml/cnxk/cn10k_ml_ocm.c\n@@ -6,10 +6,10 @@\n \n #include <roc_api.h>\n \n-#include \"cn10k_ml_model.h\"\n #include \"cn10k_ml_ocm.h\"\n \n #include \"cnxk_ml_dev.h\"\n+#include \"cnxk_ml_model.h\"\n \n /* OCM macros */\n #define BYTE_LEN\t   8\n@@ -333,12 +333,14 @@ cn10k_ml_ocm_tilemask_find(struct rte_ml_dev *dev, uint8_t num_tiles, uint16_t w\n }\n \n void\n-cn10k_ml_ocm_reserve_pages(struct rte_ml_dev *dev, uint16_t model_id, uint64_t tilemask,\n-\t\t\t   int wb_page_start, uint16_t wb_pages, uint16_t scratch_pages)\n+cn10k_ml_ocm_reserve_pages(struct rte_ml_dev *dev, uint16_t model_id, uint16_t layer_id,\n+\t\t\t   uint64_t tilemask, int wb_page_start, uint16_t wb_pages,\n+\t\t\t   uint16_t scratch_pages)\n {\n \tstruct cn10k_ml_dev *cn10k_mldev;\n \tstruct cnxk_ml_dev *cnxk_mldev;\n-\tstruct cn10k_ml_model *model;\n+\tstruct cnxk_ml_model *model;\n+\tstruct cnxk_ml_layer *layer;\n \tstruct cn10k_ml_ocm *ocm;\n \n \tint scratch_page_start;\n@@ -353,6 +355,7 @@ cn10k_ml_ocm_reserve_pages(struct rte_ml_dev *dev, uint16_t model_id, uint64_t t\n \tcn10k_mldev = &cnxk_mldev->cn10k_mldev;\n \tocm = &cn10k_mldev->ocm;\n \tmodel = dev->data->models[model_id];\n+\tlayer = &model->layer[layer_id];\n \n \t/* Get first set bit, tile_start */\n \ttile_start = 0;\n@@ -382,8 +385,8 @@ cn10k_ml_ocm_reserve_pages(struct rte_ml_dev *dev, uint16_t model_id, uint64_t t\n \t\t\t\tPLT_MAX(ocm->tile_ocm_info[tile_id].last_wb_page, wb_page_end);\n \t}\n \n-\tmodel->addr.tile_start = tile_start;\n-\tmodel->addr.tile_end = tile_end;\n+\tlayer->glow.addr.tile_start = tile_start;\n+\tlayer->glow.addr.tile_end = tile_end;\n \n \tplt_ml_dbg(\"model_id = %u, tilemask = 0x%016lx\", model_id, tilemask);\n \tplt_ml_dbg(\"model_id = %u, wb_page_start = %d, wb_page_end = %d\", model_id, wb_page_start,\n@@ -393,12 +396,14 @@ cn10k_ml_ocm_reserve_pages(struct rte_ml_dev *dev, uint16_t model_id, uint64_t t\n }\n \n void\n-cn10k_ml_ocm_free_pages(struct rte_ml_dev *dev, uint16_t model_id)\n+cn10k_ml_ocm_free_pages(struct rte_ml_dev *dev, uint16_t model_id, uint16_t layer_id)\n {\n-\tstruct cn10k_ml_model *local_model;\n+\tstruct cnxk_ml_model *local_model;\n+\tstruct cnxk_ml_layer *local_layer;\n \tstruct cn10k_ml_dev *cn10k_mldev;\n \tstruct cnxk_ml_dev *cnxk_mldev;\n-\tstruct cn10k_ml_model *model;\n+\tstruct cnxk_ml_model *model;\n+\tstruct cnxk_ml_layer *layer;\n \tstruct cn10k_ml_ocm *ocm;\n \n \tint scratch_resize_pages;\n@@ -409,16 +414,19 @@ cn10k_ml_ocm_free_pages(struct rte_ml_dev *dev, uint16_t model_id)\n \tint tile_id;\n \tint page_id;\n \tuint16_t i;\n+\tuint16_t j;\n \n \tcnxk_mldev = dev->data->dev_private;\n \tcn10k_mldev = &cnxk_mldev->cn10k_mldev;\n \tocm = &cn10k_mldev->ocm;\n \tmodel = dev->data->models[model_id];\n+\tlayer = &model->layer[layer_id];\n \n \t/* Update OCM info for WB memory */\n-\twb_page_start = model->model_mem_map.wb_page_start;\n-\twb_page_end = wb_page_start + model->model_mem_map.wb_pages - 1;\n-\tfor (tile_id = model->addr.tile_start; tile_id <= model->addr.tile_end; tile_id++) {\n+\twb_page_start = layer->glow.ocm_map.wb_page_start;\n+\twb_page_end = wb_page_start + layer->glow.ocm_map.wb_pages - 1;\n+\tfor (tile_id = layer->glow.addr.tile_start; tile_id <= layer->glow.addr.tile_end;\n+\t     tile_id++) {\n \t\tfor (page_id = wb_page_start; page_id <= wb_page_end; page_id++) {\n \t\t\tCLEAR_BIT(ocm->tile_ocm_info[tile_id].ocm_mask[page_id / OCM_MAP_WORD_SIZE],\n \t\t\t\t  page_id % OCM_MAP_WORD_SIZE);\n@@ -432,11 +440,19 @@ cn10k_ml_ocm_free_pages(struct rte_ml_dev *dev, uint16_t model_id)\n \t\tscratch_resize_pages = 0;\n \t\tfor (i = 0; i < dev->data->nb_models; i++) {\n \t\t\tlocal_model = dev->data->models[i];\n-\t\t\tif ((i != model_id) && (local_model != NULL)) {\n-\t\t\t\tif (IS_BIT_SET(local_model->model_mem_map.tilemask, tile_id))\n-\t\t\t\t\tscratch_resize_pages = PLT_MAX(\n-\t\t\t\t\t\t(int)local_model->model_mem_map.scratch_pages,\n-\t\t\t\t\t\tscratch_resize_pages);\n+\t\t\tif (local_model == NULL)\n+\t\t\t\tcontinue;\n+\n+\t\t\tfor (j = 0; j < local_model->nb_layers; j++) {\n+\t\t\t\tlocal_layer = &local_model->layer[j];\n+\t\t\t\tif (local_layer != layer &&\n+\t\t\t\t    local_layer->glow.ocm_map.ocm_reserved) {\n+\t\t\t\t\tif (IS_BIT_SET(local_layer->glow.ocm_map.tilemask, tile_id))\n+\t\t\t\t\t\tscratch_resize_pages =\n+\t\t\t\t\t\t\tPLT_MAX((int)local_layer->glow.ocm_map\n+\t\t\t\t\t\t\t\t\t.scratch_pages,\n+\t\t\t\t\t\t\t\tscratch_resize_pages);\n+\t\t\t\t}\n \t\t\t}\n \t\t}\n \ndiff --git a/drivers/ml/cnxk/cn10k_ml_ocm.h b/drivers/ml/cnxk/cn10k_ml_ocm.h\nindex 3404e7fd65..720f8caf76 100644\n--- a/drivers/ml/cnxk/cn10k_ml_ocm.h\n+++ b/drivers/ml/cnxk/cn10k_ml_ocm.h\n@@ -27,7 +27,7 @@ struct cn10k_ml_ocm_tile_info {\n };\n \n /* Model OCM map structure */\n-struct cn10k_ml_ocm_model_map {\n+struct cn10k_ml_ocm_layer_map {\n \t/* Status of OCM reservation */\n \tbool ocm_reserved;\n \n@@ -77,9 +77,10 @@ struct cn10k_ml_ocm {\n int cn10k_ml_ocm_tilecount(uint64_t tilemask, int *start, int *end);\n int cn10k_ml_ocm_tilemask_find(struct rte_ml_dev *dev, uint8_t num_tiles, uint16_t wb_pages,\n \t\t\t       uint16_t scratch_pages, uint64_t *tilemask);\n-void cn10k_ml_ocm_reserve_pages(struct rte_ml_dev *dev, uint16_t model_id, uint64_t tilemask,\n-\t\t\t\tint wb_page_start, uint16_t wb_pages, uint16_t scratch_pages);\n-void cn10k_ml_ocm_free_pages(struct rte_ml_dev *dev, uint16_t model_id);\n+void cn10k_ml_ocm_reserve_pages(struct rte_ml_dev *dev, uint16_t model_id, uint16_t layer_id,\n+\t\t\t\tuint64_t tilemask, int wb_page_start, uint16_t wb_pages,\n+\t\t\t\tuint16_t scratch_pages);\n+void cn10k_ml_ocm_free_pages(struct rte_ml_dev *dev, uint16_t model_id, uint16_t layer_id);\n void cn10k_ml_ocm_print(struct rte_ml_dev *dev, FILE *fp);\n \n #endif /* _CN10K_ML_OCM_H_ */\ndiff --git a/drivers/ml/cnxk/cn10k_ml_ops.c b/drivers/ml/cnxk/cn10k_ml_ops.c\nindex dc747cf534..b226a9b5a2 100644\n--- a/drivers/ml/cnxk/cn10k_ml_ops.c\n+++ b/drivers/ml/cnxk/cn10k_ml_ops.c\n@@ -7,10 +7,10 @@\n \n #include <mldev_utils.h>\n \n-#include \"cn10k_ml_model.h\"\n #include \"cn10k_ml_ops.h\"\n \n #include \"cnxk_ml_dev.h\"\n+#include \"cnxk_ml_model.h\"\n \n /* ML model macros */\n #define CN10K_ML_MODEL_MEMZONE_NAME \"ml_cn10k_model_mz\"\n@@ -202,7 +202,7 @@ cn10k_ml_model_print(struct rte_ml_dev *dev, uint16_t model_id, FILE *fp)\n {\n \tstruct cn10k_ml_dev *cn10k_mldev;\n \tstruct cnxk_ml_dev *cnxk_mldev;\n-\tstruct cn10k_ml_model *model;\n+\tstruct cnxk_ml_model *model;\n \tstruct cn10k_ml_ocm *ocm;\n \tchar str[STR_LEN];\n \tuint8_t i;\n@@ -215,77 +215,80 @@ cn10k_ml_model_print(struct rte_ml_dev *dev, uint16_t model_id, FILE *fp)\n \n \t/* Print debug info */\n \tprint_line(fp, LINE_LEN);\n-\tfprintf(fp, \" Model Information (%s)\\n\", model->metadata.model.name);\n+\tfprintf(fp, \" Model Information (%s)\\n\", model->glow.metadata.model.name);\n \tprint_line(fp, LINE_LEN);\n-\tfprintf(fp, \"%*s : %s\\n\", FIELD_LEN, \"name\", model->metadata.model.name);\n-\tfprintf(fp, \"%*s : %u.%u.%u.%u\\n\", FIELD_LEN, \"version\", model->metadata.model.version[0],\n-\t\tmodel->metadata.model.version[1], model->metadata.model.version[2],\n-\t\tmodel->metadata.model.version[3]);\n+\tfprintf(fp, \"%*s : %s\\n\", FIELD_LEN, \"name\", model->glow.metadata.model.name);\n+\tfprintf(fp, \"%*s : %u.%u.%u.%u\\n\", FIELD_LEN, \"version\",\n+\t\tmodel->glow.metadata.model.version[0], model->glow.metadata.model.version[1],\n+\t\tmodel->glow.metadata.model.version[2], model->glow.metadata.model.version[3]);\n \tif (strlen(model->name) != 0)\n \t\tfprintf(fp, \"%*s : %s\\n\", FIELD_LEN, \"debug_name\", model->name);\n \tfprintf(fp, \"%*s : 0x%016lx\\n\", FIELD_LEN, \"model\", PLT_U64_CAST(model));\n \tfprintf(fp, \"%*s : %u\\n\", FIELD_LEN, \"model_id\", model->model_id);\n-\tfprintf(fp, \"%*s : %u\\n\", FIELD_LEN, \"batch_size\", model->metadata.model.batch_size);\n-\tfprintf(fp, \"%*s : %u\\n\", FIELD_LEN, \"num_layers\", model->metadata.model.num_layers);\n+\tfprintf(fp, \"%*s : %u\\n\", FIELD_LEN, \"batch_size\", model->glow.metadata.model.batch_size);\n+\tfprintf(fp, \"%*s : %u\\n\", FIELD_LEN, \"num_layers\", model->glow.metadata.model.num_layers);\n \n \t/* Print model state */\n-\tif (model->state == ML_CN10K_MODEL_STATE_LOADED)\n+\tif (model->state == ML_CNXK_MODEL_STATE_LOADED)\n \t\tfprintf(fp, \"%*s : %s\\n\", FIELD_LEN, \"state\", \"loaded\");\n-\tif (model->state == ML_CN10K_MODEL_STATE_JOB_ACTIVE)\n+\tif (model->state == ML_CNXK_MODEL_STATE_JOB_ACTIVE)\n \t\tfprintf(fp, \"%*s : %s\\n\", FIELD_LEN, \"state\", \"job_active\");\n-\tif (model->state == ML_CN10K_MODEL_STATE_STARTED)\n+\tif (model->state == ML_CNXK_MODEL_STATE_STARTED)\n \t\tfprintf(fp, \"%*s : %s\\n\", FIELD_LEN, \"state\", \"started\");\n \n \t/* Print OCM status */\n \tfprintf(fp, \"%*s : %\" PRIu64 \" bytes\\n\", FIELD_LEN, \"wb_size\",\n-\t\tmodel->metadata.model.ocm_wb_range_end - model->metadata.model.ocm_wb_range_start +\n-\t\t\t1);\n-\tfprintf(fp, \"%*s : %u\\n\", FIELD_LEN, \"wb_pages\", model->model_mem_map.wb_pages);\n+\t\tmodel->glow.metadata.model.ocm_wb_range_end -\n+\t\t\tmodel->glow.metadata.model.ocm_wb_range_start + 1);\n+\tfprintf(fp, \"%*s : %u\\n\", FIELD_LEN, \"wb_pages\", model->layer[0].glow.ocm_map.wb_pages);\n \tfprintf(fp, \"%*s : %\" PRIu64 \" bytes\\n\", FIELD_LEN, \"scratch_size\",\n-\t\tocm->size_per_tile - model->metadata.model.ocm_tmp_range_floor);\n-\tfprintf(fp, \"%*s : %u\\n\", FIELD_LEN, \"scratch_pages\", model->model_mem_map.scratch_pages);\n+\t\tocm->size_per_tile - model->glow.metadata.model.ocm_tmp_range_floor);\n+\tfprintf(fp, \"%*s : %u\\n\", FIELD_LEN, \"scratch_pages\",\n+\t\tmodel->layer[0].glow.ocm_map.scratch_pages);\n \tfprintf(fp, \"%*s : %u\\n\", FIELD_LEN, \"num_tiles\",\n-\t\tmodel->metadata.model.tile_end - model->metadata.model.tile_start + 1);\n+\t\tmodel->glow.metadata.model.tile_end - model->glow.metadata.model.tile_start + 1);\n \n-\tif (model->state == ML_CN10K_MODEL_STATE_STARTED) {\n+\tif (model->state == ML_CNXK_MODEL_STATE_STARTED) {\n \t\tfprintf(fp, \"%*s : 0x%0*\" PRIx64 \"\\n\", FIELD_LEN, \"tilemask\",\n-\t\t\tML_CN10K_OCM_NUMTILES / 4, model->model_mem_map.tilemask);\n+\t\t\tML_CN10K_OCM_NUMTILES / 4, model->layer[0].glow.ocm_map.tilemask);\n \t\tfprintf(fp, \"%*s : 0x%\" PRIx64 \"\\n\", FIELD_LEN, \"ocm_wb_start\",\n-\t\t\tmodel->model_mem_map.wb_page_start * cn10k_mldev->ocm.page_size);\n+\t\t\tmodel->layer[0].glow.ocm_map.wb_page_start * cn10k_mldev->ocm.page_size);\n \t}\n \n-\tfprintf(fp, \"%*s : %u\\n\", FIELD_LEN, \"num_inputs\", model->metadata.model.num_input);\n-\tfprintf(fp, \"%*s : %u\\n\", FIELD_LEN, \"num_outputs\", model->metadata.model.num_output);\n+\tfprintf(fp, \"%*s : %u\\n\", FIELD_LEN, \"num_inputs\", model->glow.metadata.model.num_input);\n+\tfprintf(fp, \"%*s : %u\\n\", FIELD_LEN, \"num_outputs\", model->glow.metadata.model.num_output);\n \tfprintf(fp, \"\\n\");\n \n \tprint_line(fp, LINE_LEN);\n \tfprintf(fp, \"%8s  %16s  %12s  %18s  %12s\\n\", \"input\", \"input_name\", \"input_type\",\n \t\t\"model_input_type\", \"quantize\");\n \tprint_line(fp, LINE_LEN);\n-\tfor (i = 0; i < model->metadata.model.num_input; i++) {\n+\tfor (i = 0; i < model->glow.metadata.model.num_input; i++) {\n \t\tif (i < MRVL_ML_NUM_INPUT_OUTPUT_1) {\n \t\t\tfprintf(fp, \"%8u  \", i);\n-\t\t\tfprintf(fp, \"%*s  \", 16, model->metadata.input1[i].input_name);\n-\t\t\trte_ml_io_type_to_str(model->metadata.input1[i].input_type, str, STR_LEN);\n+\t\t\tfprintf(fp, \"%*s  \", 16, model->glow.metadata.input1[i].input_name);\n+\t\t\trte_ml_io_type_to_str(model->glow.metadata.input1[i].input_type, str,\n+\t\t\t\t\t      STR_LEN);\n \t\t\tfprintf(fp, \"%*s  \", 12, str);\n-\t\t\trte_ml_io_type_to_str(model->metadata.input1[i].model_input_type, str,\n+\t\t\trte_ml_io_type_to_str(model->glow.metadata.input1[i].model_input_type, str,\n \t\t\t\t\t      STR_LEN);\n \t\t\tfprintf(fp, \"%*s  \", 18, str);\n \t\t\tfprintf(fp, \"%*s\", 12,\n-\t\t\t\t(model->metadata.input1[i].quantize == 1 ? \"Yes\" : \"No\"));\n+\t\t\t\t(model->glow.metadata.input1[i].quantize == 1 ? \"Yes\" : \"No\"));\n \t\t\tfprintf(fp, \"\\n\");\n \t\t} else {\n \t\t\tj = i - MRVL_ML_NUM_INPUT_OUTPUT_1;\n \n \t\t\tfprintf(fp, \"%8u  \", i);\n-\t\t\tfprintf(fp, \"%*s  \", 16, model->metadata.input2[j].input_name);\n-\t\t\trte_ml_io_type_to_str(model->metadata.input2[j].input_type, str, STR_LEN);\n+\t\t\tfprintf(fp, \"%*s  \", 16, model->glow.metadata.input2[j].input_name);\n+\t\t\trte_ml_io_type_to_str(model->glow.metadata.input2[j].input_type, str,\n+\t\t\t\t\t      STR_LEN);\n \t\t\tfprintf(fp, \"%*s  \", 12, str);\n-\t\t\trte_ml_io_type_to_str(model->metadata.input2[j].model_input_type, str,\n+\t\t\trte_ml_io_type_to_str(model->glow.metadata.input2[j].model_input_type, str,\n \t\t\t\t\t      STR_LEN);\n \t\t\tfprintf(fp, \"%*s  \", 18, str);\n \t\t\tfprintf(fp, \"%*s\", 12,\n-\t\t\t\t(model->metadata.input2[j].quantize == 1 ? \"Yes\" : \"No\"));\n+\t\t\t\t(model->glow.metadata.input2[j].quantize == 1 ? \"Yes\" : \"No\"));\n \t\t\tfprintf(fp, \"\\n\");\n \t\t}\n \t}\n@@ -295,29 +298,31 @@ cn10k_ml_model_print(struct rte_ml_dev *dev, uint16_t model_id, FILE *fp)\n \tfprintf(fp, \"%8s  %16s  %12s  %18s  %12s\\n\", \"output\", \"output_name\", \"output_type\",\n \t\t\"model_output_type\", \"dequantize\");\n \tprint_line(fp, LINE_LEN);\n-\tfor (i = 0; i < model->metadata.model.num_output; i++) {\n+\tfor (i = 0; i < model->glow.metadata.model.num_output; i++) {\n \t\tif (i < MRVL_ML_NUM_INPUT_OUTPUT_1) {\n \t\t\tfprintf(fp, \"%8u  \", i);\n-\t\t\tfprintf(fp, \"%*s  \", 16, model->metadata.output1[i].output_name);\n-\t\t\trte_ml_io_type_to_str(model->metadata.output1[i].output_type, str, STR_LEN);\n-\t\t\tfprintf(fp, \"%*s  \", 12, str);\n-\t\t\trte_ml_io_type_to_str(model->metadata.output1[i].model_output_type, str,\n+\t\t\tfprintf(fp, \"%*s  \", 16, model->glow.metadata.output1[i].output_name);\n+\t\t\trte_ml_io_type_to_str(model->glow.metadata.output1[i].output_type, str,\n \t\t\t\t\t      STR_LEN);\n+\t\t\tfprintf(fp, \"%*s  \", 12, str);\n+\t\t\trte_ml_io_type_to_str(model->glow.metadata.output1[i].model_output_type,\n+\t\t\t\t\t      str, STR_LEN);\n \t\t\tfprintf(fp, \"%*s  \", 18, str);\n \t\t\tfprintf(fp, \"%*s\", 12,\n-\t\t\t\t(model->metadata.output1[i].dequantize == 1 ? \"Yes\" : \"No\"));\n+\t\t\t\t(model->glow.metadata.output1[i].dequantize == 1 ? \"Yes\" : \"No\"));\n \t\t\tfprintf(fp, \"\\n\");\n \t\t} else {\n \t\t\tj = i - MRVL_ML_NUM_INPUT_OUTPUT_1;\n \t\t\tfprintf(fp, \"%8u  \", i);\n-\t\t\tfprintf(fp, \"%*s  \", 16, model->metadata.output2[j].output_name);\n-\t\t\trte_ml_io_type_to_str(model->metadata.output2[j].output_type, str, STR_LEN);\n-\t\t\tfprintf(fp, \"%*s  \", 12, str);\n-\t\t\trte_ml_io_type_to_str(model->metadata.output2[j].model_output_type, str,\n+\t\t\tfprintf(fp, \"%*s  \", 16, model->glow.metadata.output2[j].output_name);\n+\t\t\trte_ml_io_type_to_str(model->glow.metadata.output2[j].output_type, str,\n \t\t\t\t\t      STR_LEN);\n+\t\t\tfprintf(fp, \"%*s  \", 12, str);\n+\t\t\trte_ml_io_type_to_str(model->glow.metadata.output2[j].model_output_type,\n+\t\t\t\t\t      str, STR_LEN);\n \t\t\tfprintf(fp, \"%*s  \", 18, str);\n \t\t\tfprintf(fp, \"%*s\", 12,\n-\t\t\t\t(model->metadata.output2[j].dequantize == 1 ? \"Yes\" : \"No\"));\n+\t\t\t\t(model->glow.metadata.output2[j].dequantize == 1 ? \"Yes\" : \"No\"));\n \t\t\tfprintf(fp, \"\\n\");\n \t\t}\n \t}\n@@ -327,14 +332,14 @@ cn10k_ml_model_print(struct rte_ml_dev *dev, uint16_t model_id, FILE *fp)\n }\n \n static void\n-cn10k_ml_prep_sp_job_descriptor(struct cn10k_ml_dev *cn10k_mldev, struct cn10k_ml_model *model,\n+cn10k_ml_prep_sp_job_descriptor(struct cn10k_ml_dev *cn10k_mldev, struct cnxk_ml_model *model,\n \t\t\t\tstruct cn10k_ml_req *req, enum cn10k_ml_job_type job_type)\n {\n \tstruct cn10k_ml_model_metadata *metadata;\n-\tstruct cn10k_ml_model_addr *addr;\n+\tstruct cn10k_ml_layer_addr *addr;\n \n-\tmetadata = &model->metadata;\n-\taddr = &model->addr;\n+\tmetadata = &model->glow.metadata;\n+\taddr = &model->layer[0].glow.addr;\n \n \tmemset(&req->jd, 0, sizeof(struct cn10k_ml_jd));\n \treq->jd.hdr.jce.w0.u64 = 0;\n@@ -345,7 +350,7 @@ cn10k_ml_prep_sp_job_descriptor(struct cn10k_ml_dev *cn10k_mldev, struct cn10k_m\n \treq->jd.hdr.result = roc_ml_addr_ap2mlip(&cn10k_mldev->roc, &req->result);\n \n \tif (job_type == ML_CN10K_JOB_TYPE_MODEL_START) {\n-\t\tif (!model->metadata.model.ocm_relocatable)\n+\t\tif (!model->glow.metadata.model.ocm_relocatable)\n \t\t\treq->jd.hdr.sp_flags = ML_CN10K_SP_FLAGS_OCM_NONRELOCATABLE;\n \t\telse\n \t\t\treq->jd.hdr.sp_flags = 0x0;\n@@ -385,7 +390,7 @@ cn10k_ml_prep_sp_job_descriptor(struct cn10k_ml_dev *cn10k_mldev, struct cn10k_m\n \t\treq->jd.model_start.output.s.ddr_range_end = metadata->model.ddr_output_range_end;\n \n \t\treq->extended_args.start.ddr_scratch_base_address = PLT_U64_CAST(\n-\t\t\troc_ml_addr_ap2mlip(&cn10k_mldev->roc, model->addr.scratch_base_addr));\n+\t\t\troc_ml_addr_ap2mlip(&cn10k_mldev->roc, addr->scratch_base_addr));\n \t\treq->extended_args.start.ddr_scratch_range_start =\n \t\t\tmetadata->model.ddr_scratch_range_start;\n \t\treq->extended_args.start.ddr_scratch_range_end =\n@@ -445,7 +450,7 @@ cn10k_ml_xstats_init(struct rte_ml_dev *dev)\n \tcn10k_mldev = &cnxk_mldev->cn10k_mldev;\n \n \t/* Allocate memory for xstats entries. Don't allocate during reconfigure */\n-\tnb_stats = RTE_DIM(device_stats) + ML_CN10K_MAX_MODELS * RTE_DIM(model_stats);\n+\tnb_stats = RTE_DIM(device_stats) + ML_CNXK_MAX_MODELS * RTE_DIM(model_stats);\n \tif (cn10k_mldev->xstats.entries == NULL)\n \t\tcn10k_mldev->xstats.entries = rte_zmalloc(\n \t\t\t\"cn10k_ml_xstats\", sizeof(struct cn10k_ml_xstats_entry) * nb_stats,\n@@ -472,7 +477,7 @@ cn10k_ml_xstats_init(struct rte_ml_dev *dev)\n \tcn10k_mldev->xstats.count_mode_device = stat_id;\n \n \t/* Initialize model xstats */\n-\tfor (model = 0; model < ML_CN10K_MAX_MODELS; model++) {\n+\tfor (model = 0; model < ML_CNXK_MAX_MODELS; model++) {\n \t\tcn10k_mldev->xstats.offset_for_model[model] = stat_id;\n \n \t\tfor (i = 0; i < RTE_DIM(model_stats); i++) {\n@@ -521,7 +526,7 @@ cn10k_ml_xstats_model_name_update(struct rte_ml_dev *dev, uint16_t model_id)\n {\n \tstruct cn10k_ml_dev *cn10k_mldev;\n \tstruct cnxk_ml_dev *cnxk_mldev;\n-\tstruct cn10k_ml_model *model;\n+\tstruct cnxk_ml_model *model;\n \tuint16_t rclk_freq;\n \tuint16_t sclk_freq;\n \tuint16_t stat_id;\n@@ -543,7 +548,7 @@ cn10k_ml_xstats_model_name_update(struct rte_ml_dev *dev, uint16_t model_id)\n \tfor (i = 0; i < RTE_DIM(model_stats); i++) {\n \t\tsnprintf(cn10k_mldev->xstats.entries[stat_id].map.name,\n \t\t\t sizeof(cn10k_mldev->xstats.entries[stat_id].map.name), \"%s-%s-%s\",\n-\t\t\t model->metadata.model.name, model_stats[i].name, suffix);\n+\t\t\t model->layer[0].glow.metadata.model.name, model_stats[i].name, suffix);\n \t\tstat_id++;\n \t}\n }\n@@ -576,9 +581,9 @@ cn10k_ml_dev_xstat_get(struct rte_ml_dev *dev, uint16_t obj_idx __rte_unused,\n \tdo {                                                                                       \\\n \t\tvalue = 0;                                                                         \\\n \t\tfor (qp_id = 0; qp_id < dev->data->nb_queue_pairs; qp_id++) {                      \\\n-\t\t\tvalue += model->burst_stats[qp_id].str##_latency_tot;                      \\\n-\t\t\tcount += model->burst_stats[qp_id].dequeued_count -                        \\\n-\t\t\t\t model->burst_stats[qp_id].str##_reset_count;                      \\\n+\t\t\tvalue += model->layer[0].glow.burst_stats[qp_id].str##_latency_tot;        \\\n+\t\t\tcount += model->layer[0].glow.burst_stats[qp_id].dequeued_count -          \\\n+\t\t\t\t model->layer[0].glow.burst_stats[qp_id].str##_reset_count;        \\\n \t\t}                                                                                  \\\n \t\tif (count != 0)                                                                    \\\n \t\t\tvalue = value / count;                                                     \\\n@@ -588,9 +593,10 @@ cn10k_ml_dev_xstat_get(struct rte_ml_dev *dev, uint16_t obj_idx __rte_unused,\n \tdo {                                                                                       \\\n \t\tvalue = UINT64_MAX;                                                                \\\n \t\tfor (qp_id = 0; qp_id < dev->data->nb_queue_pairs; qp_id++) {                      \\\n-\t\t\tvalue = PLT_MIN(value, model->burst_stats[qp_id].str##_latency_min);       \\\n-\t\t\tcount += model->burst_stats[qp_id].dequeued_count -                        \\\n-\t\t\t\t model->burst_stats[qp_id].str##_reset_count;                      \\\n+\t\t\tvalue = PLT_MIN(                                                           \\\n+\t\t\t\tvalue, model->layer[0].glow.burst_stats[qp_id].str##_latency_min); \\\n+\t\t\tcount += model->layer[0].glow.burst_stats[qp_id].dequeued_count -          \\\n+\t\t\t\t model->layer[0].glow.burst_stats[qp_id].str##_reset_count;        \\\n \t\t}                                                                                  \\\n \t\tif (count == 0)                                                                    \\\n \t\t\tvalue = 0;                                                                 \\\n@@ -600,9 +606,10 @@ cn10k_ml_dev_xstat_get(struct rte_ml_dev *dev, uint16_t obj_idx __rte_unused,\n \tdo {                                                                                       \\\n \t\tvalue = 0;                                                                         \\\n \t\tfor (qp_id = 0; qp_id < dev->data->nb_queue_pairs; qp_id++) {                      \\\n-\t\t\tvalue = PLT_MAX(value, model->burst_stats[qp_id].str##_latency_max);       \\\n-\t\t\tcount += model->burst_stats[qp_id].dequeued_count -                        \\\n-\t\t\t\t model->burst_stats[qp_id].str##_reset_count;                      \\\n+\t\t\tvalue = PLT_MAX(                                                           \\\n+\t\t\t\tvalue, model->layer[0].glow.burst_stats[qp_id].str##_latency_max); \\\n+\t\t\tcount += model->layer[0].glow.burst_stats[qp_id].dequeued_count -          \\\n+\t\t\t\t model->layer[0].glow.burst_stats[qp_id].str##_reset_count;        \\\n \t\t}                                                                                  \\\n \t\tif (count == 0)                                                                    \\\n \t\t\tvalue = 0;                                                                 \\\n@@ -611,7 +618,7 @@ cn10k_ml_dev_xstat_get(struct rte_ml_dev *dev, uint16_t obj_idx __rte_unused,\n static uint64_t\n cn10k_ml_model_xstat_get(struct rte_ml_dev *dev, uint16_t obj_idx, enum cn10k_ml_xstats_type type)\n {\n-\tstruct cn10k_ml_model *model;\n+\tstruct cnxk_ml_model *model;\n \tuint16_t rclk_freq; /* MHz */\n \tuint16_t sclk_freq; /* MHz */\n \tuint64_t count = 0;\n@@ -692,28 +699,28 @@ cn10k_ml_device_xstats_reset(struct rte_ml_dev *dev, const uint16_t stat_ids[],\n #define ML_AVG_RESET_FOREACH_QP(dev, model, qp_id, str)                                            \\\n \tdo {                                                                                       \\\n \t\tfor (qp_id = 0; qp_id < dev->data->nb_queue_pairs; qp_id++) {                      \\\n-\t\t\tmodel->burst_stats[qp_id].str##_latency_tot = 0;                           \\\n-\t\t\tmodel->burst_stats[qp_id].str##_reset_count =                              \\\n-\t\t\t\tmodel->burst_stats[qp_id].dequeued_count;                          \\\n+\t\t\tmodel->layer[0].glow.burst_stats[qp_id].str##_latency_tot = 0;             \\\n+\t\t\tmodel->layer[0].glow.burst_stats[qp_id].str##_reset_count =                \\\n+\t\t\t\tmodel->layer[0].glow.burst_stats[qp_id].dequeued_count;            \\\n \t\t}                                                                                  \\\n \t} while (0)\n \n #define ML_MIN_RESET_FOREACH_QP(dev, model, qp_id, str)                                            \\\n \tdo {                                                                                       \\\n \t\tfor (qp_id = 0; qp_id < dev->data->nb_queue_pairs; qp_id++)                        \\\n-\t\t\tmodel->burst_stats[qp_id].str##_latency_min = UINT64_MAX;                  \\\n+\t\t\tmodel->layer[0].glow.burst_stats[qp_id].str##_latency_min = UINT64_MAX;    \\\n \t} while (0)\n \n #define ML_MAX_RESET_FOREACH_QP(dev, model, qp_id, str)                                            \\\n \tdo {                                                                                       \\\n \t\tfor (qp_id = 0; qp_id < dev->data->nb_queue_pairs; qp_id++)                        \\\n-\t\t\tmodel->burst_stats[qp_id].str##_latency_max = 0;                           \\\n+\t\t\tmodel->layer[0].glow.burst_stats[qp_id].str##_latency_max = 0;             \\\n \t} while (0)\n \n static void\n cn10k_ml_reset_model_stat(struct rte_ml_dev *dev, uint16_t model_id, enum cn10k_ml_xstats_type type)\n {\n-\tstruct cn10k_ml_model *model;\n+\tstruct cnxk_ml_model *model;\n \tuint32_t qp_id;\n \n \tmodel = dev->data->models[model_id];\n@@ -749,7 +756,7 @@ cn10k_ml_model_xstats_reset(struct rte_ml_dev *dev, int32_t model_id, const uint\n \tstruct cn10k_ml_xstats_entry *xs;\n \tstruct cn10k_ml_dev *cn10k_mldev;\n \tstruct cnxk_ml_dev *cnxk_mldev;\n-\tstruct cn10k_ml_model *model;\n+\tstruct cnxk_ml_model *model;\n \tint32_t lcl_model_id = 0;\n \tuint16_t start_id;\n \tuint16_t end_id;\n@@ -758,7 +765,7 @@ cn10k_ml_model_xstats_reset(struct rte_ml_dev *dev, int32_t model_id, const uint\n \n \tcnxk_mldev = dev->data->dev_private;\n \tcn10k_mldev = &cnxk_mldev->cn10k_mldev;\n-\tfor (i = 0; i < ML_CN10K_MAX_MODELS; i++) {\n+\tfor (i = 0; i < ML_CNXK_MAX_MODELS; i++) {\n \t\tif (model_id == -1) {\n \t\t\tmodel = dev->data->models[i];\n \t\t\tif (model == NULL) /* Skip inactive models */\n@@ -803,7 +810,7 @@ static int\n cn10k_ml_cache_model_data(struct rte_ml_dev *dev, uint16_t model_id)\n {\n \tstruct rte_ml_model_info *info;\n-\tstruct cn10k_ml_model *model;\n+\tstruct cnxk_ml_model *model;\n \tstruct rte_ml_buff_seg seg[2];\n \tstruct rte_ml_buff_seg *inp;\n \tstruct rte_ml_buff_seg *out;\n@@ -854,7 +861,7 @@ cn10k_ml_cache_model_data(struct rte_ml_dev *dev, uint16_t model_id)\n \top.input = &inp;\n \top.output = &out;\n \n-\tmemset(model->req, 0, sizeof(struct cn10k_ml_req));\n+\tmemset(model->layer[0].glow.req, 0, sizeof(struct cn10k_ml_req));\n \tret = cn10k_ml_inference_sync(dev, &op);\n \tplt_memzone_free(mz);\n \n@@ -875,7 +882,7 @@ cn10k_ml_dev_info_get(struct rte_ml_dev *dev, struct rte_ml_dev_info *dev_info)\n \n \tmemset(dev_info, 0, sizeof(struct rte_ml_dev_info));\n \tdev_info->driver_name = dev->device->driver->name;\n-\tdev_info->max_models = ML_CN10K_MAX_MODELS;\n+\tdev_info->max_models = ML_CNXK_MAX_MODELS;\n \tif (cn10k_mldev->hw_queue_lock)\n \t\tdev_info->max_queue_pairs = ML_CN10K_MAX_QP_PER_DEVICE_SL;\n \telse\n@@ -895,7 +902,7 @@ cn10k_ml_dev_configure(struct rte_ml_dev *dev, const struct rte_ml_dev_config *c\n \tstruct rte_ml_dev_info dev_info;\n \tstruct cn10k_ml_dev *cn10k_mldev;\n \tstruct cnxk_ml_dev *cnxk_mldev;\n-\tstruct cn10k_ml_model *model;\n+\tstruct cnxk_ml_model *model;\n \tstruct cn10k_ml_ocm *ocm;\n \tstruct cn10k_ml_qp *qp;\n \tuint16_t model_id;\n@@ -1001,11 +1008,11 @@ cn10k_ml_dev_configure(struct rte_ml_dev *dev, const struct rte_ml_dev_config *c\n \t\tfor (model_id = 0; model_id < dev->data->nb_models; model_id++) {\n \t\t\tmodel = dev->data->models[model_id];\n \t\t\tif (model != NULL) {\n-\t\t\t\tif (model->state == ML_CN10K_MODEL_STATE_STARTED) {\n+\t\t\t\tif (model->state == ML_CNXK_MODEL_STATE_STARTED) {\n \t\t\t\t\tif (cn10k_ml_model_stop(dev, model_id) != 0)\n \t\t\t\t\t\tplt_err(\"Could not stop model %u\", model_id);\n \t\t\t\t}\n-\t\t\t\tif (model->state == ML_CN10K_MODEL_STATE_LOADED) {\n+\t\t\t\tif (model->state == ML_CNXK_MODEL_STATE_LOADED) {\n \t\t\t\t\tif (cn10k_ml_model_unload(dev, model_id) != 0)\n \t\t\t\t\t\tplt_err(\"Could not unload model %u\", model_id);\n \t\t\t\t}\n@@ -1093,7 +1100,7 @@ cn10k_ml_dev_close(struct rte_ml_dev *dev)\n {\n \tstruct cn10k_ml_dev *cn10k_mldev;\n \tstruct cnxk_ml_dev *cnxk_mldev;\n-\tstruct cn10k_ml_model *model;\n+\tstruct cnxk_ml_model *model;\n \tstruct cn10k_ml_qp *qp;\n \tuint16_t model_id;\n \tuint16_t qp_id;\n@@ -1111,11 +1118,11 @@ cn10k_ml_dev_close(struct rte_ml_dev *dev)\n \tfor (model_id = 0; model_id < dev->data->nb_models; model_id++) {\n \t\tmodel = dev->data->models[model_id];\n \t\tif (model != NULL) {\n-\t\t\tif (model->state == ML_CN10K_MODEL_STATE_STARTED) {\n+\t\t\tif (model->state == ML_CNXK_MODEL_STATE_STARTED) {\n \t\t\t\tif (cn10k_ml_model_stop(dev, model_id) != 0)\n \t\t\t\t\tplt_err(\"Could not stop model %u\", model_id);\n \t\t\t}\n-\t\t\tif (model->state == ML_CN10K_MODEL_STATE_LOADED) {\n+\t\t\tif (model->state == ML_CNXK_MODEL_STATE_LOADED) {\n \t\t\t\tif (cn10k_ml_model_unload(dev, model_id) != 0)\n \t\t\t\t\tplt_err(\"Could not unload model %u\", model_id);\n \t\t\t}\n@@ -1294,7 +1301,7 @@ cn10k_ml_dev_xstats_names_get(struct rte_ml_dev *dev, enum rte_ml_dev_xstats_mod\n \t\txstats_mode_count = cn10k_mldev->xstats.count_mode_device;\n \t\tbreak;\n \tcase RTE_ML_DEV_XSTATS_MODEL:\n-\t\tif (model_id >= ML_CN10K_MAX_MODELS)\n+\t\tif (model_id >= ML_CNXK_MAX_MODELS)\n \t\t\tbreak;\n \t\txstats_mode_count = cn10k_mldev->xstats.count_per_model[model_id];\n \t\tbreak;\n@@ -1386,7 +1393,7 @@ cn10k_ml_dev_xstats_get(struct rte_ml_dev *dev, enum rte_ml_dev_xstats_mode mode\n \t\txstats_mode_count = cn10k_mldev->xstats.count_mode_device;\n \t\tbreak;\n \tcase RTE_ML_DEV_XSTATS_MODEL:\n-\t\tif (model_id >= ML_CN10K_MAX_MODELS)\n+\t\tif (model_id >= ML_CNXK_MAX_MODELS)\n \t\t\treturn -EINVAL;\n \t\txstats_mode_count = cn10k_mldev->xstats.count_per_model[model_id];\n \t\tbreak;\n@@ -1447,7 +1454,7 @@ cn10k_ml_dev_dump(struct rte_ml_dev *dev, FILE *fp)\n {\n \tstruct cn10k_ml_dev *cn10k_mldev;\n \tstruct cnxk_ml_dev *cnxk_mldev;\n-\tstruct cn10k_ml_model *model;\n+\tstruct cnxk_ml_model *model;\n \tstruct cn10k_ml_fw *fw;\n \n \tuint32_t head_loc;\n@@ -1588,7 +1595,7 @@ cn10k_ml_model_load(struct rte_ml_dev *dev, struct rte_ml_model_params *params,\n {\n \tstruct cn10k_ml_model_metadata *metadata;\n \tstruct cnxk_ml_dev *cnxk_mldev;\n-\tstruct cn10k_ml_model *model;\n+\tstruct cnxk_ml_model *model;\n \n \tchar str[RTE_MEMZONE_NAMESIZE];\n \tconst struct plt_memzone *mz;\n@@ -1643,9 +1650,9 @@ cn10k_ml_model_load(struct rte_ml_dev *dev, struct rte_ml_model_params *params,\n \t\t\t  metadata->model.num_input * sizeof(struct rte_ml_io_info) +\n \t\t\t  metadata->model.num_output * sizeof(struct rte_ml_io_info);\n \tmodel_info_size = PLT_ALIGN_CEIL(model_info_size, ML_CN10K_ALIGN_SIZE);\n-\tmodel_stats_size = (dev->data->nb_queue_pairs + 1) * sizeof(struct cn10k_ml_model_stats);\n+\tmodel_stats_size = (dev->data->nb_queue_pairs + 1) * sizeof(struct cn10k_ml_layer_stats);\n \n-\tmz_size = PLT_ALIGN_CEIL(sizeof(struct cn10k_ml_model), ML_CN10K_ALIGN_SIZE) +\n+\tmz_size = PLT_ALIGN_CEIL(sizeof(struct cnxk_ml_model), ML_CN10K_ALIGN_SIZE) +\n \t\t  2 * model_data_size + model_scratch_size + model_info_size +\n \t\t  PLT_ALIGN_CEIL(sizeof(struct cn10k_ml_req), ML_CN10K_ALIGN_SIZE) +\n \t\t  model_stats_size;\n@@ -1659,62 +1666,85 @@ cn10k_ml_model_load(struct rte_ml_dev *dev, struct rte_ml_model_params *params,\n \t}\n \n \tmodel = mz->addr;\n-\tmodel->mldev = cnxk_mldev;\n+\tmodel->cnxk_mldev = cnxk_mldev;\n \tmodel->model_id = idx;\n+\tdev->data->models[idx] = model;\n \n-\trte_memcpy(&model->metadata, params->addr, sizeof(struct cn10k_ml_model_metadata));\n-\tcn10k_ml_model_metadata_update(&model->metadata);\n+\trte_memcpy(&model->glow.metadata, params->addr, sizeof(struct cn10k_ml_model_metadata));\n+\tcn10k_ml_model_metadata_update(&model->glow.metadata);\n+\n+\t/* Set model name */\n+\trte_memcpy(model->name, (char *)model->glow.metadata.model.name, 64);\n \n \t/* Enable support for batch_size of 256 */\n-\tif (model->metadata.model.batch_size == 0)\n+\tif (model->glow.metadata.model.batch_size == 0)\n \t\tmodel->batch_size = 256;\n \telse\n-\t\tmodel->batch_size = model->metadata.model.batch_size;\n+\t\tmodel->batch_size = model->glow.metadata.model.batch_size;\n+\n+\t/* Since the number of layers that the driver would be handling for glow models is\n+\t * always 1. consider the entire model as a model with single layer. This would\n+\t * ignore the num_layers from metadata.\n+\t */\n+\tmodel->nb_layers = 1;\n+\n+\t/* Copy metadata to internal buffer */\n+\trte_memcpy(&model->layer[0].glow.metadata, params->addr,\n+\t\t   sizeof(struct cn10k_ml_model_metadata));\n+\tcn10k_ml_model_metadata_update(&model->layer[0].glow.metadata);\n+\tmodel->layer[0].model = model;\n \n \t/* Set DMA base address */\n \tbase_dma_addr = PLT_PTR_ADD(\n-\t\tmz->addr, PLT_ALIGN_CEIL(sizeof(struct cn10k_ml_model), ML_CN10K_ALIGN_SIZE));\n-\tcn10k_ml_model_addr_update(model, params->addr, base_dma_addr);\n-\tmodel->addr.scratch_base_addr = PLT_PTR_ADD(base_dma_addr, 2 * model_data_size);\n+\t\tmz->addr, PLT_ALIGN_CEIL(sizeof(struct cnxk_ml_model), ML_CN10K_ALIGN_SIZE));\n+\tcn10k_ml_layer_addr_update(&model->layer[0], params->addr, base_dma_addr);\n+\tmodel->layer[0].glow.addr.scratch_base_addr =\n+\t\tPLT_PTR_ADD(base_dma_addr, 2 * model_data_size);\n \n \t/* Copy data from load to run. run address to be used by MLIP */\n-\trte_memcpy(model->addr.base_dma_addr_run, model->addr.base_dma_addr_load, model_data_size);\n+\trte_memcpy(model->layer[0].glow.addr.base_dma_addr_run,\n+\t\t   model->layer[0].glow.addr.base_dma_addr_load, model_data_size);\n+\n+\t/* Update internal I/O data structure */\n+\tcn10k_ml_layer_info_update(&model->layer[0]);\n \n \t/* Initialize model_mem_map */\n-\tmemset(&model->model_mem_map, 0, sizeof(struct cn10k_ml_ocm_model_map));\n-\tmodel->model_mem_map.ocm_reserved = false;\n-\tmodel->model_mem_map.tilemask = 0;\n-\tmodel->model_mem_map.wb_page_start = -1;\n-\tmodel->model_mem_map.wb_pages = wb_pages;\n-\tmodel->model_mem_map.scratch_pages = scratch_pages;\n+\tmemset(&model->layer[0].glow.ocm_map, 0, sizeof(struct cn10k_ml_ocm_layer_map));\n+\tmodel->layer[0].glow.ocm_map.ocm_reserved = false;\n+\tmodel->layer[0].glow.ocm_map.tilemask = 0;\n+\tmodel->layer[0].glow.ocm_map.wb_page_start = -1;\n+\tmodel->layer[0].glow.ocm_map.wb_pages = wb_pages;\n+\tmodel->layer[0].glow.ocm_map.scratch_pages = scratch_pages;\n \n \t/* Set model info */\n-\tmodel->info = PLT_PTR_ADD(model->addr.scratch_base_addr, model_scratch_size);\n+\tmodel->info = PLT_PTR_ADD(model->layer[0].glow.addr.scratch_base_addr, model_scratch_size);\n \tcn10k_ml_model_info_set(dev, model);\n \n \t/* Set slow-path request address and state */\n-\tmodel->req = PLT_PTR_ADD(model->info, model_info_size);\n+\tmodel->layer[0].glow.req = PLT_PTR_ADD(model->info, model_info_size);\n \n \t/* Reset burst and sync stats */\n-\tmodel->burst_stats = PLT_PTR_ADD(\n-\t\tmodel->req, PLT_ALIGN_CEIL(sizeof(struct cn10k_ml_req), ML_CN10K_ALIGN_SIZE));\n+\tmodel->layer[0].glow.burst_stats =\n+\t\tPLT_PTR_ADD(model->layer[0].glow.req,\n+\t\t\t    PLT_ALIGN_CEIL(sizeof(struct cn10k_ml_req), ML_CN10K_ALIGN_SIZE));\n \tfor (qp_id = 0; qp_id < dev->data->nb_queue_pairs + 1; qp_id++) {\n-\t\tmodel->burst_stats[qp_id].hw_latency_tot = 0;\n-\t\tmodel->burst_stats[qp_id].hw_latency_min = UINT64_MAX;\n-\t\tmodel->burst_stats[qp_id].hw_latency_max = 0;\n-\t\tmodel->burst_stats[qp_id].fw_latency_tot = 0;\n-\t\tmodel->burst_stats[qp_id].fw_latency_min = UINT64_MAX;\n-\t\tmodel->burst_stats[qp_id].fw_latency_max = 0;\n-\t\tmodel->burst_stats[qp_id].hw_reset_count = 0;\n-\t\tmodel->burst_stats[qp_id].fw_reset_count = 0;\n-\t\tmodel->burst_stats[qp_id].dequeued_count = 0;\n-\t}\n-\tmodel->sync_stats =\n-\t\tPLT_PTR_ADD(model->burst_stats,\n-\t\t\t    dev->data->nb_queue_pairs * sizeof(struct cn10k_ml_model_stats));\n+\t\tmodel->layer[0].glow.burst_stats[qp_id].hw_latency_tot = 0;\n+\t\tmodel->layer[0].glow.burst_stats[qp_id].hw_latency_min = UINT64_MAX;\n+\t\tmodel->layer[0].glow.burst_stats[qp_id].hw_latency_max = 0;\n+\t\tmodel->layer[0].glow.burst_stats[qp_id].fw_latency_tot = 0;\n+\t\tmodel->layer[0].glow.burst_stats[qp_id].fw_latency_min = UINT64_MAX;\n+\t\tmodel->layer[0].glow.burst_stats[qp_id].fw_latency_max = 0;\n+\t\tmodel->layer[0].glow.burst_stats[qp_id].hw_reset_count = 0;\n+\t\tmodel->layer[0].glow.burst_stats[qp_id].fw_reset_count = 0;\n+\t\tmodel->layer[0].glow.burst_stats[qp_id].dequeued_count = 0;\n+\t}\n+\n+\tmodel->layer[0].glow.sync_stats =\n+\t\tPLT_PTR_ADD(model->layer[0].glow.burst_stats,\n+\t\t\t    dev->data->nb_queue_pairs * sizeof(struct cn10k_ml_layer_stats));\n \n \tplt_spinlock_init(&model->lock);\n-\tmodel->state = ML_CN10K_MODEL_STATE_LOADED;\n+\tmodel->state = ML_CNXK_MODEL_STATE_LOADED;\n \tdev->data->models[idx] = model;\n \tcnxk_mldev->nb_models_loaded++;\n \n@@ -1730,7 +1760,7 @@ int\n cn10k_ml_model_unload(struct rte_ml_dev *dev, uint16_t model_id)\n {\n \tchar str[RTE_MEMZONE_NAMESIZE];\n-\tstruct cn10k_ml_model *model;\n+\tstruct cnxk_ml_model *model;\n \tstruct cnxk_ml_dev *cnxk_mldev;\n \n \tcnxk_mldev = dev->data->dev_private;\n@@ -1741,7 +1771,7 @@ cn10k_ml_model_unload(struct rte_ml_dev *dev, uint16_t model_id)\n \t\treturn -EINVAL;\n \t}\n \n-\tif (model->state != ML_CN10K_MODEL_STATE_LOADED) {\n+\tif (model->state != ML_CNXK_MODEL_STATE_LOADED) {\n \t\tplt_err(\"Cannot unload. Model in use.\");\n \t\treturn -EBUSY;\n \t}\n@@ -1758,7 +1788,7 @@ cn10k_ml_model_start(struct rte_ml_dev *dev, uint16_t model_id)\n {\n \tstruct cn10k_ml_dev *cn10k_mldev;\n \tstruct cnxk_ml_dev *cnxk_mldev;\n-\tstruct cn10k_ml_model *model;\n+\tstruct cnxk_ml_model *model;\n \tstruct cn10k_ml_ocm *ocm;\n \tstruct cn10k_ml_req *req;\n \n@@ -1783,7 +1813,7 @@ cn10k_ml_model_start(struct rte_ml_dev *dev, uint16_t model_id)\n \t}\n \n \t/* Prepare JD */\n-\treq = model->req;\n+\treq = model->layer[0].glow.req;\n \tcn10k_ml_prep_sp_job_descriptor(cn10k_mldev, model, req, ML_CN10K_JOB_TYPE_MODEL_START);\n \treq->result.error_code.u64 = 0x0;\n \treq->result.user_ptr = NULL;\n@@ -1791,63 +1821,66 @@ cn10k_ml_model_start(struct rte_ml_dev *dev, uint16_t model_id)\n \tplt_write64(ML_CNXK_POLL_JOB_START, &req->status);\n \tplt_wmb();\n \n-\tnum_tiles = model->metadata.model.tile_end - model->metadata.model.tile_start + 1;\n+\tnum_tiles = model->layer[0].glow.metadata.model.tile_end -\n+\t\t    model->layer[0].glow.metadata.model.tile_start + 1;\n \n \tlocked = false;\n \twhile (!locked) {\n \t\tif (plt_spinlock_trylock(&model->lock) != 0) {\n-\t\t\tif (model->state == ML_CN10K_MODEL_STATE_STARTED) {\n+\t\t\tif (model->state == ML_CNXK_MODEL_STATE_STARTED) {\n \t\t\t\tplt_ml_dbg(\"Model already started, model = 0x%016lx\",\n \t\t\t\t\t   PLT_U64_CAST(model));\n \t\t\t\tplt_spinlock_unlock(&model->lock);\n \t\t\t\treturn 1;\n \t\t\t}\n \n-\t\t\tif (model->state == ML_CN10K_MODEL_STATE_JOB_ACTIVE) {\n+\t\t\tif (model->state == ML_CNXK_MODEL_STATE_JOB_ACTIVE) {\n \t\t\t\tplt_err(\"A slow-path job is active for the model = 0x%016lx\",\n \t\t\t\t\tPLT_U64_CAST(model));\n \t\t\t\tplt_spinlock_unlock(&model->lock);\n \t\t\t\treturn -EBUSY;\n \t\t\t}\n \n-\t\t\tmodel->state = ML_CN10K_MODEL_STATE_JOB_ACTIVE;\n+\t\t\tmodel->state = ML_CNXK_MODEL_STATE_JOB_ACTIVE;\n \t\t\tplt_spinlock_unlock(&model->lock);\n \t\t\tlocked = true;\n \t\t}\n \t}\n \n-\twhile (!model->model_mem_map.ocm_reserved) {\n+\twhile (!model->layer[0].glow.ocm_map.ocm_reserved) {\n \t\tif (plt_spinlock_trylock(&ocm->lock) != 0) {\n \t\t\twb_page_start = cn10k_ml_ocm_tilemask_find(\n-\t\t\t\tdev, num_tiles, model->model_mem_map.wb_pages,\n-\t\t\t\tmodel->model_mem_map.scratch_pages, &tilemask);\n+\t\t\t\tdev, num_tiles, model->layer[0].glow.ocm_map.wb_pages,\n+\t\t\t\tmodel->layer[0].glow.ocm_map.scratch_pages, &tilemask);\n \n \t\t\tif (wb_page_start == -1) {\n \t\t\t\tplt_err(\"Free pages not available on OCM tiles\");\n \t\t\t\tplt_err(\"Failed to start model = 0x%016lx, name = %s\",\n-\t\t\t\t\tPLT_U64_CAST(model), model->metadata.model.name);\n+\t\t\t\t\tPLT_U64_CAST(model),\n+\t\t\t\t\tmodel->layer[0].glow.metadata.model.name);\n \n \t\t\t\tplt_spinlock_unlock(&ocm->lock);\n \t\t\t\treturn -ENOMEM;\n \t\t\t}\n \n-\t\t\tmodel->model_mem_map.tilemask = tilemask;\n-\t\t\tmodel->model_mem_map.wb_page_start = wb_page_start;\n+\t\t\tmodel->layer[0].glow.ocm_map.tilemask = tilemask;\n+\t\t\tmodel->layer[0].glow.ocm_map.wb_page_start = wb_page_start;\n \n-\t\t\tcn10k_ml_ocm_reserve_pages(\n-\t\t\t\tdev, model->model_id, model->model_mem_map.tilemask,\n-\t\t\t\tmodel->model_mem_map.wb_page_start, model->model_mem_map.wb_pages,\n-\t\t\t\tmodel->model_mem_map.scratch_pages);\n-\t\t\tmodel->model_mem_map.ocm_reserved = true;\n+\t\t\tcn10k_ml_ocm_reserve_pages(dev, model->model_id, 0,\n+\t\t\t\t\t\t   model->layer[0].glow.ocm_map.tilemask,\n+\t\t\t\t\t\t   model->layer[0].glow.ocm_map.wb_page_start,\n+\t\t\t\t\t\t   model->layer[0].glow.ocm_map.wb_pages,\n+\t\t\t\t\t\t   model->layer[0].glow.ocm_map.scratch_pages);\n+\t\t\tmodel->layer[0].glow.ocm_map.ocm_reserved = true;\n \t\t\tplt_spinlock_unlock(&ocm->lock);\n \t\t}\n \t}\n \n \t/* Update JD */\n-\tcn10k_ml_ocm_tilecount(model->model_mem_map.tilemask, &tile_start, &tile_end);\n+\tcn10k_ml_ocm_tilecount(model->layer[0].glow.ocm_map.tilemask, &tile_start, &tile_end);\n \treq->jd.model_start.tilemask = GENMASK_ULL(tile_end, tile_start);\n \treq->jd.model_start.ocm_wb_base_address =\n-\t\tmodel->model_mem_map.wb_page_start * ocm->page_size;\n+\t\tmodel->layer[0].glow.ocm_map.wb_page_start * ocm->page_size;\n \n \tjob_enqueued = false;\n \tjob_dequeued = false;\n@@ -1880,10 +1913,10 @@ cn10k_ml_model_start(struct rte_ml_dev *dev, uint16_t model_id)\n \twhile (!locked) {\n \t\tif (plt_spinlock_trylock(&model->lock) != 0) {\n \t\t\tif (ret == 0) {\n-\t\t\t\tmodel->state = ML_CN10K_MODEL_STATE_STARTED;\n+\t\t\t\tmodel->state = ML_CNXK_MODEL_STATE_STARTED;\n \t\t\t\tcnxk_mldev->nb_models_started++;\n \t\t\t} else {\n-\t\t\t\tmodel->state = ML_CN10K_MODEL_STATE_UNKNOWN;\n+\t\t\t\tmodel->state = ML_CNXK_MODEL_STATE_UNKNOWN;\n \t\t\t}\n \n \t\t\tplt_spinlock_unlock(&model->lock);\n@@ -1891,12 +1924,12 @@ cn10k_ml_model_start(struct rte_ml_dev *dev, uint16_t model_id)\n \t\t}\n \t}\n \n-\tif (model->state == ML_CN10K_MODEL_STATE_UNKNOWN) {\n-\t\twhile (model->model_mem_map.ocm_reserved) {\n+\tif (model->state == ML_CNXK_MODEL_STATE_UNKNOWN) {\n+\t\twhile (model->layer[0].glow.ocm_map.ocm_reserved) {\n \t\t\tif (plt_spinlock_trylock(&ocm->lock) != 0) {\n-\t\t\t\tcn10k_ml_ocm_free_pages(dev, model->model_id);\n-\t\t\t\tmodel->model_mem_map.ocm_reserved = false;\n-\t\t\t\tmodel->model_mem_map.tilemask = 0x0;\n+\t\t\t\tcn10k_ml_ocm_free_pages(dev, model->model_id, 0);\n+\t\t\t\tmodel->layer[0].glow.ocm_map.ocm_reserved = false;\n+\t\t\t\tmodel->layer[0].glow.ocm_map.tilemask = 0x0;\n \t\t\t\tplt_spinlock_unlock(&ocm->lock);\n \t\t\t}\n \t\t}\n@@ -1917,7 +1950,7 @@ cn10k_ml_model_stop(struct rte_ml_dev *dev, uint16_t model_id)\n {\n \tstruct cn10k_ml_dev *cn10k_mldev;\n \tstruct cnxk_ml_dev *cnxk_mldev;\n-\tstruct cn10k_ml_model *model;\n+\tstruct cnxk_ml_model *model;\n \tstruct cn10k_ml_ocm *ocm;\n \tstruct cn10k_ml_req *req;\n \n@@ -1937,7 +1970,7 @@ cn10k_ml_model_stop(struct rte_ml_dev *dev, uint16_t model_id)\n \t}\n \n \t/* Prepare JD */\n-\treq = model->req;\n+\treq = model->layer[0].glow.req;\n \tcn10k_ml_prep_sp_job_descriptor(cn10k_mldev, model, req, ML_CN10K_JOB_TYPE_MODEL_STOP);\n \treq->result.error_code.u64 = 0x0;\n \treq->result.user_ptr = NULL;\n@@ -1948,31 +1981,31 @@ cn10k_ml_model_stop(struct rte_ml_dev *dev, uint16_t model_id)\n \tlocked = false;\n \twhile (!locked) {\n \t\tif (plt_spinlock_trylock(&model->lock) != 0) {\n-\t\t\tif (model->state == ML_CN10K_MODEL_STATE_LOADED) {\n+\t\t\tif (model->state == ML_CNXK_MODEL_STATE_LOADED) {\n \t\t\t\tplt_ml_dbg(\"Model not started, model = 0x%016lx\",\n \t\t\t\t\t   PLT_U64_CAST(model));\n \t\t\t\tplt_spinlock_unlock(&model->lock);\n \t\t\t\treturn 1;\n \t\t\t}\n \n-\t\t\tif (model->state == ML_CN10K_MODEL_STATE_JOB_ACTIVE) {\n+\t\t\tif (model->state == ML_CNXK_MODEL_STATE_JOB_ACTIVE) {\n \t\t\t\tplt_err(\"A slow-path job is active for the model = 0x%016lx\",\n \t\t\t\t\tPLT_U64_CAST(model));\n \t\t\t\tplt_spinlock_unlock(&model->lock);\n \t\t\t\treturn -EBUSY;\n \t\t\t}\n \n-\t\t\tmodel->state = ML_CN10K_MODEL_STATE_JOB_ACTIVE;\n+\t\t\tmodel->state = ML_CNXK_MODEL_STATE_JOB_ACTIVE;\n \t\t\tplt_spinlock_unlock(&model->lock);\n \t\t\tlocked = true;\n \t\t}\n \t}\n \n-\twhile (model->model_mem_map.ocm_reserved) {\n+\twhile (model->layer[0].glow.ocm_map.ocm_reserved) {\n \t\tif (plt_spinlock_trylock(&ocm->lock) != 0) {\n-\t\t\tcn10k_ml_ocm_free_pages(dev, model->model_id);\n-\t\t\tmodel->model_mem_map.ocm_reserved = false;\n-\t\t\tmodel->model_mem_map.tilemask = 0x0;\n+\t\t\tcn10k_ml_ocm_free_pages(dev, model->model_id, 0);\n+\t\t\tmodel->layer[0].glow.ocm_map.ocm_reserved = false;\n+\t\t\tmodel->layer[0].glow.ocm_map.tilemask = 0x0;\n \t\t\tplt_spinlock_unlock(&ocm->lock);\n \t\t}\n \t}\n@@ -2008,7 +2041,7 @@ cn10k_ml_model_stop(struct rte_ml_dev *dev, uint16_t model_id)\n \twhile (!locked) {\n \t\tif (plt_spinlock_trylock(&model->lock) != 0) {\n \t\t\tcnxk_mldev->nb_models_stopped++;\n-\t\t\tmodel->state = ML_CN10K_MODEL_STATE_LOADED;\n+\t\t\tmodel->state = ML_CNXK_MODEL_STATE_LOADED;\n \t\t\tplt_spinlock_unlock(&model->lock);\n \t\t\tlocked = true;\n \t\t}\n@@ -2021,7 +2054,7 @@ static int\n cn10k_ml_model_info_get(struct rte_ml_dev *dev, uint16_t model_id,\n \t\t\tstruct rte_ml_model_info *model_info)\n {\n-\tstruct cn10k_ml_model *model;\n+\tstruct cnxk_ml_model *model;\n \n \tmodel = dev->data->models[model_id];\n \n@@ -2040,7 +2073,7 @@ cn10k_ml_model_info_get(struct rte_ml_dev *dev, uint16_t model_id,\n static int\n cn10k_ml_model_params_update(struct rte_ml_dev *dev, uint16_t model_id, void *buffer)\n {\n-\tstruct cn10k_ml_model *model;\n+\tstruct cnxk_ml_model *model;\n \tsize_t size;\n \n \tmodel = dev->data->models[model_id];\n@@ -2050,19 +2083,23 @@ cn10k_ml_model_params_update(struct rte_ml_dev *dev, uint16_t model_id, void *bu\n \t\treturn -EINVAL;\n \t}\n \n-\tif (model->state == ML_CN10K_MODEL_STATE_UNKNOWN)\n+\tif (model->state == ML_CNXK_MODEL_STATE_UNKNOWN)\n \t\treturn -1;\n-\telse if (model->state != ML_CN10K_MODEL_STATE_LOADED)\n+\telse if (model->state != ML_CNXK_MODEL_STATE_LOADED)\n \t\treturn -EBUSY;\n \n-\tsize = model->metadata.init_model.file_size + model->metadata.main_model.file_size +\n-\t       model->metadata.finish_model.file_size + model->metadata.weights_bias.file_size;\n+\tsize = model->layer[0].glow.metadata.init_model.file_size +\n+\t       model->layer[0].glow.metadata.main_model.file_size +\n+\t       model->layer[0].glow.metadata.finish_model.file_size +\n+\t       model->layer[0].glow.metadata.weights_bias.file_size;\n \n \t/* Update model weights & bias */\n-\trte_memcpy(model->addr.wb_load_addr, buffer, model->metadata.weights_bias.file_size);\n+\trte_memcpy(model->layer[0].glow.addr.wb_load_addr, buffer,\n+\t\t   model->layer[0].glow.metadata.weights_bias.file_size);\n \n \t/* Copy data from load to run. run address to be used by MLIP */\n-\trte_memcpy(model->addr.base_dma_addr_run, model->addr.base_dma_addr_load, size);\n+\trte_memcpy(model->layer[0].glow.addr.base_dma_addr_run,\n+\t\t   model->layer[0].glow.addr.base_dma_addr_load, size);\n \n \treturn 0;\n }\n@@ -2071,7 +2108,7 @@ static int\n cn10k_ml_io_quantize(struct rte_ml_dev *dev, uint16_t model_id, struct rte_ml_buff_seg **dbuffer,\n \t\t     struct rte_ml_buff_seg **qbuffer)\n {\n-\tstruct cn10k_ml_model *model;\n+\tstruct cnxk_ml_model *model;\n \tuint8_t model_input_type;\n \tuint8_t *lcl_dbuffer;\n \tuint8_t *lcl_qbuffer;\n@@ -2091,57 +2128,58 @@ cn10k_ml_io_quantize(struct rte_ml_dev *dev, uint16_t model_id, struct rte_ml_bu\n \tlcl_dbuffer = dbuffer[0]->addr;\n \tlcl_qbuffer = qbuffer[0]->addr;\n \n-\tfor (i = 0; i < model->metadata.model.num_input; i++) {\n+\tfor (i = 0; i < model->layer[0].glow.metadata.model.num_input; i++) {\n \t\tif (i < MRVL_ML_NUM_INPUT_OUTPUT_1) {\n-\t\t\tinput_type = model->metadata.input1[i].input_type;\n-\t\t\tmodel_input_type = model->metadata.input1[i].model_input_type;\n-\t\t\tqscale = model->metadata.input1[i].qscale;\n+\t\t\tinput_type = model->layer[0].glow.metadata.input1[i].input_type;\n+\t\t\tmodel_input_type = model->layer[0].glow.metadata.input1[i].model_input_type;\n+\t\t\tqscale = model->layer[0].glow.metadata.input1[i].qscale;\n \t\t} else {\n \t\t\tj = i - MRVL_ML_NUM_INPUT_OUTPUT_1;\n-\t\t\tinput_type = model->metadata.input2[j].input_type;\n-\t\t\tmodel_input_type = model->metadata.input2[j].model_input_type;\n-\t\t\tqscale = model->metadata.input2[j].qscale;\n+\t\t\tinput_type = model->layer[0].glow.metadata.input2[j].input_type;\n+\t\t\tmodel_input_type = model->layer[0].glow.metadata.input2[j].model_input_type;\n+\t\t\tqscale = model->layer[0].glow.metadata.input2[j].qscale;\n \t\t}\n \n \t\tif (input_type == model_input_type) {\n-\t\t\trte_memcpy(lcl_qbuffer, lcl_dbuffer, model->addr.input[i].sz_d);\n+\t\t\trte_memcpy(lcl_qbuffer, lcl_dbuffer, model->layer[0].info.input[i].sz_d);\n \t\t} else {\n-\t\t\tswitch (model->metadata.input1[i].model_input_type) {\n+\t\t\tswitch (model->layer[0].glow.metadata.input1[i].model_input_type) {\n \t\t\tcase RTE_ML_IO_TYPE_INT8:\n-\t\t\t\tret = rte_ml_io_float32_to_int8(qscale,\n-\t\t\t\t\t\t\t\tmodel->addr.input[i].nb_elements,\n-\t\t\t\t\t\t\t\tlcl_dbuffer, lcl_qbuffer);\n+\t\t\t\tret = rte_ml_io_float32_to_int8(\n+\t\t\t\t\tqscale, model->layer[0].info.input[i].nb_elements,\n+\t\t\t\t\tlcl_dbuffer, lcl_qbuffer);\n \t\t\t\tbreak;\n \t\t\tcase RTE_ML_IO_TYPE_UINT8:\n-\t\t\t\tret = rte_ml_io_float32_to_uint8(qscale,\n-\t\t\t\t\t\t\t\t model->addr.input[i].nb_elements,\n-\t\t\t\t\t\t\t\t lcl_dbuffer, lcl_qbuffer);\n+\t\t\t\tret = rte_ml_io_float32_to_uint8(\n+\t\t\t\t\tqscale, model->layer[0].info.input[i].nb_elements,\n+\t\t\t\t\tlcl_dbuffer, lcl_qbuffer);\n \t\t\t\tbreak;\n \t\t\tcase RTE_ML_IO_TYPE_INT16:\n-\t\t\t\tret = rte_ml_io_float32_to_int16(qscale,\n-\t\t\t\t\t\t\t\t model->addr.input[i].nb_elements,\n-\t\t\t\t\t\t\t\t lcl_dbuffer, lcl_qbuffer);\n+\t\t\t\tret = rte_ml_io_float32_to_int16(\n+\t\t\t\t\tqscale, model->layer[0].info.input[i].nb_elements,\n+\t\t\t\t\tlcl_dbuffer, lcl_qbuffer);\n \t\t\t\tbreak;\n \t\t\tcase RTE_ML_IO_TYPE_UINT16:\n-\t\t\t\tret = rte_ml_io_float32_to_uint16(qscale,\n-\t\t\t\t\t\t\t\t  model->addr.input[i].nb_elements,\n-\t\t\t\t\t\t\t\t  lcl_dbuffer, lcl_qbuffer);\n+\t\t\t\tret = rte_ml_io_float32_to_uint16(\n+\t\t\t\t\tqscale, model->layer[0].info.input[i].nb_elements,\n+\t\t\t\t\tlcl_dbuffer, lcl_qbuffer);\n \t\t\t\tbreak;\n \t\t\tcase RTE_ML_IO_TYPE_FP16:\n-\t\t\t\tret = rte_ml_io_float32_to_float16(model->addr.input[i].nb_elements,\n-\t\t\t\t\t\t\t\t   lcl_dbuffer, lcl_qbuffer);\n+\t\t\t\tret = rte_ml_io_float32_to_float16(\n+\t\t\t\t\tmodel->layer[0].info.input[i].nb_elements, lcl_dbuffer,\n+\t\t\t\t\tlcl_qbuffer);\n \t\t\t\tbreak;\n \t\t\tdefault:\n \t\t\t\tplt_err(\"Unsupported model_input_type[%u] : %u\", i,\n-\t\t\t\t\tmodel->metadata.input1[i].model_input_type);\n+\t\t\t\t\tmodel->layer[0].glow.metadata.input1[i].model_input_type);\n \t\t\t\tret = -ENOTSUP;\n \t\t\t}\n \t\t\tif (ret < 0)\n \t\t\t\treturn ret;\n \t\t}\n \n-\t\tlcl_dbuffer += model->addr.input[i].sz_d;\n-\t\tlcl_qbuffer += model->addr.input[i].sz_q;\n+\t\tlcl_dbuffer += model->layer[0].info.input[i].sz_d;\n+\t\tlcl_qbuffer += model->layer[0].info.input[i].sz_q;\n \t}\n \n \treturn 0;\n@@ -2151,7 +2189,7 @@ static int\n cn10k_ml_io_dequantize(struct rte_ml_dev *dev, uint16_t model_id, struct rte_ml_buff_seg **qbuffer,\n \t\t       struct rte_ml_buff_seg **dbuffer)\n {\n-\tstruct cn10k_ml_model *model;\n+\tstruct cnxk_ml_model *model;\n \tuint8_t model_output_type;\n \tuint8_t *lcl_qbuffer;\n \tuint8_t *lcl_dbuffer;\n@@ -2171,58 +2209,60 @@ cn10k_ml_io_dequantize(struct rte_ml_dev *dev, uint16_t model_id, struct rte_ml_\n \tlcl_dbuffer = dbuffer[0]->addr;\n \tlcl_qbuffer = qbuffer[0]->addr;\n \n-\tfor (i = 0; i < model->metadata.model.num_output; i++) {\n+\tfor (i = 0; i < model->layer[0].glow.metadata.model.num_output; i++) {\n \t\tif (i < MRVL_ML_NUM_INPUT_OUTPUT_1) {\n-\t\t\toutput_type = model->metadata.output1[i].output_type;\n-\t\t\tmodel_output_type = model->metadata.output1[i].model_output_type;\n-\t\t\tdscale = model->metadata.output1[i].dscale;\n+\t\t\toutput_type = model->layer[0].glow.metadata.output1[i].output_type;\n+\t\t\tmodel_output_type =\n+\t\t\t\tmodel->layer[0].glow.metadata.output1[i].model_output_type;\n+\t\t\tdscale = model->layer[0].glow.metadata.output1[i].dscale;\n \t\t} else {\n \t\t\tj = i - MRVL_ML_NUM_INPUT_OUTPUT_1;\n-\t\t\toutput_type = model->metadata.output2[j].output_type;\n-\t\t\tmodel_output_type = model->metadata.output2[j].model_output_type;\n-\t\t\tdscale = model->metadata.output2[j].dscale;\n+\t\t\toutput_type = model->layer[0].glow.metadata.output2[j].output_type;\n+\t\t\tmodel_output_type =\n+\t\t\t\tmodel->layer[0].glow.metadata.output2[j].model_output_type;\n+\t\t\tdscale = model->layer[0].glow.metadata.output2[j].dscale;\n \t\t}\n \n \t\tif (output_type == model_output_type) {\n-\t\t\trte_memcpy(lcl_dbuffer, lcl_qbuffer, model->addr.output[i].sz_q);\n+\t\t\trte_memcpy(lcl_dbuffer, lcl_qbuffer, model->layer[0].info.output[i].sz_q);\n \t\t} else {\n-\t\t\tswitch (model->metadata.output1[i].model_output_type) {\n+\t\t\tswitch (model->layer[0].glow.metadata.output1[i].model_output_type) {\n \t\t\tcase RTE_ML_IO_TYPE_INT8:\n-\t\t\t\tret = rte_ml_io_int8_to_float32(dscale,\n-\t\t\t\t\t\t\t\tmodel->addr.output[i].nb_elements,\n-\t\t\t\t\t\t\t\tlcl_qbuffer, lcl_dbuffer);\n+\t\t\t\tret = rte_ml_io_int8_to_float32(\n+\t\t\t\t\tdscale, model->layer[0].info.output[i].nb_elements,\n+\t\t\t\t\tlcl_qbuffer, lcl_dbuffer);\n \t\t\t\tbreak;\n \t\t\tcase RTE_ML_IO_TYPE_UINT8:\n-\t\t\t\tret = rte_ml_io_uint8_to_float32(dscale,\n-\t\t\t\t\t\t\t\t model->addr.output[i].nb_elements,\n-\t\t\t\t\t\t\t\t lcl_qbuffer, lcl_dbuffer);\n+\t\t\t\tret = rte_ml_io_uint8_to_float32(\n+\t\t\t\t\tdscale, model->layer[0].info.output[i].nb_elements,\n+\t\t\t\t\tlcl_qbuffer, lcl_dbuffer);\n \t\t\t\tbreak;\n \t\t\tcase RTE_ML_IO_TYPE_INT16:\n-\t\t\t\tret = rte_ml_io_int16_to_float32(dscale,\n-\t\t\t\t\t\t\t\t model->addr.output[i].nb_elements,\n-\t\t\t\t\t\t\t\t lcl_qbuffer, lcl_dbuffer);\n+\t\t\t\tret = rte_ml_io_int16_to_float32(\n+\t\t\t\t\tdscale, model->layer[0].info.output[i].nb_elements,\n+\t\t\t\t\tlcl_qbuffer, lcl_dbuffer);\n \t\t\t\tbreak;\n \t\t\tcase RTE_ML_IO_TYPE_UINT16:\n-\t\t\t\tret = rte_ml_io_uint16_to_float32(dscale,\n-\t\t\t\t\t\t\t\t  model->addr.output[i].nb_elements,\n-\t\t\t\t\t\t\t\t  lcl_qbuffer, lcl_dbuffer);\n+\t\t\t\tret = rte_ml_io_uint16_to_float32(\n+\t\t\t\t\tdscale, model->layer[0].info.output[i].nb_elements,\n+\t\t\t\t\tlcl_qbuffer, lcl_dbuffer);\n \t\t\t\tbreak;\n \t\t\tcase RTE_ML_IO_TYPE_FP16:\n \t\t\t\tret = rte_ml_io_float16_to_float32(\n-\t\t\t\t\tmodel->addr.output[i].nb_elements, lcl_qbuffer,\n+\t\t\t\t\tmodel->layer[0].info.output[i].nb_elements, lcl_qbuffer,\n \t\t\t\t\tlcl_dbuffer);\n \t\t\t\tbreak;\n \t\t\tdefault:\n \t\t\t\tplt_err(\"Unsupported model_output_type[%u] : %u\", i,\n-\t\t\t\t\tmodel->metadata.output1[i].model_output_type);\n+\t\t\t\t\tmodel->layer[0].glow.metadata.output1[i].model_output_type);\n \t\t\t\tret = -ENOTSUP;\n \t\t\t}\n \t\t\tif (ret < 0)\n \t\t\t\treturn ret;\n \t\t}\n \n-\t\tlcl_qbuffer += model->addr.output[i].sz_q;\n-\t\tlcl_dbuffer += model->addr.output[i].sz_d;\n+\t\tlcl_qbuffer += model->layer[0].info.output[i].sz_q;\n+\t\tlcl_dbuffer += model->layer[0].info.output[i].sz_d;\n \t}\n \n \treturn 0;\n@@ -2250,10 +2290,10 @@ static __rte_always_inline void\n cn10k_ml_result_update(struct rte_ml_dev *dev, int qp_id, struct cn10k_ml_result *result,\n \t\t       struct rte_ml_op *op)\n {\n-\tstruct cn10k_ml_model_stats *stats;\n+\tstruct cn10k_ml_layer_stats *stats;\n \tstruct cn10k_ml_dev *cn10k_mldev;\n \tstruct cnxk_ml_dev *cnxk_mldev;\n-\tstruct cn10k_ml_model *model;\n+\tstruct cnxk_ml_model *model;\n \tstruct cn10k_ml_qp *qp;\n \tuint64_t hw_latency;\n \tuint64_t fw_latency;\n@@ -2263,9 +2303,9 @@ cn10k_ml_result_update(struct rte_ml_dev *dev, int qp_id, struct cn10k_ml_result\n \t\tif (likely(qp_id >= 0)) {\n \t\t\tqp = dev->data->queue_pairs[qp_id];\n \t\t\tqp->stats.dequeued_count++;\n-\t\t\tstats = &model->burst_stats[qp_id];\n+\t\t\tstats = &model->layer[0].glow.burst_stats[qp_id];\n \t\t} else {\n-\t\t\tstats = model->sync_stats;\n+\t\t\tstats = model->layer[0].glow.sync_stats;\n \t\t}\n \n \t\tif (unlikely(stats->dequeued_count == stats->hw_reset_count)) {\n@@ -2469,7 +2509,7 @@ cn10k_ml_inference_sync(struct rte_ml_dev *dev, struct rte_ml_op *op)\n {\n \tstruct cn10k_ml_dev *cn10k_mldev;\n \tstruct cnxk_ml_dev *cnxk_mldev;\n-\tstruct cn10k_ml_model *model;\n+\tstruct cnxk_ml_model *model;\n \tstruct cn10k_ml_req *req;\n \tbool timeout;\n \tint ret = 0;\n@@ -2477,7 +2517,7 @@ cn10k_ml_inference_sync(struct rte_ml_dev *dev, struct rte_ml_op *op)\n \tcnxk_mldev = dev->data->dev_private;\n \tcn10k_mldev = &cnxk_mldev->cn10k_mldev;\n \tmodel = dev->data->models[op->model_id];\n-\treq = model->req;\n+\treq = model->layer[0].glow.req;\n \n \tcn10k_ml_set_poll_addr(req);\n \tcn10k_ml_prep_fp_job_descriptor(cn10k_mldev, req, op);\ndiff --git a/drivers/ml/cnxk/cnxk_ml_io.h b/drivers/ml/cnxk/cnxk_ml_io.h\nnew file mode 100644\nindex 0000000000..1fa965a232\n--- /dev/null\n+++ b/drivers/ml/cnxk/cnxk_ml_io.h\n@@ -0,0 +1,79 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright (c) 2023 Marvell.\n+ */\n+\n+#ifndef _CNXK_ML_IO_H_\n+#define _CNXK_ML_IO_H_\n+\n+#include <rte_mldev.h>\n+\n+/* Maximum number of models per device */\n+#define ML_CNXK_MAX_MODELS 16\n+\n+/* Maximum number of layers per model */\n+#define ML_CNXK_MODEL_MAX_LAYERS 1\n+\n+/* Maximum number of inputs or outputs per layer or model */\n+#define ML_CNXK_MODEL_MAX_INPUT_OUTPUT 32\n+\n+/* Maximum number of dimensions per I/O shape */\n+#define ML_CNXK_MODEL_MAX_DIMS 8\n+\n+/* Input / Output structure */\n+struct cnxk_ml_io {\n+\t/* name */\n+\tchar name[RTE_ML_STR_MAX];\n+\n+\t/* dequantized data type */\n+\tenum rte_ml_io_type dtype;\n+\n+\t/* quantized data type */\n+\tenum rte_ml_io_type qtype;\n+\n+\t/* Number of dimensions in shape */\n+\tuint32_t nb_dims;\n+\n+\t/* Shape of input */\n+\tuint32_t shape[ML_CNXK_MODEL_MAX_DIMS];\n+\n+\t/* Number of elements */\n+\tuint32_t nb_elements;\n+\n+\t/* Dequantized input size */\n+\tuint32_t sz_d;\n+\n+\t/* Quantized input size */\n+\tuint32_t sz_q;\n+\n+\t/* Scale */\n+\tfloat scale;\n+};\n+\n+/* Model / Layer IO structure */\n+struct cnxk_ml_io_info {\n+\t/* Number of inputs */\n+\tuint16_t nb_inputs;\n+\n+\t/* Model / Layer inputs */\n+\tstruct cnxk_ml_io input[ML_CNXK_MODEL_MAX_INPUT_OUTPUT];\n+\n+\t/* Total size of quantized input */\n+\tuint32_t total_input_sz_q;\n+\n+\t/* Total size of dequantized input */\n+\tuint32_t total_input_sz_d;\n+\n+\t/* Number of outputs */\n+\tuint16_t nb_outputs;\n+\n+\t/* Model / Layer outputs */\n+\tstruct cnxk_ml_io output[ML_CNXK_MODEL_MAX_INPUT_OUTPUT];\n+\n+\t/* Total size of quantized output */\n+\tuint32_t total_output_sz_q;\n+\n+\t/* Total size of dequantized output */\n+\tuint32_t total_output_sz_d;\n+};\n+\n+#endif /* _CNXK_ML_IO_H_ */\ndiff --git a/drivers/ml/cnxk/cnxk_ml_model.c b/drivers/ml/cnxk/cnxk_ml_model.c\nnew file mode 100644\nindex 0000000000..3d735ced3e\n--- /dev/null\n+++ b/drivers/ml/cnxk/cnxk_ml_model.c\n@@ -0,0 +1,7 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright (c) 2023 Marvell.\n+ */\n+\n+#include <rte_mldev.h>\n+\n+#include \"cnxk_ml_model.h\"\ndiff --git a/drivers/ml/cnxk/cnxk_ml_model.h b/drivers/ml/cnxk/cnxk_ml_model.h\nnew file mode 100644\nindex 0000000000..a2994dbb71\n--- /dev/null\n+++ b/drivers/ml/cnxk/cnxk_ml_model.h\n@@ -0,0 +1,111 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright (c) 2023 Marvell.\n+ */\n+\n+#ifndef _CNXK_ML_MODEL_H_\n+#define _CNXK_ML_MODEL_H_\n+\n+#include <rte_mldev.h>\n+\n+#include <roc_api.h>\n+\n+#include \"cn10k_ml_model.h\"\n+\n+#include \"cnxk_ml_io.h\"\n+\n+struct cnxk_ml_dev;\n+struct cnxk_ml_model;\n+\n+/* Model state */\n+enum cnxk_ml_model_state {\n+\t/* Unknown state */\n+\tML_CNXK_MODEL_STATE_UNKNOWN,\n+\n+\t/* Model loaded */\n+\tML_CNXK_MODEL_STATE_LOADED,\n+\n+\t/* A slow-path job is active, start or stop */\n+\tML_CNXK_MODEL_STATE_JOB_ACTIVE,\n+\n+\t/* Model started */\n+\tML_CNXK_MODEL_STATE_STARTED,\n+};\n+\n+/* Layer state */\n+enum cnxk_ml_layer_state {\n+\t/* Unknown state */\n+\tML_CNXK_LAYER_STATE_UNKNOWN,\n+\n+\t/* Layer loaded */\n+\tML_CNXK_LAYER_STATE_LOADED,\n+\n+\t/* A slow-path job is active, start or stop */\n+\tML_CNXK_LAYER_STATE_JOB_ACTIVE,\n+\n+\t/* Layer started */\n+\tML_CNXK_LAYER_STATE_STARTED,\n+};\n+\n+/* Layer object */\n+struct cnxk_ml_layer {\n+\t/* Name*/\n+\tchar name[RTE_ML_STR_MAX];\n+\n+\t/* Model handle */\n+\tstruct cnxk_ml_model *model;\n+\n+\t/* Index mapped with firmware's model_id */\n+\tuint16_t index;\n+\n+\t/* Input / Output */\n+\tstruct cnxk_ml_io_info info;\n+\n+\t/* Batch size */\n+\tuint32_t batch_size;\n+\n+\t/* State */\n+\tenum cnxk_ml_layer_state state;\n+\n+\t/* Glow layer specific data */\n+\tstruct cn10k_ml_layer_data glow;\n+};\n+\n+/* Model Object */\n+struct cnxk_ml_model {\n+\t/* Device reference */\n+\tstruct cnxk_ml_dev *cnxk_mldev;\n+\n+\t/* ID */\n+\tuint16_t model_id;\n+\n+\t/* Name */\n+\tchar name[RTE_ML_STR_MAX];\n+\n+\t/* Model specific data - glow */\n+\tstruct cn10k_ml_model_data glow;\n+\n+\t/* Batch size */\n+\tuint32_t batch_size;\n+\n+\t/* Number of layers */\n+\tuint16_t nb_layers;\n+\n+\t/* Layer info */\n+\tstruct cnxk_ml_layer layer[ML_CNXK_MODEL_MAX_LAYERS];\n+\n+\t/* State */\n+\tenum cnxk_ml_model_state state;\n+\n+\t/* Internal model information structure\n+\t * Size of the buffer = sizeof(struct rte_ml_model_info)\n+\t *                    + num_inputs * sizeof(struct rte_ml_io_info)\n+\t *                    + num_outputs * sizeof(struct rte_ml_io_info).\n+\t * Structures would be arranged in the same order in the buffer.\n+\t */\n+\tuint8_t *info;\n+\n+\t/* Spinlock, used to update model state */\n+\tplt_spinlock_t lock;\n+};\n+\n+#endif /* _CNXK_ML_MODEL_H_ */\ndiff --git a/drivers/ml/cnxk/meson.build b/drivers/ml/cnxk/meson.build\nindex e006fdfe0e..a70956cceb 100644\n--- a/drivers/ml/cnxk/meson.build\n+++ b/drivers/ml/cnxk/meson.build\n@@ -13,6 +13,7 @@ sources = files(\n         'cn10k_ml_model.c',\n         'cn10k_ml_ocm.c',\n         'cnxk_ml_dev.c',\n+        'cnxk_ml_model.c',\n )\n \n deps += ['mldev', 'common_cnxk', 'kvargs', 'hash']\n",
    "prefixes": [
        "v9",
        "03/34"
    ]
}