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GET /api/patches/139659/?format=api
{ "id": 139659, "url": "http://patchwork.dpdk.org/api/patches/139659/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/30677871bd5aece7288bb6e77178e8cf0286fe63.1713964708.git.anatoly.burakov@intel.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<30677871bd5aece7288bb6e77178e8cf0286fe63.1713964708.git.anatoly.burakov@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/30677871bd5aece7288bb6e77178e8cf0286fe63.1713964708.git.anatoly.burakov@intel.com", "date": "2024-04-24T13:21:48", "name": "[v1,14/22] net/ixgbe/base: remove non-inclusive language", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "715543f07583a73a4652269310268b6491b648b1", "submitter": { "id": 4, "url": "http://patchwork.dpdk.org/api/people/4/?format=api", "name": "Anatoly Burakov", "email": "anatoly.burakov@intel.com" }, "delegate": { "id": 10, "url": "http://patchwork.dpdk.org/api/users/10/?format=api", "username": "bruce", "first_name": "Bruce", "last_name": "Richardson", "email": "bruce.richardson@intel.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/30677871bd5aece7288bb6e77178e8cf0286fe63.1713964708.git.anatoly.burakov@intel.com/mbox/", "series": [ { "id": 31814, "url": "http://patchwork.dpdk.org/api/series/31814/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=31814", "date": "2024-04-24T13:21:34", "name": "Update IXGBE base driver", "version": 1, "mbox": "http://patchwork.dpdk.org/series/31814/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/139659/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/139659/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id B707643EAD;\n\tWed, 24 Apr 2024 15:23:57 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 1A93A434C5;\n\tWed, 24 Apr 2024 15:22:50 +0200 (CEST)", "from mgamail.intel.com (mgamail.intel.com [192.198.163.9])\n by mails.dpdk.org (Postfix) with ESMTP id 899A4434CB\n for <dev@dpdk.org>; Wed, 24 Apr 2024 15:22:48 +0200 (CEST)", "from fmviesa006.fm.intel.com ([10.60.135.146])\n by fmvoesa103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 24 Apr 2024 06:22:48 -0700", "from silpixa00401119.ir.intel.com ([10.55.129.167])\n by fmviesa006.fm.intel.com with ESMTP; 24 Apr 2024 06:22:46 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1713964969; x=1745500969;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=A0z/eidMKpgXrDBHtUuns29/n9YUomGkQ09fbx9dlTw=;\n b=LtwU5Fz2eIgf0fXJCSzD50c9JiRqqCNwWXQrfSRaWOzRPZwgIca77XoO\n Cxqw7Ocue7BlMziDlPrviadKc43I5QddRyvOuGI4cBYiAh4I5rRiLExHX\n GpfYtf9bxD4tbxnOVsDOpWhn1k2Qac/59XbMciW4QAqQLoRnM/aNIFs+b\n uFdgVF+jmg6CsG+NAgco8U7iFjR1ehcgNLUWmG1c+H+zBn4s+kByr6Nll\n yONnGu3tCmsz8mSKdxy/tlbX679MLeHjF5LoGC6fmSQiewTXwpeFASWEY\n ikRgKpoLT0eL8Ft0VmFUrEgqfAp8GUC9V3ZS6sji2r54n4vpRrLNLN8CV w==;", "X-CSE-ConnectionGUID": [ "qbkVwdUARXiCnfNWN19rPg==", "FmVmTQ2dTwaUV5IVkQd/9g==" ], "X-CSE-MsgGUID": [ "0lFOY/0WQ/KhR1ioN4DXFg==", "RthjyqMcT5yytLIJfPCSZA==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6600,9927,11054\"; a=\"20289273\"", "E=Sophos;i=\"6.07,226,1708416000\"; d=\"scan'208\";a=\"20289273\"", "E=Sophos;i=\"6.07,226,1708416000\"; d=\"scan'208\";a=\"24749466\"" ], "X-ExtLoop1": "1", "From": "Anatoly Burakov <anatoly.burakov@intel.com>", "To": "dev@dpdk.org", "Cc": "Marcin Jurczak <marcin.jurczak@intel.com>,\n\tvladimir.medvedkin@intel.com, bruce.richardson@intel.com,\n\tMichael@dpdk.org, Alice <alice.michael@intel.com>", "Subject": "[PATCH v1 14/22] net/ixgbe/base: remove non-inclusive language", "Date": "Wed, 24 Apr 2024 14:21:48 +0100", "Message-ID": "\n <30677871bd5aece7288bb6e77178e8cf0286fe63.1713964708.git.anatoly.burakov@intel.com>", "X-Mailer": "git-send-email 2.43.0", "In-Reply-To": "<cover.1713964707.git.anatoly.burakov@intel.com>", "References": "<cover.1713964707.git.anatoly.burakov@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Marcin Jurczak <marcin.jurczak@intel.com>\n\nThis patch removes non-inclusive language from code, user interface\nand comments.\n\nSigned-off-by: Marcin Jurczak <marcin.jurczak@intel.com>\nReviewed-by: Michael, Alice <alice.michael@intel.com>\n---\n drivers/net/ixgbe/base/ixgbe_common.c | 34 +++++++++++++--------------\n drivers/net/ixgbe/base/ixgbe_common.h | 2 +-\n drivers/net/ixgbe/base/ixgbe_type.h | 10 ++++----\n drivers/net/ixgbe/ixgbe_ethdev.c | 2 +-\n 4 files changed, 24 insertions(+), 24 deletions(-)", "diff": "diff --git a/drivers/net/ixgbe/base/ixgbe_common.c b/drivers/net/ixgbe/base/ixgbe_common.c\nindex 27f633bc2f..bb6e72fbe6 100644\n--- a/drivers/net/ixgbe/base/ixgbe_common.c\n+++ b/drivers/net/ixgbe/base/ixgbe_common.c\n@@ -140,7 +140,7 @@ bool ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw)\n \tswitch (hw->phy.media_type) {\n \tcase ixgbe_media_type_fiber_qsfp:\n \tcase ixgbe_media_type_fiber:\n-\t\t/* flow control autoneg black list */\n+\t\t/* flow control autoneg block list */\n \t\tswitch (hw->device_id) {\n \t\tcase IXGBE_DEV_ID_X550EM_A_SFP:\n \t\tcase IXGBE_DEV_ID_X550EM_A_SFP_N:\n@@ -1108,10 +1108,10 @@ s32 ixgbe_stop_adapter_generic(struct ixgbe_hw *hw)\n \tmsec_delay(2);\n \n \t/*\n-\t * Prevent the PCI-E bus from hanging by disabling PCI-E master\n+\t * Prevent the PCI-E bus from hanging by disabling PCI-E primary\n \t * access and verify no pending requests\n \t */\n-\treturn ixgbe_disable_pcie_master(hw);\n+\treturn ixgbe_disable_pcie_primary(hw);\n }\n \n /**\n@@ -3169,32 +3169,32 @@ STATIC u32 ixgbe_pcie_timeout_poll(struct ixgbe_hw *hw)\n }\n \n /**\n- * ixgbe_disable_pcie_master - Disable PCI-express master access\n+ * ixgbe_disable_pcie_primary - Disable PCI-express primary access\n * @hw: pointer to hardware structure\n *\n- * Disables PCI-Express master access and verifies there are no pending\n- * requests. IXGBE_ERR_MASTER_REQUESTS_PENDING is returned if master disable\n- * bit hasn't caused the master requests to be disabled, else IXGBE_SUCCESS\n- * is returned signifying master requests disabled.\n+ * Disables PCI-Express primary access and verifies there are no pending\n+ * requests. IXGBE_ERR_PRIMARY_REQUESTS_PENDING is returned if primary disable\n+ * bit hasn't caused the primary requests to be disabled, else IXGBE_SUCCESS\n+ * is returned signifying primary requests disabled.\n **/\n-s32 ixgbe_disable_pcie_master(struct ixgbe_hw *hw)\n+s32 ixgbe_disable_pcie_primary(struct ixgbe_hw *hw)\n {\n \ts32 status = IXGBE_SUCCESS;\n \tu32 i, poll;\n \tu16 value;\n \n-\tDEBUGFUNC(\"ixgbe_disable_pcie_master\");\n+\tDEBUGFUNC(\"ixgbe_disable_pcie_primary\");\n \n \t/* Always set this bit to ensure any future transactions are blocked */\n \tIXGBE_WRITE_REG(hw, IXGBE_CTRL, IXGBE_CTRL_GIO_DIS);\n \n-\t/* Exit if master requests are blocked */\n+\t/* Exit if primary requests are blocked */\n \tif (!(IXGBE_READ_REG(hw, IXGBE_STATUS) & IXGBE_STATUS_GIO) ||\n \t IXGBE_REMOVED(hw->hw_addr))\n \t\tgoto out;\n \n-\t/* Poll for master request bit to clear */\n-\tfor (i = 0; i < IXGBE_PCI_MASTER_DISABLE_TIMEOUT; i++) {\n+\t/* Poll for primary request bit to clear */\n+\tfor (i = 0; i < IXGBE_PCI_PRIMARY_DISABLE_TIMEOUT; i++) {\n \t\tusec_delay(100);\n \t\tif (!(IXGBE_READ_REG(hw, IXGBE_STATUS) & IXGBE_STATUS_GIO))\n \t\t\tgoto out;\n@@ -3202,13 +3202,13 @@ s32 ixgbe_disable_pcie_master(struct ixgbe_hw *hw)\n \n \t/*\n \t * Two consecutive resets are required via CTRL.RST per datasheet\n-\t * 5.2.5.3.2 Master Disable. We set a flag to inform the reset routine\n-\t * of this need. The first reset prevents new master requests from\n+\t * 5.2.5.3.2 Primary Disable. We set a flag to inform the reset routine\n+\t * of this need. The first reset prevents new primary requests from\n \t * being issued by our device. We then must wait 1usec or more for any\n \t * remaining completions from the PCIe bus to trickle in, and then reset\n \t * again to clear out any effects they may have had on our device.\n \t */\n-\tDEBUGOUT(\"GIO Master Disable bit didn't clear - requesting resets\\n\");\n+\tDEBUGOUT(\"GIO Primary Disable bit didn't clear - requesting resets\\n\");\n \thw->mac.flags |= IXGBE_FLAGS_DOUBLE_RESET_REQUIRED;\n \n \tif (hw->mac.type >= ixgbe_mac_X550)\n@@ -3230,7 +3230,7 @@ s32 ixgbe_disable_pcie_master(struct ixgbe_hw *hw)\n \n \tERROR_REPORT1(IXGBE_ERROR_POLLING,\n \t\t \"PCIe transaction pending bit also did not clear.\\n\");\n-\tstatus = IXGBE_ERR_MASTER_REQUESTS_PENDING;\n+\tstatus = IXGBE_ERR_PRIMARY_REQUESTS_PENDING;\n \n out:\n \treturn status;\ndiff --git a/drivers/net/ixgbe/base/ixgbe_common.h b/drivers/net/ixgbe/base/ixgbe_common.h\nindex 5bdb484407..bc4466ddf3 100644\n--- a/drivers/net/ixgbe/base/ixgbe_common.h\n+++ b/drivers/net/ixgbe/base/ixgbe_common.h\n@@ -88,7 +88,7 @@ s32 ixgbe_setup_fc_generic(struct ixgbe_hw *hw);\n s32 ixgbe_validate_mac_addr(u8 *mac_addr);\n s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u32 mask);\n void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u32 mask);\n-s32 ixgbe_disable_pcie_master(struct ixgbe_hw *hw);\n+s32 ixgbe_disable_pcie_primary(struct ixgbe_hw *hw);\n \n s32 prot_autoc_read_generic(struct ixgbe_hw *hw, bool *, u32 *reg_val);\n s32 prot_autoc_write_generic(struct ixgbe_hw *hw, u32 reg_val, bool locked);\ndiff --git a/drivers/net/ixgbe/base/ixgbe_type.h b/drivers/net/ixgbe/base/ixgbe_type.h\nindex ec832fb1b0..5bf03a1f62 100644\n--- a/drivers/net/ixgbe/base/ixgbe_type.h\n+++ b/drivers/net/ixgbe/base/ixgbe_type.h\n@@ -1456,7 +1456,7 @@ struct ixgbe_dmac_config {\n #define IXGBE_PSRTYPE_RQPL_SHIFT\t29\n \n /* CTRL Bit Masks */\n-#define IXGBE_CTRL_GIO_DIS\t0x00000004 /* Global IO Master Disable bit */\n+#define IXGBE_CTRL_GIO_DIS\t0x00000004 /* Global IO Primary Disable bit */\n #define IXGBE_CTRL_LNK_RST\t0x00000008 /* Link Reset. Resets everything. */\n #define IXGBE_CTRL_RST\t\t0x04000000 /* Reset (SW) */\n #define IXGBE_CTRL_RST_MASK\t(IXGBE_CTRL_LNK_RST | IXGBE_CTRL_RST)\n@@ -2104,7 +2104,7 @@ enum {\n /* STATUS Bit Masks */\n #define IXGBE_STATUS_LAN_ID\t\t0x0000000C /* LAN ID */\n #define IXGBE_STATUS_LAN_ID_SHIFT\t2 /* LAN ID Shift*/\n-#define IXGBE_STATUS_GIO\t\t0x00080000 /* GIO Master Ena Status */\n+#define IXGBE_STATUS_GIO\t\t0x00080000 /* GIO Primary Ena Status */\n \n #define IXGBE_STATUS_LAN_ID_0\t0x00000000 /* LAN ID 0 */\n #define IXGBE_STATUS_LAN_ID_1\t0x00000004 /* LAN ID 1 */\n@@ -2514,8 +2514,8 @@ enum {\n #define IXGBE_PCIDEVCTRL2_4_8s\t\t0xd\n #define IXGBE_PCIDEVCTRL2_17_34s\t0xe\n \n-/* Number of 100 microseconds we wait for PCI Express master disable */\n-#define IXGBE_PCI_MASTER_DISABLE_TIMEOUT\t800\n+/* Number of 100 microseconds we wait for PCI Express primary disable */\n+#define IXGBE_PCI_PRIMARY_DISABLE_TIMEOUT\t800\n \n /* Check whether address is multicast. This is little-endian specific check.*/\n #define IXGBE_IS_MULTICAST(Address) \\\n@@ -4185,7 +4185,7 @@ struct ixgbe_hw {\n #define IXGBE_ERR_ADAPTER_STOPPED\t\t-9\n #define IXGBE_ERR_INVALID_MAC_ADDR\t\t-10\n #define IXGBE_ERR_DEVICE_NOT_SUPPORTED\t\t-11\n-#define IXGBE_ERR_MASTER_REQUESTS_PENDING\t-12\n+#define IXGBE_ERR_PRIMARY_REQUESTS_PENDING\t-12\n #define IXGBE_ERR_INVALID_LINK_SETTINGS\t\t-13\n #define IXGBE_ERR_AUTONEG_NOT_COMPLETE\t\t-14\n #define IXGBE_ERR_RESET_FAILED\t\t\t-15\ndiff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c\nindex f2a397a451..0a0cfb9674 100644\n--- a/drivers/net/ixgbe/ixgbe_ethdev.c\n+++ b/drivers/net/ixgbe/ixgbe_ethdev.c\n@@ -3053,7 +3053,7 @@ ixgbe_dev_close(struct rte_eth_dev *dev)\n \n \tixgbe_dev_free_queues(dev);\n \n-\tixgbe_disable_pcie_master(hw);\n+\tixgbe_disable_pcie_primary(hw);\n \n \t/* reprogram the RAR[0] in case user changed it. */\n \tixgbe_set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);\n", "prefixes": [ "v1", "14/22" ] }