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http://patchwork.dpdk.org/comment/169975/", "msgid": "<98CBD80474FA8B44BF855DF32C47DC35E9F454@smartserver.smartshare.dk>", "list_archive_url": "https://inbox.dpdk.org/dev/98CBD80474FA8B44BF855DF32C47DC35E9F454@smartserver.smartshare.dk", "date": "2024-05-15T09:30:45", "subject": "RE: [PATCH v3 1/7] eal: generic 64 bit counter", "submitter": { "id": 591, "url": "http://patchwork.dpdk.org/api/people/591/?format=api", "name": "Morten Brørup", "email": "mb@smartsharesystems.com" }, "content": "+To: @Mattias, @Ferruh, @Bruce, participants in a related discussion\n\n> From: Stephen Hemminger [mailto:stephen@networkplumber.org]\n> Sent: Tuesday, 14 May 2024 17.35\n> \n> This header implements 64 bit counters that are NOT atomic\n> but are safe against load/store splits on 32 bit platforms.\n> \n> Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>\n> Acked-by: Morten Brørup <mb@smartsharesystems.com>\n> ---\n\nWith a long term perspective, I consider this patch very useful.\nAnd its 32 bit implementation can be optimized for various architectures/compilers later.\n\n\nIn addition, it would be \"nice to have\" if reset() and fetch() could be called from another thread than the thread adding to the counter.\n\nAs previously discussed [1], I think it can be done without significantly affecting fast path add() performance, by using an \"offset\" with Release-Consume ordering.\n\n[1]: https://inbox.dpdk.org/dev/98CBD80474FA8B44BF855DF32C47DC35E9F427@smartserver.smartshare.dk/\n\n\nrte_counter64_add(rte_counter64_t *counter, uint32_t val)\n{\n\t// Write \"counter\" with memory_order_relaxed, so\n\t// it eventually becomes visible in other threads.\n\n\trte_counter64_t ctr = *counter + val;\n\trte_atomic_store_explicit(counter, ctr, rte_memory_order_relaxed);\n}\n\nrte_counter64_get(rte_counter64_t *counter, rte_counter64_t *offset)\n{\n\t// Read \"offset\" with memory_order_consume, so:\n\t// - no reads or writes in the current thread dependent on \"offset\"\n\t// can be reordered before this load, and\n\t// - writes to \"counter\" (a data-dependent variable)\n\t// in other threads that release \"offset\" are visible in the current thread.\n\n\trte_counter64_t off = rte_atomic_load_explicit(offset, rte_memory_order_consume);\n\trte_counter64_t ctr = rte_atomic_load_explicit(counter, rte_memory_order_relaxed);\n\n\treturn ctr - off;\n}\n\nrte_counter64_reset(rte_counter64_t *counter, rte_counter64_t *offset)\n{\n\t// Write \"offset\" with memory_order_release, so\n\t// \"counter\" cannot be visible after it.\n\n\trte_counter64_t ctr = rte_atomic_load_explicit(offset, rte_memory_order_relaxed);\n\trte_atomic_store_explicit(offset, ctr, rte_memory_order_release);\n}\n\n\nSupport for counters shared by multi threads, e.g. rte_eth_devices[rxq->port_id].data->rx_mbuf_alloc_failed, should be provided too:\n\nrte_counter64_mt_add(rte_counter64_t *counter, uint32_t val)\n{\n\trte_atomic_fetch_add_explicit(counter, val, rte_memory_order_relaxed);\n}\n\n\n> lib/eal/include/meson.build | 1 +\n> lib/eal/include/rte_counter.h | 91 +++++++++++++++++++++++++++++++++++\n> 2 files changed, 92 insertions(+)\n> create mode 100644 lib/eal/include/rte_counter.h\n> \n> diff --git a/lib/eal/include/meson.build b/lib/eal/include/meson.build\n> index e94b056d46..c070dd0079 100644\n> --- a/lib/eal/include/meson.build\n> +++ b/lib/eal/include/meson.build\n> @@ -12,6 +12,7 @@ headers += files(\n> 'rte_class.h',\n> 'rte_common.h',\n> 'rte_compat.h',\n> + 'rte_counter.h',\n> 'rte_debug.h',\n> 'rte_dev.h',\n> 'rte_devargs.h',\n> diff --git a/lib/eal/include/rte_counter.h b/lib/eal/include/rte_counter.h\n> new file mode 100644\n> index 0000000000..8068d6d26e\n> --- /dev/null\n> +++ b/lib/eal/include/rte_counter.h\n> @@ -0,0 +1,91 @@\n> +/* SPDX-License-Identifier: BSD-3-Clause\n> + * Copyright (c) Stephen Hemminger <stephen@networkplumber.org>\n> + */\n> +\n> +#ifndef _RTE_COUNTER_H_\n> +#define _RTE_COUNTER_H_\n> +\n> +#ifdef __cplusplus\n> +extern \"C\" {\n> +#endif\n> +\n> +/**\n> + * @file\n> + * RTE Counter\n> + *\n> + * A counter is 64 bit value that is safe from split read/write\n> + * on 32 bit platforms. It assumes that only one cpu at a time\n> + * will update the counter, and another CPU may want to read it.\n> + *\n> + * This is a much weaker guarantee than full atomic variables\n> + * but is faster since no locked operations are required for update.\n> + */\n> +\n> +#include <stdatomic.h>\n> +\n> +#ifdef RTE_ARCH_64\n> +/*\n> + * On a platform that can support native 64 bit type, no special handling.\n> + * These are just wrapper around 64 bit value.\n> + */\n> +typedef uint64_t rte_counter64_t;\n> +\n> +/**\n> + * Add value to counter.\n> + */\n> +__rte_experimental\n> +static inline void\n> +rte_counter64_add(rte_counter64_t *counter, uint32_t val)\n> +{\n> +\t*counter += val;\n> +}\n> +\n> +__rte_experimental\n> +static inline uint64_t\n> +rte_counter64_fetch(const rte_counter64_t *counter)\n> +{\n> +\treturn *counter;\n> +}\n> +\n> +__rte_experimental\n> +static inline void\n> +rte_counter64_reset(rte_counter64_t *counter)\n> +{\n> +\t*counter = 0;\n> +}\n> +\n> +#else\n> +/*\n> + * On a 32 bit platform need to use atomic to force the compler to not\n> + * split 64 bit read/write.\n> + */\n> +typedef RTE_ATOMIC(uint64_t) rte_counter64_t;\n> +\n> +__rte_experimental\n> +static inline void\n> +rte_counter64_add(rte_counter64_t *counter, uint32_t val)\n> +{\n> +\trte_atomic_fetch_add_explicit(counter, val, rte_memory_order_relaxed);\n> +}\n> +\n> +__rte_experimental\n> +static inline uint64_t\n> +rte_counter64_fetch(const rte_counter64_t *counter)\n> +{\n> +\treturn rte_atomic_load_explicit(counter, rte_memory_order_relaxed);\n> +}\n> +\n> +__rte_experimental\n> +static inline void\n> +rte_counter64_reset(rte_counter64_t *counter)\n> +{\n> +\trte_atomic_store_explicit(counter, 0, rte_memory_order_relaxed);\n> +}\n> +#endif\n> +\n> +\n> +#ifdef __cplusplus\n> +}\n> +#endif\n> +\n> +#endif /* _RTE_COUNTER_H_ */\n> --\n> 2.43.0", "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 0F38744034;\n\tWed, 15 May 2024 11:30:52 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id C0C0E4025C;\n\tWed, 15 May 2024 11:30:50 +0200 (CEST)", "from dkmailrelay1.smartsharesystems.com\n (smartserver.smartsharesystems.com [77.243.40.215])\n by mails.dpdk.org (Postfix) with ESMTP id 30C704021D\n for <dev@dpdk.org>; Wed, 15 May 2024 11:30:49 +0200 (CEST)", "from smartserver.smartsharesystems.com\n (smartserver.smartsharesys.local [192.168.4.10])\n by dkmailrelay1.smartsharesystems.com (Postfix) with ESMTP id EBBE820568;\n Wed, 15 May 2024 11:30:48 +0200 (CEST)" ], "Content-class": "urn:content-classes:message", "MIME-Version": "1.0", "Content-Type": "text/plain;\n\tcharset=\"UTF-8\"", "Content-Transfer-Encoding": "base64", "Subject": "RE: [PATCH v3 1/7] eal: generic 64 bit counter", "X-MimeOLE": "Produced By Microsoft Exchange V6.5", "Date": "Wed, 15 May 2024 11:30:45 +0200", "Message-ID": "<98CBD80474FA8B44BF855DF32C47DC35E9F454@smartserver.smartshare.dk>", "In-Reply-To": "<20240514153845.42489-2-stephen@networkplumber.org>", "X-MS-Has-Attach": "", "X-MS-TNEF-Correlator": "", "Thread-Topic": "[PATCH v3 1/7] eal: generic 64 bit counter", "Thread-Index": "AdqmFNcwBPiahSQdR1mMuKiYnl1xKAAhMadg", "References": "<20240510050507.14381-1-stephen@networkplumber.org>\n <20240514153845.42489-1-stephen@networkplumber.org>\n <20240514153845.42489-2-stephen@networkplumber.org>", "From": "=?utf-8?q?Morten_Br=C3=B8rup?= <mb@smartsharesystems.com>", "To": "\"Stephen Hemminger\" <stephen@networkplumber.org>, <dev@dpdk.org>,\n\t=?utf-8?q?Mattias_R=C3=B6nnblom?= <mattias.ronnblom@ericsson.com>,\n\t=?utf-8?q?Mattias_R=C3=B6nnblom?= <hofors@lysator.liu.se>,\n \"Ferruh Yigit\" <ferruh.yigit@amd.com>, <bruce.richardson@intel.com>", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "addressed": null }{ "id": 169975, "web_url": "