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GET /api/patches/57233/?format=api
{ "id": 57233, "url": "http://patchwork.dpdk.org/api/patches/57233/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/1564401209-18752-3-git-send-email-matan@mellanox.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1564401209-18752-3-git-send-email-matan@mellanox.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1564401209-18752-3-git-send-email-matan@mellanox.com", "date": "2019-07-29T11:53:20", "name": "[02/11] net/mlx5: limit LRO size to the maximum Rx packet", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "da29a534aeacd92948c8988708d3a166ae9c9480", "submitter": { "id": 796, "url": "http://patchwork.dpdk.org/api/people/796/?format=api", "name": "Matan Azrad", "email": "matan@mellanox.com" }, "delegate": { "id": 3268, "url": "http://patchwork.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/1564401209-18752-3-git-send-email-matan@mellanox.com/mbox/", "series": [ { "id": 5809, "url": "http://patchwork.dpdk.org/api/series/5809/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=5809", "date": "2019-07-29T11:53:21", "name": "net/mlx5: LRO fixes and enhancements", "version": 1, "mbox": "http://patchwork.dpdk.org/series/5809/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/57233/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/57233/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id DCD5E1BF87;\n\tMon, 29 Jul 2019 14:16:49 +0200 (CEST)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n\tby dpdk.org (Postfix) with ESMTP id 65AED1BF5C\n\tfor <dev@dpdk.org>; Mon, 29 Jul 2019 14:16:35 +0200 (CEST)", "from Internal Mail-Server by MTLPINE2 (envelope-from\n\tmatan@mellanox.com)\n\twith ESMTPS (AES256-SHA encrypted); 29 Jul 2019 15:16:29 +0300", "from pegasus07.mtr.labs.mlnx (pegasus07.mtr.labs.mlnx\n\t[10.210.16.112])\n\tby labmailer.mlnx (8.13.8/8.13.8) with ESMTP id x6TCGS4G021429;\n\tMon, 29 Jul 2019 15:16:29 +0300" ], "From": "Matan Azrad <matan@mellanox.com>", "To": "Shahaf Shuler <shahafs@mellanox.com>, Yongseok Koh <yskoh@mellanox.com>, \n\tViacheslav Ovsiienko <viacheslavo@mellanox.com>", "Cc": "dev@dpdk.org, Dekel Peled <dekelp@mellanox.com>", "Date": "Mon, 29 Jul 2019 11:53:20 +0000", "Message-Id": "<1564401209-18752-3-git-send-email-matan@mellanox.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1564401209-18752-1-git-send-email-matan@mellanox.com>", "References": "<1564401209-18752-1-git-send-email-matan@mellanox.com>", "Subject": "[dpdk-dev] [PATCH 02/11] net/mlx5: limit LRO size to the maximum Rx\n\tpacket", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "The field max_rx_pkt_len in Rx configuration indicates the maximum size\nfor Rx packet to be received.\n\nThere was no any field to indicate the maximum size of LRO packet to be\nreceived by the application.\n\nAssuming the user configures max_rx_pkt_len as the maximum LRO packet\nlength when LRO is configured on the port, the PMD limits the maximum\nLRO packet size received from HW to be max_rx_pkt_len.\n\nSigned-off-by: Matan Azrad <matan@mellanox.com>\nAcked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>\n---\n drivers/net/mlx5/mlx5_prm.h | 5 +++++\n drivers/net/mlx5/mlx5_rxq.c | 38 ++++++++++++++++++--------------------\n 2 files changed, 23 insertions(+), 20 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5_prm.h b/drivers/net/mlx5/mlx5_prm.h\nindex 32bc7a6..0716bbd 100644\n--- a/drivers/net/mlx5/mlx5_prm.h\n+++ b/drivers/net/mlx5/mlx5_prm.h\n@@ -1465,6 +1465,11 @@ enum {\n \tMLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST = 0x2,\n };\n \n+enum {\n+\tMLX5_LRO_MAX_MSG_SIZE_START_FROM_L4 = 0x0,\n+\tMLX5_LRO_MAX_MSG_SIZE_START_FROM_L2 = 0x1,\n+};\n+\n struct mlx5_ifc_tirc_bits {\n \tu8 reserved_at_0[0x20];\n \tu8 disp_type[0x4];\ndiff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c\nindex dc878f2..bd26ee2 100644\n--- a/drivers/net/mlx5/mlx5_rxq.c\n+++ b/drivers/net/mlx5/mlx5_rxq.c\n@@ -1543,37 +1543,35 @@ struct mlx5_rxq_obj *\n \treturn 0;\n }\n \n+#define MLX5_MAX_LRO_SIZE (UINT8_MAX * 256u)\n+#define MLX5_MAX_TCP_HDR_OFFSET ((unsigned int)(sizeof(struct rte_ether_hdr) + \\\n+\t\t\t\t\tsizeof(struct rte_vlan_hdr) * 2 + \\\n+\t\t\t\t\tsizeof(struct rte_ipv6_hdr)))\n /**\n * Adjust the maximum LRO massage size.\n- * LRO massage is contained in the MPRQ strides.\n- * While the LRO massage size cannot be bigger than 65280 according to the\n- * PRM, the strides which contain it may be bigger.\n- * Adjust the maximum LRO massage size to avoid the above option.\n *\n * @param dev\n * Pointer to Ethernet device.\n- * @param strd_n\n- * Number of strides per WQE..\n- * @param strd_sz\n- * The stride size.\n+ * @param max_lro_size\n+ * The maximum size for LRO packet.\n */\n static void\n-mlx5_max_lro_msg_size_adjust(struct rte_eth_dev *dev, uint32_t strd_n,\n-\t\t\t uint32_t strd_sz)\n+mlx5_max_lro_msg_size_adjust(struct rte_eth_dev *dev, uint32_t max_lro_size)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n-\tuint32_t max_buf_len = strd_sz * strd_n;\n \n-\tif (max_buf_len > (uint64_t)UINT16_MAX)\n-\t\tmax_buf_len = RTE_ALIGN_FLOOR((uint32_t)UINT16_MAX, strd_sz);\n-\tmax_buf_len /= 256;\n-\tmax_buf_len = RTE_MIN(max_buf_len, (uint32_t)UINT8_MAX);\n-\tassert(max_buf_len);\n+\tif (priv->config.hca_attr.lro_max_msg_sz_mode ==\n+\t MLX5_LRO_MAX_MSG_SIZE_START_FROM_L4 && max_lro_size >\n+\t MLX5_MAX_TCP_HDR_OFFSET)\n+\t\tmax_lro_size -= MLX5_MAX_TCP_HDR_OFFSET;\n+\tmax_lro_size = RTE_MIN(max_lro_size, MLX5_MAX_LRO_SIZE);\n+\tassert(max_lro_size >= 256u);\n+\tmax_lro_size /= 256u;\n \tif (priv->max_lro_msg_size)\n \t\tpriv->max_lro_msg_size =\n-\t\t\tRTE_MIN((uint32_t)priv->max_lro_msg_size, max_buf_len);\n+\t\t\tRTE_MIN((uint32_t)priv->max_lro_msg_size, max_lro_size);\n \telse\n-\t\tpriv->max_lro_msg_size = max_buf_len;\n+\t\tpriv->max_lro_msg_size = max_lro_size;\n }\n \n /**\n@@ -1671,8 +1669,8 @@ struct mlx5_rxq_ctrl *\n \t\ttmpl->rxq.strd_headroom_en = strd_headroom_en;\n \t\ttmpl->rxq.mprq_max_memcpy_len = RTE_MIN(mb_len -\n \t\t\t RTE_PKTMBUF_HEADROOM, config->mprq.max_memcpy_len);\n-\t\tmlx5_max_lro_msg_size_adjust(dev, (1 << tmpl->rxq.strd_num_n),\n-\t\t\t\t\t (1 << tmpl->rxq.strd_sz_n));\n+\t\tmlx5_max_lro_msg_size_adjust(dev, RTE_MIN(max_rx_pkt_len,\n+\t\t (1u << tmpl->rxq.strd_num_n) * (1u << tmpl->rxq.strd_sz_n)));\n \t\tDRV_LOG(DEBUG,\n \t\t\t\"port %u Rx queue %u: Multi-Packet RQ is enabled\"\n \t\t\t\" strd_num_n = %u, strd_sz_n = %u\",\n", "prefixes": [ "02/11" ] }