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GET /api/patches/65866/?format=api
{ "id": 65866, "url": "http://patchwork.dpdk.org/api/patches/65866/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/1582028721-637-1-git-send-email-matan@mellanox.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1582028721-637-1-git-send-email-matan@mellanox.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1582028721-637-1-git-send-email-matan@mellanox.com", "date": "2020-02-18T12:25:21", "name": "vdpa/mlx5: fix completion queue arming", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "c250aef5c926446d05e344c242e1a5f0fad4c534", "submitter": { "id": 796, "url": "http://patchwork.dpdk.org/api/people/796/?format=api", "name": "Matan Azrad", "email": "matan@mellanox.com" }, "delegate": { "id": 2642, "url": "http://patchwork.dpdk.org/api/users/2642/?format=api", "username": "mcoquelin", "first_name": "Maxime", "last_name": "Coquelin", "email": "maxime.coquelin@redhat.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/1582028721-637-1-git-send-email-matan@mellanox.com/mbox/", "series": [ { "id": 8583, "url": "http://patchwork.dpdk.org/api/series/8583/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=8583", "date": "2020-02-18T12:25:21", "name": "vdpa/mlx5: fix completion queue arming", "version": 1, "mbox": "http://patchwork.dpdk.org/series/8583/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/65866/comments/", "check": "fail", "checks": "http://patchwork.dpdk.org/api/patches/65866/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id CF3B4A054F;\n\tTue, 18 Feb 2020 13:25:31 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 02CF21D527;\n\tTue, 18 Feb 2020 13:25:31 +0100 (CET)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by dpdk.org (Postfix) with ESMTP id 1BB0D1D526\n for <dev@dpdk.org>; Tue, 18 Feb 2020 13:25:29 +0100 (CET)", "from Internal Mail-Server by MTLPINE2 (envelope-from\n asafp@mellanox.com)\n with ESMTPS (AES256-SHA encrypted); 18 Feb 2020 14:25:23 +0200", "from pegasus07.mtr.labs.mlnx (pegasus07.mtr.labs.mlnx\n [10.210.16.112])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 01ICPNrT027971;\n Tue, 18 Feb 2020 14:25:23 +0200" ], "From": "Matan Azrad <matan@mellanox.com>", "To": "dev@dpdk.org", "Cc": "Viacheslav Ovsiienko <viacheslavo@mellanox.com>,\n Maxime Coquelin <maxime.coquelin@redhat.com>", "Date": "Tue, 18 Feb 2020 12:25:21 +0000", "Message-Id": "<1582028721-637-1-git-send-email-matan@mellanox.com>", "X-Mailer": "git-send-email 1.8.3.1", "Subject": "[dpdk-dev] [PATCH] vdpa/mlx5: fix completion queue arming", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "The mlx5 vDPA driver manages QP and CQ in order to forward the HW event\nto the guest by the callfd file descriptor for each virtq.\n\nThe driver arms the CQ for the next CQE index that should be\ncompleted by the HW in order to create completion event.\n\nIn the SW completion event handler, the driver arms the CQ again for the\nnext index,\n\nThe CQE index in the CQ doorbell and in the CQ doorbell record was\nmasked incorrectly with the CQ size mask while it should be masked only\nwith 0xFFFFFF mask.\n\nRemove the CQ size mask, stay only with 0xFFFFFF mask.\n\nFixes: 8395927cdfaf (\"vdpa/mlx5: prepare HW queues\")\n\nSigned-off-by: Matan Azrad <matan@mellanox.com>\n---\n drivers/vdpa/mlx5/mlx5_vdpa_event.c | 13 ++++++-------\n 1 file changed, 6 insertions(+), 7 deletions(-)", "diff": "diff --git a/drivers/vdpa/mlx5/mlx5_vdpa_event.c b/drivers/vdpa/mlx5/mlx5_vdpa_event.c\nindex c50e58e..17fd9dd 100644\n--- a/drivers/vdpa/mlx5/mlx5_vdpa_event.c\n+++ b/drivers/vdpa/mlx5/mlx5_vdpa_event.c\n@@ -81,9 +81,8 @@\n static inline void\n mlx5_vdpa_cq_arm(struct mlx5_vdpa_priv *priv, struct mlx5_vdpa_cq *cq)\n {\n-\tconst unsigned int cqe_mask = (1 << cq->log_desc_n) - 1;\n \tuint32_t arm_sn = cq->arm_sn << MLX5_CQ_SQN_OFFSET;\n-\tuint32_t cq_ci = cq->cq_ci & MLX5_CI_MASK & cqe_mask;\n+\tuint32_t cq_ci = cq->cq_ci & MLX5_CI_MASK;\n \tuint32_t doorbell_hi = arm_sn | MLX5_CQ_DBR_CMD_ALL | cq_ci;\n \tuint64_t doorbell = ((uint64_t)doorbell_hi << 32) | cq->cq->id;\n \tuint64_t db_be = rte_cpu_to_be_64(doorbell);\n@@ -182,15 +181,15 @@\n {\n \tstruct mlx5_vdpa_event_qp *eqp =\n \t\t\t\tcontainer_of(cq, struct mlx5_vdpa_event_qp, cq);\n-\tconst unsigned int cqe_size = 1 << cq->log_desc_n;\n-\tconst unsigned int cqe_mask = cqe_size - 1;\n+\tconst unsigned int cq_size = 1 << cq->log_desc_n;\n+\tconst unsigned int cq_mask = cq_size - 1;\n \tint ret;\n \n \tdo {\n \t\tvolatile struct mlx5_cqe *cqe = cq->cqes + (cq->cq_ci &\n-\t\t\t\t\t\t\t cqe_mask);\n+\t\t\t\t\t\t\t cq_mask);\n \n-\t\tret = check_cqe(cqe, cqe_size, cq->cq_ci);\n+\t\tret = check_cqe(cqe, cq_size, cq->cq_ci);\n \t\tswitch (ret) {\n \t\tcase MLX5_CQE_STATUS_ERR:\n \t\t\tcq->errors++;\n@@ -208,7 +207,7 @@\n \tcq->db_rec[0] = rte_cpu_to_be_32(cq->cq_ci);\n \trte_io_wmb();\n \t/* Ring SW QP doorbell record. */\n-\teqp->db_rec[0] = rte_cpu_to_be_32(cq->cq_ci + cqe_size);\n+\teqp->db_rec[0] = rte_cpu_to_be_32(cq->cq_ci + cq_size);\n }\n \n static void\n", "prefixes": [] }