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GET /api/patches/71634/?format=api
{ "id": 71634, "url": "http://patchwork.dpdk.org/api/patches/71634/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20200616094446.7152-4-ophirmu@mellanox.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200616094446.7152-4-ophirmu@mellanox.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200616094446.7152-4-ophirmu@mellanox.com", "date": "2020-06-16T09:44:45", "name": "[v1,3/4] net/mlx5: add MR callbacks in per-device cache", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "de970dc6e3358e4e8d9f4c5624b9745a2a3b84e3", "submitter": { "id": 793, "url": "http://patchwork.dpdk.org/api/people/793/?format=api", "name": "Ophir Munk", "email": "ophirmu@mellanox.com" }, "delegate": { "id": 3268, "url": "http://patchwork.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20200616094446.7152-4-ophirmu@mellanox.com/mbox/", "series": [ { "id": 10467, "url": "http://patchwork.dpdk.org/api/series/10467/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=10467", "date": "2020-06-16T09:44:42", "name": "mlx5 MR refactor", "version": 1, "mbox": "http://patchwork.dpdk.org/series/10467/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/71634/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/71634/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id ADBAEA04A3;\n\tTue, 16 Jun 2020 11:45:22 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 9E2941BF5B;\n\tTue, 16 Jun 2020 11:45:03 +0200 (CEST)", "from EUR04-HE1-obe.outbound.protection.outlook.com\n (mail-eopbgr70057.outbound.protection.outlook.com [40.107.7.57])\n by dpdk.org (Postfix) with ESMTP id 5B7A11BEE6\n for <dev@dpdk.org>; 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dkim=none (message not signed)\n header.d=none;dpdk.org; dmarc=none action=none header.from=mellanox.com;", "From": "Ophir Munk <ophirmu@mellanox.com>", "To": "dev@dpdk.org, Matan Azrad <matan@mellanox.com>,\n Raslan Darawsheh <rasland@mellanox.com>", "Cc": "Ophir Munk <ophirmu@mellanox.com>", "Date": "Tue, 16 Jun 2020 09:44:45 +0000", "Message-Id": "<20200616094446.7152-4-ophirmu@mellanox.com>", "X-Mailer": [ "git-send-email 2.8.4", "git-send-email 2.8.4" ], "In-Reply-To": "<20200616094446.7152-1-ophirmu@mellanox.com>", "References": "<20200616094446.7152-1-ophirmu@mellanox.com>", "Content-Type": "text/plain", "X-ClientProxiedBy": "ZRAP278CA0006.CHEP278.PROD.OUTLOOK.COM\n (2603:10a6:910:10::16) To AM0PR05MB4209.eurprd05.prod.outlook.com\n (2603:10a6:208:61::22)", "MIME-Version": "1.0", "X-MS-Exchange-MessageSentRepresentingType": "1", "X-Originating-IP": "[37.142.13.130]", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-HT": "Tenant", "X-MS-Office365-Filtering-Correlation-Id": "a6f0a2ef-345a-4374-975a-08d811d9ecde", "X-MS-TrafficTypeDiagnostic": "AM0PR05MB5172:", "X-LD-Processed": "a652971c-7d2e-4d9b-a6a4-d149256f461b,ExtFwd", "X-MS-Exchange-Transport-Forked": "True", "X-Microsoft-Antispam-PRVS": "\n <AM0PR05MB517284338E260E3354BDDBDCD19D0@AM0PR05MB5172.eurprd05.prod.outlook.com>", "X-MS-Oob-TLC-OOBClassifiers": "OLM:2;", "X-Forefront-PRVS": "04362AC73B", "X-MS-Exchange-SenderADCheck": "1", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n h/bly2IoDkvR7WVwvr01tlO9FzYmj1Q+1nB6L5Bl8/WULqDWUphWXTxKs1geAu7Pyajg2sGZ1SPPomgd6ufaoOe6n63rXOJ9v55awlENh47x2vD1oHOHWPuVVjtUcsjg5Af/X53B0b9geA2bxVx5R5XSV4vXojsPqk8ElujjoL4d3/CA3+Q51fFVh6bP06/NmQK0+bjktVggOOHuj00aI6BP8lKGQ03hsQzyJBwrEKAeRb+zNj9ehQYWlmS3YsjJHm245lB2/3rkcR/2e5X/BtMyIlO7OrRGg2FZnp66txHUsrP1sunLa6OWtDWqm6VtnDDJ8oM1+dE6Xw5+HUjs+w==", "X-Forefront-Antispam-Report": "CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:;\n IPV:NLI; SFV:NSPM; H:AM0PR05MB4209.eurprd05.prod.outlook.com; PTR:; CAT:NONE;\n SFTY:;\n SFS:(4636009)(396003)(39860400002)(136003)(346002)(366004)(376002)(55016002)(186003)(956004)(16526019)(2616005)(5660300002)(8676002)(26005)(2906002)(8936002)(36756003)(6636002)(8886007)(66946007)(110136005)(316002)(86362001)(66476007)(6666004)(83380400001)(7696005)(45080400002)(4326008)(52116002)(107886003)(66556008)(478600001)(1076003);\n DIR:OUT; SFP:1101;", "X-MS-Exchange-AntiSpam-MessageData": "\n Bon+qWb35znCrg1O/0aPZ7eSzKar7XMryuFfKczL9FOiSi1cpVxbdBH+MMA2qJwULV9mMi0dEVbYzON0a4jzG3dNigguFo+cv8RxmolDnJqyqlPZWIAA6TEHELJtamsSMGgOXTMk3iZAkBZHkpxUK+RLwDsg8fFiqMkBNuwJzeaQfbxuUCYujLQeQEnm42gPv9Ufl4/8Yj9y6PSbAN/p8NE6cw+yyqYaHkLcKAyZpd2T9Bb1PUvitSKpVq3UJ21JV48yE4weylSYtns5DC7VHhl1lhMi0gGxihcMRH0S/9rIglov1jvWV4ZGi2OByRCZ+JOTy46HaSV/pgc9NOhOgcFqBWfYOTff1t31HXTGYhZypU+SjDzMaz2F3Uk6dUfgn0/N71LNV+2V9QY2wlIXwTCix7g2h1LfSF3wkpSJ95kWIvRZmQIqcTtPiNHnAcmGFoc0X8Fnb3zm5em74APsgOtgy5jJ/kFdcJ80pV0Qq63Lj0m52Fvut/SL9IYGHA3/", "X-OriginatorOrg": "Mellanox.com", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n a6f0a2ef-345a-4374-975a-08d811d9ecde", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "16 Jun 2020 09:44:55.4959 (UTC)", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "a652971c-7d2e-4d9b-a6a4-d149256f461b", "X-MS-Exchange-CrossTenant-MailboxType": "HOSTED", "X-MS-Exchange-CrossTenant-UserPrincipalName": "\n KUul4gJ4D602SYBbH0m2JPBBcIZyycGcUWXXjzk51KvzvXGtt0h89WX+hEBaR6LBJqgTOS6sivxIKVDawnqAxg==", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "AM0PR05MB5172", "Subject": "[dpdk-dev] [PATCH v1 3/4] net/mlx5: add MR callbacks in per-device\n\tcache", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Prior to this commit MR operations were verbs based and hard coded under\ncommon/mlx5/linux directory. This commit enables upper layers (e.g.\nnet/mlx5) to determine which MR operations to use. For example the net\nlayer could set devx based MR operations in non-Linux environments. The\nreg_mr and dereg_mr callbacks are added to the global per-device MR\ncache 'struct mlx5_mr_share_cache'.\n\nSigned-off-by: Ophir Munk <ophirmu@mellanox.com>\nAcked-by: Matan Azrad <matan@mellanox.com>\n---\n drivers/common/mlx5/mlx5_common_mr.c | 23 ++++++++++++-----------\n drivers/common/mlx5/mlx5_common_mr.h | 14 ++++++++++++--\n drivers/net/mlx5/linux/mlx5_os.c | 18 ++++++++++++++++++\n drivers/net/mlx5/mlx5.c | 2 ++\n drivers/net/mlx5/mlx5.h | 2 ++\n drivers/net/mlx5/mlx5_mr.c | 6 ++++--\n 6 files changed, 50 insertions(+), 15 deletions(-)", "diff": "diff --git a/drivers/common/mlx5/mlx5_common_mr.c b/drivers/common/mlx5/mlx5_common_mr.c\nindex 4ce7975..564d618 100644\n--- a/drivers/common/mlx5/mlx5_common_mr.c\n+++ b/drivers/common/mlx5/mlx5_common_mr.c\n@@ -435,12 +435,12 @@ mlx5_mr_lookup_cache(struct mlx5_mr_share_cache *share_cache,\n * Pointer to MR to free.\n */\n static void\n-mr_free(struct mlx5_mr *mr)\n+mr_free(struct mlx5_mr *mr, mlx5_dereg_mr_t dereg_mr_cb)\n {\n \tif (mr == NULL)\n \t\treturn;\n \tDRV_LOG(DEBUG, \"freeing MR(%p):\", (void *)mr);\n-\tmlx5_common_verbs_dereg_mr(&mr->pmd_mr);\n+\tdereg_mr_cb(&mr->pmd_mr);\n \tif (mr->ms_bmp != NULL)\n \t\trte_bitmap_free(mr->ms_bmp);\n \trte_free(mr);\n@@ -490,7 +490,7 @@ mlx5_mr_garbage_collect(struct mlx5_mr_share_cache *share_cache)\n \t\tstruct mlx5_mr *mr = mr_next;\n \n \t\tmr_next = LIST_NEXT(mr, mr);\n-\t\tmr_free(mr);\n+\t\tmr_free(mr, share_cache->dereg_mr_cb);\n \t}\n }\n \n@@ -702,7 +702,7 @@ mlx5_mr_create_primary(void *pd,\n \t\tdata.start = RTE_ALIGN_FLOOR(addr, msl->page_sz);\n \t\tdata.end = data.start + msl->page_sz;\n \t\trte_mcfg_mem_read_unlock();\n-\t\tmr_free(mr);\n+\t\tmr_free(mr, share_cache->dereg_mr_cb);\n \t\tgoto alloc_resources;\n \t}\n \tMLX5_ASSERT(data.msl == data_re.msl);\n@@ -725,7 +725,7 @@ mlx5_mr_create_primary(void *pd,\n \t\t * Must be unlocked before calling rte_free() because\n \t\t * mlx5_mr_mem_event_free_cb() can be called inside.\n \t\t */\n-\t\tmr_free(mr);\n+\t\tmr_free(mr, share_cache->dereg_mr_cb);\n \t\treturn entry->lkey;\n \t}\n \t/*\n@@ -760,12 +760,12 @@ mlx5_mr_create_primary(void *pd,\n \tmr->ms_bmp_n = len / msl->page_sz;\n \tMLX5_ASSERT(ms_idx_shift + mr->ms_bmp_n <= ms_n);\n \t/*\n-\t * Finally create a verbs MR for the memory chunk. ibv_reg_mr() can be\n-\t * called with holding the memory lock because it doesn't use\n+\t * Finally create an MR for the memory chunk. Verbs: ibv_reg_mr() can\n+\t * be called with holding the memory lock because it doesn't use\n \t * mlx5_alloc_buf_extern() which eventually calls rte_malloc_socket()\n \t * through mlx5_alloc_verbs_buf().\n \t */\n-\tmlx5_common_verbs_reg_mr(pd, (void *)data.start, len, &mr->pmd_mr);\n+\tshare_cache->reg_mr_cb(pd, (void *)data.start, len, &mr->pmd_mr);\n \tif (mr->pmd_mr.obj == NULL) {\n \t\tDEBUG(\"Fail to create an MR for address (%p)\",\n \t\t (void *)addr);\n@@ -801,7 +801,7 @@ mlx5_mr_create_primary(void *pd,\n \t * calling rte_free() because mlx5_mr_mem_event_free_cb() can be called\n \t * inside.\n \t */\n-\tmr_free(mr);\n+\tmr_free(mr, share_cache->dereg_mr_cb);\n \treturn UINT32_MAX;\n }\n \n@@ -1028,7 +1028,8 @@ mlx5_mr_flush_local_cache(struct mlx5_mr_ctrl *mr_ctrl)\n * Pointer to MR structure on success, NULL otherwise.\n */\n struct mlx5_mr *\n-mlx5_create_mr_ext(void *pd, uintptr_t addr, size_t len, int socket_id)\n+mlx5_create_mr_ext(void *pd, uintptr_t addr, size_t len, int socket_id,\n+\t\t mlx5_reg_mr_t reg_mr_cb)\n {\n \tstruct mlx5_mr *mr = NULL;\n \n@@ -1038,7 +1039,7 @@ mlx5_create_mr_ext(void *pd, uintptr_t addr, size_t len, int socket_id)\n \t\t\t\tRTE_CACHE_LINE_SIZE, socket_id);\n \tif (mr == NULL)\n \t\treturn NULL;\n-\tmlx5_common_verbs_reg_mr(pd, (void *)addr, len, &mr->pmd_mr);\n+\treg_mr_cb(pd, (void *)addr, len, &mr->pmd_mr);\n \tif (mr->pmd_mr.obj == NULL) {\n \t\tDRV_LOG(WARNING,\n \t\t\t\"Fail to create MR for address (%p)\",\ndiff --git a/drivers/common/mlx5/mlx5_common_mr.h b/drivers/common/mlx5/mlx5_common_mr.h\nindex cdb8acf..b23ee66 100644\n--- a/drivers/common/mlx5/mlx5_common_mr.h\n+++ b/drivers/common/mlx5/mlx5_common_mr.h\n@@ -38,6 +38,14 @@ struct mlx5_pmd_mr {\n \tsize_t\t\t len;\n \tvoid\t\t *obj; /* verbs mr object or devx umem object. */\n };\n+\n+/**\n+ * mr operations typedef\n+ */\n+typedef int (*mlx5_reg_mr_t)(void *pd, void *addr, size_t length,\n+\t\t\t struct mlx5_pmd_mr *pmd_mr);\n+typedef void (*mlx5_dereg_mr_t)(struct mlx5_pmd_mr *pmd_mr);\n+\n /* Memory Region object. */\n struct mlx5_mr {\n \tLIST_ENTRY(mlx5_mr) mr; /**< Pointer to the prev/next entry. */\n@@ -83,6 +91,8 @@ struct mlx5_mr_share_cache {\n \tstruct mlx5_mr_btree cache; /* Global MR cache table. */\n \tstruct mlx5_mr_list mr_list; /* Registered MR list. */\n \tstruct mlx5_mr_list mr_free_list; /* Freed MR list. */\n+\tmlx5_reg_mr_t reg_mr_cb; /* Callback to reg_mr func */\n+\tmlx5_dereg_mr_t dereg_mr_cb; /* Callback to dereg_mr func */\n } __rte_packed;\n \n /**\n@@ -155,8 +165,8 @@ mlx5_mr_lookup_list(struct mlx5_mr_share_cache *share_cache,\n \t\t struct mr_cache_entry *entry, uintptr_t addr);\n __rte_internal\n struct mlx5_mr *\n-mlx5_create_mr_ext(void *pd, uintptr_t addr, size_t len,\n-\t\t int socket_id);\n+mlx5_create_mr_ext(void *pd, uintptr_t addr, size_t len, int socket_id,\n+\t\t mlx5_reg_mr_t reg_mr_cb);\n __rte_internal\n uint32_t\n mlx5_mr_create_primary(void *pd,\ndiff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c\nindex 844c6c0..f498d00 100644\n--- a/drivers/net/mlx5/linux/mlx5_os.c\n+++ b/drivers/net/mlx5/linux/mlx5_os.c\n@@ -42,6 +42,7 @@\n #include <mlx5_devx_cmds.h>\n #include <mlx5_common.h>\n #include <mlx5_common_mp.h>\n+#include <mlx5_common_mr.h>\n \n #include \"mlx5_defs.h\"\n #include \"mlx5.h\"\n@@ -2321,6 +2322,23 @@ mlx5_os_stats_init(struct rte_eth_dev *dev)\n \trte_free(strings);\n }\n \n+/**\n+ * Set the reg_mr and dereg_mr call backs\n+ *\n+ * @param reg_mr_cb[out]\n+ * Pointer to reg_mr func\n+ * @param dereg_mr_cb[out]\n+ * Pointer to dereg_mr func\n+ *\n+ */\n+void\n+mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,\n+\t\t mlx5_dereg_mr_t *dereg_mr_cb)\n+{\n+\t*reg_mr_cb = mlx5_common_verbs_reg_mr;\n+\t*dereg_mr_cb = mlx5_common_verbs_dereg_mr;\n+}\n+\n const struct eth_dev_ops mlx5_os_dev_ops = {\n \t.dev_configure = mlx5_dev_configure,\n \t.dev_start = mlx5_dev_start,\ndiff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c\nindex b22acbb..5c86f6f 100644\n--- a/drivers/net/mlx5/mlx5.c\n+++ b/drivers/net/mlx5/mlx5.c\n@@ -713,6 +713,8 @@ mlx5_alloc_shared_dev_ctx(const struct mlx5_dev_spawn_data *spawn,\n \t\terr = rte_errno;\n \t\tgoto error;\n \t}\n+\tmlx5_os_set_reg_mr_cb(&sh->share_cache.reg_mr_cb,\n+\t\t\t &sh->share_cache.dereg_mr_cb);\n \tmlx5_os_dev_shared_handler_install(sh);\n \tmlx5_flow_aging_init(sh);\n \tmlx5_flow_counters_mng_init(sh);\ndiff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h\nindex 94a3667..5bd5acd 100644\n--- a/drivers/net/mlx5/mlx5.h\n+++ b/drivers/net/mlx5/mlx5.h\n@@ -940,4 +940,6 @@ int mlx5_os_read_dev_stat(struct mlx5_priv *priv,\n int mlx5_os_read_dev_counters(struct rte_eth_dev *dev, uint64_t *stats);\n int mlx5_os_get_stats_n(struct rte_eth_dev *dev);\n void mlx5_os_stats_init(struct rte_eth_dev *dev);\n+void mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,\n+\t\t\t mlx5_dereg_mr_t *dereg_mr_cb);\n #endif /* RTE_PMD_MLX5_H_ */\ndiff --git a/drivers/net/mlx5/mlx5_mr.c b/drivers/net/mlx5/mlx5_mr.c\nindex c91d6a4..adbe07c 100644\n--- a/drivers/net/mlx5/mlx5_mr.c\n+++ b/drivers/net/mlx5/mlx5_mr.c\n@@ -276,7 +276,8 @@ mlx5_mr_update_ext_mp_cb(struct rte_mempool *mp, void *opaque,\n \t\treturn;\n \tDRV_LOG(DEBUG, \"port %u register MR for chunk #%d of mempool (%s)\",\n \t\tdev->data->port_id, mem_idx, mp->name);\n-\tmr = mlx5_create_mr_ext(sh->pd, addr, len, mp->socket_id);\n+\tmr = mlx5_create_mr_ext(sh->pd, addr, len, mp->socket_id,\n+\t\t\t\tsh->share_cache.reg_mr_cb);\n \tif (!mr) {\n \t\tDRV_LOG(WARNING,\n \t\t\t\"port %u unable to allocate a new MR of\"\n@@ -350,7 +351,8 @@ mlx5_dma_map(struct rte_pci_device *pdev, void *addr,\n \t}\n \tpriv = dev->data->dev_private;\n \tsh = priv->sh;\n-\tmr = mlx5_create_mr_ext(sh->pd, (uintptr_t)addr, len, SOCKET_ID_ANY);\n+\tmr = mlx5_create_mr_ext(sh->pd, (uintptr_t)addr, len, SOCKET_ID_ANY,\n+\t\t\t\tsh->share_cache.reg_mr_cb);\n \tif (!mr) {\n \t\tDRV_LOG(WARNING,\n \t\t\t\"port %u unable to dma map\", dev->data->port_id);\n", "prefixes": [ "v1", "3/4" ] }