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GET /api/patches/72611/?format=api
{ "id": 72611, "url": "http://patchwork.dpdk.org/api/patches/72611/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/1593604482-47494-9-git-send-email-xavier.huwei@huawei.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1593604482-47494-9-git-send-email-xavier.huwei@huawei.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1593604482-47494-9-git-send-email-xavier.huwei@huawei.com", "date": "2020-07-01T11:54:40", "name": "[08/10] net/hns3: fix Rx buffer size", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "77b19d41611d7ead2c47bd7a1cb4dc5c8413b99b", "submitter": { "id": 1405, "url": "http://patchwork.dpdk.org/api/people/1405/?format=api", "name": "Wei Hu (Xavier)", "email": "xavier.huwei@huawei.com" }, "delegate": { "id": 319, "url": "http://patchwork.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/1593604482-47494-9-git-send-email-xavier.huwei@huawei.com/mbox/", "series": [ { "id": 10710, "url": "http://patchwork.dpdk.org/api/series/10710/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=10710", "date": "2020-07-01T11:54:33", "name": "misc updates for hns3 PMD driver", "version": 1, "mbox": "http://patchwork.dpdk.org/series/10710/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/72611/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/72611/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 29E0CA0350;\n\tWed, 1 Jul 2020 13:57:54 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 0EE0B1D526;\n\tWed, 1 Jul 2020 13:56:43 +0200 (CEST)", "from huawei.com (szxga07-in.huawei.com [45.249.212.35])\n by dpdk.org (Postfix) with ESMTP id A3DE01D41B\n for <dev@dpdk.org>; Wed, 1 Jul 2020 13:56:35 +0200 (CEST)", "from DGGEMS408-HUB.china.huawei.com (unknown [172.30.72.60])\n by Forcepoint Email with ESMTP id 37057F4C2CA48A119C92\n for <dev@dpdk.org>; Wed, 1 Jul 2020 19:56:32 +0800 (CST)", "from localhost.localdomain (10.69.192.56) by\n DGGEMS408-HUB.china.huawei.com (10.3.19.208) with Microsoft SMTP Server id\n 14.3.487.0; Wed, 1 Jul 2020 19:56:22 +0800" ], "From": "\"Wei Hu (Xavier)\" <xavier.huwei@huawei.com>", "To": "<dev@dpdk.org>", "CC": "<xavier.huwei@huawei.com>", "Date": "Wed, 1 Jul 2020 19:54:40 +0800", "Message-ID": "<1593604482-47494-9-git-send-email-xavier.huwei@huawei.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1593604482-47494-1-git-send-email-xavier.huwei@huawei.com>", "References": "<1593604482-47494-1-git-send-email-xavier.huwei@huawei.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[10.69.192.56]", "X-CFilter-Loop": "Reflected", "Subject": "[dpdk-dev] [PATCH 08/10] net/hns3: fix Rx buffer size", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Currently, rx_buf_size of hns3 PMD driver is fixed on, and it's value\ndepends on the firmware which will decrease the flexibility of PMD.\n\nThe receive side mbufs was allocated from the mempool given by upper\napplication calling rte_eth_rx_queue_setup API function. So the memory\nchunk used for net device DMA is depend on the data room size of the\nobjects in this mempool. Hns3 PMD driver should set the rx_buf_len smaller\nthan the data room size of mempool and our hardware only support the\nfollowing four specifications: 512, 1024, 2148 and 4096.\n\nFixes: bba636698316 (\"net/hns3: support Rx/Tx and related operations\")\nCc: stable@dpdk.org\n\nSigned-off-by: Chengchang Tang <tangchengchang@huawei.com>\nSigned-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>\n---\n drivers/net/hns3/hns3_ethdev.c | 3 +--\n drivers/net/hns3/hns3_ethdev.h | 1 -\n drivers/net/hns3/hns3_ethdev_vf.c | 5 +---\n drivers/net/hns3/hns3_rxtx.c | 56 +++++++++++++++++++++++++++++++++++++--\n drivers/net/hns3/hns3_rxtx.h | 8 ++++++\n 5 files changed, 64 insertions(+), 9 deletions(-)", "diff": "diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c\nindex 7bc9b17..00ed3e2 100644\n--- a/drivers/net/hns3/hns3_ethdev.c\n+++ b/drivers/net/hns3/hns3_ethdev.c\n@@ -2453,7 +2453,7 @@ hns3_dev_infos_get(struct rte_eth_dev *eth_dev, struct rte_eth_dev_info *info)\n \tinfo->max_rx_queues = queue_num;\n \tinfo->max_tx_queues = hw->tqps_num;\n \tinfo->max_rx_pktlen = HNS3_MAX_FRAME_LEN; /* CRC included */\n-\tinfo->min_rx_bufsize = hw->rx_buf_len;\n+\tinfo->min_rx_bufsize = HNS3_MIN_BD_BUF_SIZE;\n \tinfo->max_mac_addrs = HNS3_UC_MACADDR_NUM;\n \tinfo->max_mtu = info->max_rx_pktlen - HNS3_ETH_OVERHEAD;\n \tinfo->max_lro_pkt_size = HNS3_MAX_LRO_SIZE;\n@@ -2851,7 +2851,6 @@ hns3_get_board_configuration(struct hns3_hw *hw)\n \thw->mac.media_type = cfg.media_type;\n \thw->rss_size_max = cfg.rss_size_max;\n \thw->rss_dis_flag = false;\n-\thw->rx_buf_len = cfg.rx_buf_len;\n \tmemcpy(hw->mac.mac_addr, cfg.mac_addr, RTE_ETHER_ADDR_LEN);\n \thw->mac.phy_addr = cfg.phy_addr;\n \thw->mac.default_addr_setted = false;\ndiff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h\nindex c390263..3c991f4 100644\n--- a/drivers/net/hns3/hns3_ethdev.h\n+++ b/drivers/net/hns3/hns3_ethdev.h\n@@ -375,7 +375,6 @@ struct hns3_hw {\n \tuint16_t tqps_num; /* num task queue pairs of this function */\n \tuint16_t intr_tqps_num; /* num queue pairs mapping interrupt */\n \tuint16_t rss_size_max; /* HW defined max RSS task queue */\n-\tuint16_t rx_buf_len;\n \tuint16_t num_tx_desc; /* desc num of per tx queue */\n \tuint16_t num_rx_desc; /* desc num of per rx queue */\n \ndiff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c\nindex 9c45ffa..3c5998a 100644\n--- a/drivers/net/hns3/hns3_ethdev_vf.c\n+++ b/drivers/net/hns3/hns3_ethdev_vf.c\n@@ -902,7 +902,7 @@ hns3vf_dev_infos_get(struct rte_eth_dev *eth_dev, struct rte_eth_dev_info *info)\n \tinfo->max_rx_queues = q_num;\n \tinfo->max_tx_queues = hw->tqps_num;\n \tinfo->max_rx_pktlen = HNS3_MAX_FRAME_LEN; /* CRC included */\n-\tinfo->min_rx_bufsize = hw->rx_buf_len;\n+\tinfo->min_rx_bufsize = HNS3_MIN_BD_BUF_SIZE;\n \tinfo->max_mac_addrs = HNS3_VF_UC_MACADDR_NUM;\n \tinfo->max_mtu = info->max_rx_pktlen - HNS3_ETH_OVERHEAD;\n \tinfo->max_lro_pkt_size = HNS3_MAX_LRO_SIZE;\n@@ -1096,8 +1096,6 @@ hns3vf_check_tqp_info(struct hns3_hw *hw)\n \t\treturn -EINVAL;\n \t}\n \n-\tif (hw->rx_buf_len == 0)\n-\t\thw->rx_buf_len = HNS3_DEFAULT_RX_BUF_LEN;\n \thw->alloc_rss_size = RTE_MIN(hw->rss_size_max, hw->tqps_num);\n \n \treturn 0;\n@@ -1162,7 +1160,6 @@ hns3vf_get_queue_info(struct hns3_hw *hw)\n \n \tmemcpy(&hw->tqps_num, &resp_msg[0], sizeof(uint16_t));\n \tmemcpy(&hw->rss_size_max, &resp_msg[2], sizeof(uint16_t));\n-\tmemcpy(&hw->rx_buf_len, &resp_msg[4], sizeof(uint16_t));\n \n \treturn hns3vf_check_tqp_info(hw);\n }\ndiff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c\nindex 0f9825f..931d89a 100644\n--- a/drivers/net/hns3/hns3_rxtx.c\n+++ b/drivers/net/hns3/hns3_rxtx.c\n@@ -909,7 +909,7 @@ hns3_fake_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx,\n \tnb_rx_q = dev->data->nb_rx_queues;\n \trxq->io_base = (void *)((char *)hw->io_base + HNS3_TQP_REG_OFFSET +\n \t\t\t\t(nb_rx_q + idx) * HNS3_TQP_REG_SIZE);\n-\trxq->rx_buf_len = hw->rx_buf_len;\n+\trxq->rx_buf_len = HNS3_MIN_BD_BUF_SIZE;\n \n \trte_spinlock_lock(&hw->lock);\n \thw->fkq_data.rx_queues[idx] = rxq;\n@@ -1185,6 +1185,48 @@ hns3_dev_release_mbufs(struct hns3_adapter *hns)\n \t\t}\n }\n \n+static int\n+hns3_rx_buf_len_calc(struct rte_mempool *mp, uint16_t *rx_buf_len)\n+{\n+\tuint16_t vld_buf_size;\n+\tuint16_t num_hw_specs;\n+\tuint16_t i;\n+\n+\t/*\n+\t * hns3 network engine only support to set 4 typical specification, and\n+\t * different buffer size will affect the max packet_len and the max\n+\t * number of segmentation when hw gro is turned on in receive side. The\n+\t * relationship between them is as follows:\n+\t * rx_buf_size | max_gro_pkt_len | max_gro_nb_seg\n+\t * ---------------------|-------------------|----------------\n+\t * HNS3_4K_BD_BUF_SIZE | 60KB | 15\n+\t * HNS3_2K_BD_BUF_SIZE | 62KB | 31\n+\t * HNS3_1K_BD_BUF_SIZE | 63KB | 63\n+\t * HNS3_512_BD_BUF_SIZE | 31.5KB | 63\n+\t */\n+\tstatic const uint16_t hw_rx_buf_size[] = {\n+\t\tHNS3_4K_BD_BUF_SIZE,\n+\t\tHNS3_2K_BD_BUF_SIZE,\n+\t\tHNS3_1K_BD_BUF_SIZE,\n+\t\tHNS3_512_BD_BUF_SIZE\n+\t};\n+\n+\tvld_buf_size = (uint16_t)(rte_pktmbuf_data_room_size(mp) -\n+\t\t\tRTE_PKTMBUF_HEADROOM);\n+\n+\tif (vld_buf_size < HNS3_MIN_BD_BUF_SIZE)\n+\t\treturn -EINVAL;\n+\n+\tnum_hw_specs = RTE_DIM(hw_rx_buf_size);\n+\tfor (i = 0; i < num_hw_specs; i++) {\n+\t\tif (vld_buf_size >= hw_rx_buf_size[i]) {\n+\t\t\t*rx_buf_len = hw_rx_buf_size[i];\n+\t\t\tbreak;\n+\t\t}\n+\t}\n+\treturn 0;\n+}\n+\n int\n hns3_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t nb_desc,\n \t\t unsigned int socket_id, const struct rte_eth_rxconf *conf,\n@@ -1194,6 +1236,7 @@ hns3_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t nb_desc,\n \tstruct hns3_hw *hw = &hns->hw;\n \tstruct hns3_queue_info q_info;\n \tstruct hns3_rx_queue *rxq;\n+\tuint16_t rx_buf_size;\n \tint rx_entry_len;\n \n \tif (dev->data->dev_started) {\n@@ -1218,6 +1261,15 @@ hns3_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t nb_desc,\n \tq_info.nb_desc = nb_desc;\n \tq_info.type = \"hns3 RX queue\";\n \tq_info.ring_name = \"rx_ring\";\n+\n+\tif (hns3_rx_buf_len_calc(mp, &rx_buf_size)) {\n+\t\thns3_err(hw, \"rxq mbufs' data room size:%u is not enough! \"\n+\t\t\t\t\"minimal data room size:%u.\",\n+\t\t\t\trte_pktmbuf_data_room_size(mp),\n+\t\t\t\tHNS3_MIN_BD_BUF_SIZE + RTE_PKTMBUF_HEADROOM);\n+\t\treturn -EINVAL;\n+\t}\n+\n \trxq = hns3_alloc_rxq_and_dma_zone(dev, &q_info);\n \tif (rxq == NULL) {\n \t\thns3_err(hw,\n@@ -1252,7 +1304,7 @@ hns3_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t nb_desc,\n \trxq->configured = true;\n \trxq->io_base = (void *)((char *)hw->io_base + HNS3_TQP_REG_OFFSET +\n \t\t\t\tidx * HNS3_TQP_REG_SIZE);\n-\trxq->rx_buf_len = hw->rx_buf_len;\n+\trxq->rx_buf_len = rx_buf_size;\n \trxq->l2_errors = 0;\n \trxq->pkt_len_errors = 0;\n \trxq->l3_csum_erros = 0;\ndiff --git a/drivers/net/hns3/hns3_rxtx.h b/drivers/net/hns3/hns3_rxtx.h\nindex b85c64f..ccd508b 100644\n--- a/drivers/net/hns3/hns3_rxtx.h\n+++ b/drivers/net/hns3/hns3_rxtx.h\n@@ -11,6 +11,14 @@\n #define\tHNS3_ALIGN_RING_DESC\t32\n #define HNS3_RING_BASE_ALIGN\t128\n \n+#define HNS3_512_BD_BUF_SIZE\t512\n+#define HNS3_1K_BD_BUF_SIZE\t1024\n+#define HNS3_2K_BD_BUF_SIZE\t2048\n+#define HNS3_4K_BD_BUF_SIZE\t4096\n+\n+#define HNS3_MIN_BD_BUF_SIZE\tHNS3_512_BD_BUF_SIZE\n+#define HNS3_MAX_BD_BUF_SIZE\tHNS3_4K_BD_BUF_SIZE\n+\n #define HNS3_BD_SIZE_512_TYPE\t\t\t0\n #define HNS3_BD_SIZE_1024_TYPE\t\t\t1\n #define HNS3_BD_SIZE_2048_TYPE\t\t\t2\n", "prefixes": [ "08/10" ] }