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GET /api/patches/73970/?format=api
{ "id": 73970, "url": "http://patchwork.dpdk.org/api/patches/73970/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20200713165755.61814-2-roy.fan.zhang@intel.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200713165755.61814-2-roy.fan.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200713165755.61814-2-roy.fan.zhang@intel.com", "date": "2020-07-13T16:57:52", "name": "[v5,1/4] cryptodev: add data-path APIs", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "b89e9115c64100cc4bba2075f85866e590a00f04", "submitter": { "id": 304, "url": "http://patchwork.dpdk.org/api/people/304/?format=api", "name": "Fan Zhang", "email": "roy.fan.zhang@intel.com" }, "delegate": { "id": 6690, "url": "http://patchwork.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20200713165755.61814-2-roy.fan.zhang@intel.com/mbox/", "series": [ { "id": 11006, "url": "http://patchwork.dpdk.org/api/series/11006/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=11006", "date": "2020-07-13T16:57:51", "name": "cryptodev: add symmetric crypto data-path APIs", "version": 5, "mbox": "http://patchwork.dpdk.org/series/11006/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/73970/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/73970/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 8D128A0540;\n\tMon, 13 Jul 2020 18:58:11 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id D0A411D6B9;\n\tMon, 13 Jul 2020 18:58:06 +0200 (CEST)", "from mga06.intel.com (mga06.intel.com [134.134.136.31])\n by dpdk.org (Postfix) with ESMTP id 128131D69E\n for <dev@dpdk.org>; Mon, 13 Jul 2020 18:58:00 +0200 (CEST)", "from orsmga003.jf.intel.com ([10.7.209.27])\n by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 13 Jul 2020 09:58:00 -0700", "from silpixa00398673.ir.intel.com (HELO\n silpixa00398673.ger.corp.intel.com) ([10.237.223.136])\n by orsmga003.jf.intel.com with ESMTP; 13 Jul 2020 09:57:58 -0700" ], "IronPort-SDR": [ "\n DtH1X0Mr0t4PnjUztxAFw8c3ed46sBYUuphe91aBvUjtyvQcw+Pk4YH1r0S9eOvZmp2mQEl9CJ\n t/oCJqbkyBHw==", "\n Hq0mU4M66S/sgCosFFHOI+nz/nErhoLLqzz5vFQTSvv/fKaaTVwxW8jw8m+fiTnZvpn13jMK6j\n V9g9n5G7cs3Q==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9681\"; a=\"210203432\"", "E=Sophos;i=\"5.75,348,1589266800\"; d=\"scan'208\";a=\"210203432\"", "E=Sophos;i=\"5.75,348,1589266800\"; d=\"scan'208\";a=\"281465646\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "Fan Zhang <roy.fan.zhang@intel.com>", "To": "dev@dpdk.org", "Cc": "fiona.trahe@intel.com, akhil.goyal@nxp.com,\n Fan Zhang <roy.fan.zhang@intel.com>,\n Piotr Bronowski <piotrx.bronowski@intel.com>", "Date": "Mon, 13 Jul 2020 17:57:52 +0100", "Message-Id": "<20200713165755.61814-2-roy.fan.zhang@intel.com>", "X-Mailer": "git-send-email 2.20.1", "In-Reply-To": "<20200713165755.61814-1-roy.fan.zhang@intel.com>", "References": "<20200703124942.29171-1-roy.fan.zhang@intel.com>\n <20200713165755.61814-1-roy.fan.zhang@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [dpdk-dev v5 1/4] cryptodev: add data-path APIs", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This patch adds data-path APIs for enqueue and dequeue operations to\ncryptodev. The APIs support flexible user-define enqueue and dequeue\nbehaviors and operation modes.\n\nSigned-off-by: Fan Zhang <roy.fan.zhang@intel.com>\nSigned-off-by: Piotr Bronowski <piotrx.bronowski@intel.com>\n---\n lib/librte_cryptodev/rte_crypto_sym.h | 27 +-\n lib/librte_cryptodev/rte_cryptodev.c | 118 ++++++++\n lib/librte_cryptodev/rte_cryptodev.h | 256 +++++++++++++++++-\n lib/librte_cryptodev/rte_cryptodev_pmd.h | 90 +++++-\n .../rte_cryptodev_version.map | 5 +\n 5 files changed, 487 insertions(+), 9 deletions(-)", "diff": "diff --git a/lib/librte_cryptodev/rte_crypto_sym.h b/lib/librte_cryptodev/rte_crypto_sym.h\nindex f29c98051..8f3a93a3d 100644\n--- a/lib/librte_cryptodev/rte_crypto_sym.h\n+++ b/lib/librte_cryptodev/rte_crypto_sym.h\n@@ -57,12 +57,27 @@ struct rte_crypto_sgl {\n struct rte_crypto_sym_vec {\n \t/** array of SGL vectors */\n \tstruct rte_crypto_sgl *sgl;\n-\t/** array of pointers to IV */\n-\tvoid **iv;\n-\t/** array of pointers to AAD */\n-\tvoid **aad;\n-\t/** array of pointers to digest */\n-\tvoid **digest;\n+\tunion {\n+\t\t/* Supposed to be used with CPU crypto API call. */\n+\t\tstruct {\n+\t\t\t/** array of pointers to IV */\n+\t\t\tvoid **iv;\n+\t\t\t/** array of pointers to AAD */\n+\t\t\tvoid **aad;\n+\t\t\t/** array of pointers to digest */\n+\t\t\tvoid **digest;\n+\t\t};\n+\n+\t\t/* Supposed to be used with HW crypto API call. */\n+\t\tstruct {\n+\t\t\t/** array of vectors to IV */\n+\t\t\tstruct rte_crypto_vec *iv_vec;\n+\t\t\t/** array of vectors to AAD */\n+\t\t\tstruct rte_crypto_vec *aad_vec;\n+\t\t\t/** array of vectors to Digest */\n+\t\t\tstruct rte_crypto_vec *digest_vec;\n+\t\t};\n+\t};\n \t/**\n \t * array of statuses for each operation:\n \t * - 0 on success\ndiff --git a/lib/librte_cryptodev/rte_cryptodev.c b/lib/librte_cryptodev/rte_cryptodev.c\nindex 1dd795bcb..1e93762a0 100644\n--- a/lib/librte_cryptodev/rte_cryptodev.c\n+++ b/lib/librte_cryptodev/rte_cryptodev.c\n@@ -1914,6 +1914,124 @@ rte_cryptodev_sym_cpu_crypto_process(uint8_t dev_id,\n \treturn dev->dev_ops->sym_cpu_process(dev, sess, ofs, vec);\n }\n \n+uint32_t\n+rte_cryptodev_sym_hw_crypto_enqueue_aead(uint8_t dev_id, uint16_t qp_id,\n+\tunion rte_cryptodev_hw_session_ctx session,\n+\tunion rte_crypto_sym_ofs ofs, struct rte_crypto_sym_vec *vec,\n+\tvoid **opaque, uint32_t flags)\n+{\n+\tstruct rte_cryptodev *dev;\n+\n+\tif (!rte_cryptodev_get_qp_status(dev_id, qp_id))\n+\t\treturn -EINVAL;\n+\n+\tdev = rte_cryptodev_pmd_get_dev(dev_id);\n+\tif (!(dev->feature_flags & RTE_CRYPTODEV_FF_SYM_HW_DIRECT_API) ||\n+\t\tdev->dev_ops->sym_hw_enq_deq == NULL ||\n+\t\t\tdev->dev_ops->sym_hw_enq_deq->enqueue_aead == NULL)\n+\t\treturn -ENOTSUP;\n+\tif (vec == NULL || vec->num == 0 || session.crypto_sess == NULL)\n+\t\treturn -EINVAL;\n+\n+\treturn dev->dev_ops->sym_hw_enq_deq->enqueue_aead(dev, qp_id, session,\n+\t\t\tofs, vec, opaque, flags);\n+}\n+\n+uint32_t\n+rte_cryptodev_sym_hw_crypto_enqueue_cipher(uint8_t dev_id, uint16_t qp_id,\n+\tunion rte_cryptodev_hw_session_ctx session,\n+\tunion rte_crypto_sym_ofs ofs, struct rte_crypto_sym_vec *vec,\n+\tvoid **opaque, uint32_t flags)\n+{\n+\tstruct rte_cryptodev *dev;\n+\n+\tif (!rte_cryptodev_get_qp_status(dev_id, qp_id))\n+\t\treturn -EINVAL;\n+\n+\tdev = rte_cryptodev_pmd_get_dev(dev_id);\n+\tif (!(dev->feature_flags & RTE_CRYPTODEV_FF_SYM_HW_DIRECT_API) ||\n+\t\tdev->dev_ops->sym_hw_enq_deq == NULL ||\n+\t\t\tdev->dev_ops->sym_hw_enq_deq->enqueue_cipher == NULL)\n+\t\treturn -ENOTSUP;\n+\tif (vec == NULL || vec->num == 0 || session.crypto_sess == NULL)\n+\t\treturn -EINVAL;\n+\n+\treturn dev->dev_ops->sym_hw_enq_deq->enqueue_cipher(dev, qp_id, session,\n+\t\t\tofs, vec, opaque, flags);\n+}\n+\n+uint32_t\n+rte_cryptodev_sym_hw_crypto_enqueue_auth(uint8_t dev_id, uint16_t qp_id,\n+\tunion rte_cryptodev_hw_session_ctx session,\n+\tunion rte_crypto_sym_ofs ofs, struct rte_crypto_sym_vec *vec,\n+\tvoid **opaque, uint32_t flags)\n+{\n+\tstruct rte_cryptodev *dev;\n+\n+\tif (!rte_cryptodev_get_qp_status(dev_id, qp_id))\n+\t\treturn -EINVAL;\n+\n+\tdev = rte_cryptodev_pmd_get_dev(dev_id);\n+\tif (!(dev->feature_flags & RTE_CRYPTODEV_FF_SYM_HW_DIRECT_API) ||\n+\t\tdev->dev_ops->sym_hw_enq_deq == NULL ||\n+\t\t\tdev->dev_ops->sym_hw_enq_deq->enqueue_auth == NULL)\n+\t\treturn -ENOTSUP;\n+\tif (vec == NULL || vec->num == 0 || session.crypto_sess == NULL)\n+\t\treturn -EINVAL;\n+\n+\treturn dev->dev_ops->sym_hw_enq_deq->enqueue_auth(dev, qp_id, session,\n+\t\t\tofs, vec, opaque, flags);\n+}\n+\n+uint32_t\n+rte_cryptodev_sym_hw_crypto_enqueue_chain(uint8_t dev_id, uint16_t qp_id,\n+\tunion rte_cryptodev_hw_session_ctx session,\n+\tunion rte_crypto_sym_ofs ofs, struct rte_crypto_sym_vec *vec,\n+\tvoid **opaque, uint32_t flags)\n+{\n+\tstruct rte_cryptodev *dev;\n+\n+\tif (!rte_cryptodev_get_qp_status(dev_id, qp_id))\n+\t\treturn -EINVAL;\n+\n+\tdev = rte_cryptodev_pmd_get_dev(dev_id);\n+\tif (!(dev->feature_flags & RTE_CRYPTODEV_FF_SYM_HW_DIRECT_API) ||\n+\t\tdev->dev_ops->sym_hw_enq_deq == NULL ||\n+\t\t\tdev->dev_ops->sym_hw_enq_deq->enqueue_chain == NULL)\n+\t\treturn -ENOTSUP;\n+\tif (vec == NULL || vec->num == 0 || session.crypto_sess == NULL)\n+\t\treturn -EINVAL;\n+\n+\treturn dev->dev_ops->sym_hw_enq_deq->enqueue_chain(dev, qp_id, session,\n+\t\t\tofs, vec, opaque, flags);\n+}\n+\n+uint32_t\n+rte_cryptodev_sym_hw_crypto_dequeue(uint8_t dev_id, uint16_t qp_id,\n+\trte_cryptodev_get_dequeue_count_t get_dequeue_count,\n+\trte_cryptodev_post_dequeue_t post_dequeue,\n+\tvoid **out_opaque,\n+\tuint32_t *n_success_jobs, uint32_t flags)\n+{\n+\tstruct rte_cryptodev *dev;\n+\n+\tif (!rte_cryptodev_get_qp_status(dev_id, qp_id))\n+\t\treturn -EINVAL;\n+\n+\tdev = rte_cryptodev_pmd_get_dev(dev_id);\n+\tif (!(dev->feature_flags & RTE_CRYPTODEV_FF_SYM_HW_DIRECT_API) ||\n+\t\tdev->dev_ops->sym_hw_enq_deq == NULL ||\n+\t\t\tdev->dev_ops->sym_hw_enq_deq->dequeue == NULL)\n+\t\treturn -ENOTSUP;\n+\n+\tif (!get_dequeue_count || !post_dequeue || !n_success_jobs)\n+\t\treturn -EINVAL;\n+\n+\treturn dev->dev_ops->sym_hw_enq_deq->dequeue(dev, qp_id,\n+\t\t\tget_dequeue_count, post_dequeue, out_opaque,\n+\t\t\tn_success_jobs, flags);\n+}\n+\n /** Initialise rte_crypto_op mempool element */\n static void\n rte_crypto_op_init(struct rte_mempool *mempool,\ndiff --git a/lib/librte_cryptodev/rte_cryptodev.h b/lib/librte_cryptodev/rte_cryptodev.h\nindex 7b3ebc20f..83c9f072c 100644\n--- a/lib/librte_cryptodev/rte_cryptodev.h\n+++ b/lib/librte_cryptodev/rte_cryptodev.h\n@@ -466,7 +466,8 @@ rte_cryptodev_asym_get_xform_enum(enum rte_crypto_asym_xform_type *xform_enum,\n /**< Support symmetric session-less operations */\n #define RTE_CRYPTODEV_FF_NON_BYTE_ALIGNED_DATA\t\t(1ULL << 23)\n /**< Support operations on data which is not byte aligned */\n-\n+#define RTE_CRYPTODEV_FF_SYM_HW_DIRECT_API\t\t(1ULL << 24)\n+/**< Support hardware accelerator specific raw data as input */\n \n /**\n * Get the name of a crypto device feature flag\n@@ -1351,6 +1352,259 @@ rte_cryptodev_sym_cpu_crypto_process(uint8_t dev_id,\n \tstruct rte_cryptodev_sym_session *sess, union rte_crypto_sym_ofs ofs,\n \tstruct rte_crypto_sym_vec *vec);\n \n+/* HW direct symmetric crypto data-path APIs */\n+#define RTE_CRYPTO_HW_DP_FF_ENQUEUE_EXHAUST\t(1ULL << 0)\n+/**< Bit-mask to indicate the last job in a burst. With this bit set the\n+ * driver may read but not write the drv_data buffer, and kick the HW to\n+ * start processing all jobs written.\n+ */\n+#define RTE_CRYPTO_HW_DP_FF_CRYPTO_SESSION\t(1ULL << 1)\n+/**< Bit-mask indicating sess is a cryptodev sym session */\n+#define RTE_CRYPTO_HW_DP_FF_SESSIONLESS\t\t(1ULL << 2)\n+/**< Bit-mask indicating sess is a cryptodev sym xform and session-less\n+ * operation is in-place\n+ **/\n+#define RTE_CRYPTO_HW_DP_FF_SECURITY_SESSION\t(1ULL << 3)\n+/**< Bit-mask indicating sess is a security session */\n+#define RTE_CRYPTO_HW_DP_FF_SET_OPAQUE_ARRAY\t(1ULL << 4)\n+/**< Bit-mask to indicate opaque is an array, all elements in it will be\n+ * stored as opaque data.\n+ */\n+#define RTE_CRYPTO_HW_DP_FF_KICK_QUEUE\t\t(1ULL << 5)\n+/**< Bit-mask to command the HW to start processing all stored ops in the\n+ * queue immediately.\n+ */\n+\n+/**< Bit-masks used for dequeuing job */\n+#define RTE_CRYPTO_HW_DP_FF_GET_OPAQUE_ARRAY\t(1ULL << 0)\n+/**< Bit-mask to indicate opaque is an array with enough room to fill all\n+ * dequeued opaque data pointers.\n+ */\n+#define RTE_CRYPTO_HW_DP_FF_DEQUEUE_EXHAUST\t(1ULL << 1)\n+/**< Bit-mask to indicate dequeuing as many as n jobs in dequeue-many function.\n+ * Without this bit once the driver found out the ready-to-dequeue jobs are\n+ * not as many as n, it shall stop immediate, leave all processed jobs in the\n+ * queue, and return the ready jobs in negative. With this bit set the\n+ * function shall continue dequeue all done jobs and return the dequeued\n+ * job count in positive.\n+ */\n+\n+/**\n+ * Typedef that the user provided to get the dequeue count. User may use it to\n+ * return a fixed number or the number parsed from the opaque data stored in\n+ * the first processed job.\n+ *\n+ * @param\topaque\t\tDequeued opaque data.\n+ **/\n+typedef uint32_t (*rte_cryptodev_get_dequeue_count_t)\n+\t(void *opaque);\n+\n+/**\n+ * Typedef that the user provided to deal with post dequeue operation, such\n+ * as filling status.\n+ *\n+ * @param\topaque\t\tDequeued opaque data. In case\n+ *\t\t\t\tRTE_CRYPTO_HW_DP_FF_GET_OPAQUE_ARRAY bit is\n+ *\t\t\t\tset, this value will be the opaque data stored\n+ *\t\t\t\tin the specific processed jobs referenced by\n+ *\t\t\t\tindex, otherwise it will be the opaque data\n+ *\t\t\t\tstored in the first processed job in the burst.\n+ * @param\tindex\t\tIndex number of the processed job.\n+ * @param\tis_op_success\tDriver filled operation status.\n+ **/\n+typedef void (*rte_cryptodev_post_dequeue_t)(void *opaque, uint32_t index,\n+\t\tuint8_t is_op_success);\n+\n+/**\n+ * Union\n+ */\n+union rte_cryptodev_hw_session_ctx {\n+\tstruct rte_cryptodev_sym_session *crypto_sess;\n+\tstruct rte_crypto_sym_xform *xform;\n+\tstruct rte_security_session *sec_sess;\n+};\n+\n+/**\n+ * Enqueue actual AEAD symmetric crypto processing on user provided data.\n+ *\n+ * @param\tdev_id\t\tThe device identifier.\n+ * @param\tqp_id\t\tThe index of the queue pair from which to\n+ *\t\t\t\tretrieve processed packets. The value must be\n+ *\t\t\t\tin the range [0, nb_queue_pair - 1] previously\n+ *\t\t\t\tsupplied to rte_cryptodev_configure().\n+ * @param\tsession\t\tUnion of different session types, depends on\n+ *\t\t\t\tRTE_CRYPTO_HW_DP_FF_* flag.\n+ * @param\tofs\t\tStart and stop offsets for auth and cipher\n+ *\t\t\t\toperations.\n+ * @param\tvec\t\tVectorized operation descriptor.\n+ * @param\topaque\t\tOpaque data to be written to HW\n+ *\t\t\t\tdescriptor for enqueue. In case\n+ *\t\t\t\tRTE_CRYPTO_HW_DP_FF_SET_OPAQUE_ARRAY flag is\n+ *\t\t\t\tset this value should be an array of all\n+ *\t\t\t\t'vec->num' opaque data with the size stated in\n+ *\t\t\t\tthe vec. Otherwise only the first opaque\n+ *\t\t\t\tdata in the array will be stored in the first\n+ *\t\t\t\tHW descriptor waiting for dequeue.\n+ * @param\tflags\t\tBit-mask of one or more RTE_CRYPTO_HW_DP_FF_*\n+ *\t\t\t\tflags.\n+ *\n+ * @return\n+ * - Returns number of successfully processed packets. In case the returned\n+ * value is smaller than 'vec->num', the vec's status array will be written\n+ * the error number accordingly.\n+ */\n+__rte_experimental\n+uint32_t\n+rte_cryptodev_sym_hw_crypto_enqueue_aead(uint8_t dev_id, uint16_t qp_id,\n+\tunion rte_cryptodev_hw_session_ctx session,\n+\tunion rte_crypto_sym_ofs ofs, struct rte_crypto_sym_vec *vec,\n+\tvoid **opaque, uint32_t flags);\n+\n+/**\n+ * Enqueue actual cipher-only symmetric crypto processing on user provided data.\n+ *\n+ * @param\tdev_id\t\tThe device identifier.\n+ * @param\tqp_id\t\tThe index of the queue pair from which to\n+ *\t\t\t\tretrieve processed packets. The value must be\n+ *\t\t\t\tin the range [0, nb_queue_pair - 1] previously\n+ *\t\t\t\tsupplied to rte_cryptodev_configure().\n+ * @param\tsession\t\tUnion of different session types, depends on\n+ *\t\t\t\tRTE_CRYPTO_HW_DP_FF_* flag.\n+ * @param\tofs\t\tStart and stop offsets for auth and cipher\n+ *\t\t\t\toperations.\n+ * @param\tvec\t\tVectorized operation descriptor.\n+ * @param\topaque\t\tOpaque data to be written to HW\n+ *\t\t\t\tdescriptor for enqueue. In case\n+ *\t\t\t\tRTE_CRYPTO_HW_DP_FF_SET_OPAQUE_ARRAY flag is\n+ *\t\t\t\tset this value should be an array of all\n+ *\t\t\t\t'vec->num' opaque data with the size stated in\n+ *\t\t\t\tthe vec. Otherwise only the first opaque\n+ *\t\t\t\tdata in the array will be stored in the first\n+ *\t\t\t\tHW descriptor waiting for dequeue.\n+ * @param\tflags\t\tBit-mask of one or more RTE_CRYPTO_HW_DP_FF_*\n+ *\t\t\t\tflags.\n+ *\n+ * @return\n+ * - Returns number of successfully processed packets. In case the returned\n+ * value is smaller than 'vec->num', the vec's status array will be written\n+ * the error number accordingly.\n+ */\n+__rte_experimental\n+uint32_t\n+rte_cryptodev_sym_hw_crypto_enqueue_cipher(uint8_t dev_id, uint16_t qp_id,\n+\tunion rte_cryptodev_hw_session_ctx session,\n+\tunion rte_crypto_sym_ofs ofs, struct rte_crypto_sym_vec *vec,\n+\tvoid **opaque, uint32_t flags);\n+\n+/**\n+ * Enqueue actual auth-only symmetric crypto processing on user provided data.\n+ *\n+ * @param\tdev_id\t\tThe device identifier.\n+ * @param\tqp_id\t\tThe index of the queue pair from which to\n+ *\t\t\t\tretrieve processed packets. The value must be\n+ *\t\t\t\tin the range [0, nb_queue_pair - 1] previously\n+ *\t\t\t\tsupplied to rte_cryptodev_configure().\n+ * @param\tsession\t\tUnion of different session types, depends on\n+ *\t\t\t\tRTE_CRYPTO_HW_DP_FF_* flag.\n+ * @param\tofs\t\tStart and stop offsets for auth and cipher\n+ *\t\t\t\toperations.\n+ * @param\tvec\t\tVectorized operation descriptor.\n+ * @param\topaque\t\tOpaque data to be written to HW\n+ *\t\t\t\tdescriptor for enqueue. In case\n+ *\t\t\t\tRTE_CRYPTO_HW_DP_FF_SET_OPAQUE_ARRAY flag is\n+ *\t\t\t\tset this value should be an array of all\n+ *\t\t\t\t'vec->num' opaque data with the size stated in\n+ *\t\t\t\tthe vec. Otherwise only the first opaque\n+ *\t\t\t\tdata in the array will be stored in the first\n+ *\t\t\t\tHW descriptor waiting for dequeue.\n+ * @param\tflags\t\tBit-mask of one or more RTE_CRYPTO_HW_DP_FF_*\n+ *\t\t\t\tflags.\n+ *\n+ * @return\n+ * - Returns number of successfully processed packets. In case the returned\n+ * value is smaller than 'vec->num', the vec's status array will be written\n+ * the error number accordingly.\n+ */\n+__rte_experimental\n+uint32_t\n+rte_cryptodev_sym_hw_crypto_enqueue_auth(uint8_t dev_id, uint16_t qp_id,\n+\tunion rte_cryptodev_hw_session_ctx session,\n+\tunion rte_crypto_sym_ofs ofs, struct rte_crypto_sym_vec *vec,\n+\tvoid **opaque, uint32_t flags);\n+\n+/**\n+ * Enqueue actual chained symmetric crypto processing on user provided data.\n+ *\n+ * @param\tdev_id\t\tThe device identifier.\n+ * @param\tqp_id\t\tThe index of the queue pair from which to\n+ *\t\t\t\tretrieve processed packets. The value must be\n+ *\t\t\t\tin the range [0, nb_queue_pair - 1] previously\n+ *\t\t\t\tsupplied to rte_cryptodev_configure().\n+ * @param\tsession\t\tUnion of different session types, depends on\n+ *\t\t\t\tRTE_CRYPTO_HW_DP_FF_* flag.\n+ * @param\tofs\t\tStart and stop offsets for auth and cipher\n+ *\t\t\t\toperations.\n+ * @param\tvec\t\tVectorized operation descriptor.\n+ * @param\topaque\t\tOpaque data to be written to HW\n+ *\t\t\t\tdescriptor for enqueue. In case\n+ *\t\t\t\tRTE_CRYPTO_HW_DP_FF_SET_OPAQUE_ARRAY flag is\n+ *\t\t\t\tset this value should be an array of all\n+ *\t\t\t\t'vec->num' opaque data with the size stated in\n+ *\t\t\t\tthe vec. Otherwise only the first opaque\n+ *\t\t\t\tdata in the array will be stored in the first\n+ *\t\t\t\tHW descriptor waiting for dequeue.\n+ * @param\tflags\t\tBit-mask of one or more RTE_CRYPTO_HW_DP_FF_*\n+ *\t\t\t\tflags.\n+ *\n+ * @return\n+ * - Returns number of successfully processed packets. In case the returned\n+ * value is smaller than 'vec->num', the vec's status array will be written\n+ * the error number accordingly.\n+ */\n+__rte_experimental\n+uint32_t\n+rte_cryptodev_sym_hw_crypto_enqueue_chain(uint8_t dev_id, uint16_t qp_id,\n+\tunion rte_cryptodev_hw_session_ctx session,\n+\tunion rte_crypto_sym_ofs ofs, struct rte_crypto_sym_vec *vec,\n+\tvoid **opaque, uint32_t flags);\n+\n+/**\n+ * Dequeue symmetric crypto processing of user provided data.\n+ *\n+ * @param\tdev_id\t\t\tThe device identifier.\n+ * @param\tqp_id\t\t\tThe index of the queue pair from which\n+ *\t\t\t\t\tto retrieve processed packets. The\n+ *\t\t\t\t\tvalue must be in the range [0,\n+ *\t\t\t\t\tnb_queue_pair - 1] previously\n+ *\t\t\t\t\tsupplied to rte_cryptodev_configure().\n+ * @param\tget_dequeue_count\tUser provided callback function to\n+ *\t\t\t\t\tobtain dequeue count.\n+ * @param\tpost_dequeue\t\tUser provided callback function to\n+ *\t\t\t\t\tpost-process a dequeued operation.\n+ * @param\tout_opaque\t\tOpaque data to be retrieve from HW\n+ *\t\t\t\t\tqueue. In case of the flag\n+ *\t\t\t\t\tRTE_CRYPTO_HW_DP_FF_GET_OPAQUE_ARRAY\n+ *\t\t\t\t\tis set every dequeued operation\n+ *\t\t\t\t\twill be written its stored opaque data\n+ *\t\t\t\t\tinto this array, otherwise only the\n+ *\t\t\t\t\tfirst dequeued operation will be\n+ *\t\t\t\t\twritten the opaque data.\n+ * @param\tn_success_jobs\t\tDriver written value to specific the\n+ *\t\t\t\t\ttotal successful operations count.\n+ * @param\tflags\t\t\tBit-mask of one or more\n+ *\t\t\t\t\tRTE_CRYPTO_HW_DP_FF_* flags.\n+ *\n+ * @return\n+ * - Returns number of dequeued packets.\n+ */\n+__rte_experimental\n+uint32_t\n+rte_cryptodev_sym_hw_crypto_dequeue(uint8_t dev_id, uint16_t qp_id,\n+\trte_cryptodev_get_dequeue_count_t get_dequeue_count,\n+\trte_cryptodev_post_dequeue_t post_dequeue,\n+\tvoid **out_opaque,\n+\tuint32_t *n_success_jobs, uint32_t flags);\n+\n #ifdef __cplusplus\n }\n #endif\ndiff --git a/lib/librte_cryptodev/rte_cryptodev_pmd.h b/lib/librte_cryptodev/rte_cryptodev_pmd.h\nindex 81975d72b..7ece9f8e9 100644\n--- a/lib/librte_cryptodev/rte_cryptodev_pmd.h\n+++ b/lib/librte_cryptodev/rte_cryptodev_pmd.h\n@@ -316,6 +316,88 @@ typedef uint32_t (*cryptodev_sym_cpu_crypto_process_t)\n \t(struct rte_cryptodev *dev, struct rte_cryptodev_sym_session *sess,\n \tunion rte_crypto_sym_ofs ofs, struct rte_crypto_sym_vec *vec);\n \n+/**\n+ * Enqueue actual symmetric crypto processing on user provided data.\n+ *\n+ * @param\tdev\t\tCrypto device pointer\n+ * @param\tqp_id\t\tThe index of the queue pair from which to\n+ *\t\t\t\tretrieve processed packets. The value must be\n+ *\t\t\t\tin the range [0, nb_queue_pair - 1] previously\n+ *\t\t\t\tsupplied to rte_cryptodev_configure().\n+ * @param\tsession\t\tUnion of different session types, depends on\n+ *\t\t\t\tRTE_CRYPTO_HW_DP_FF_* flag.\n+ * @param\tofs\t\tStart and stop offsets for auth and cipher\n+ *\t\t\t\toperations.\n+ * @param\tvec\t\tVectorized operation descriptor.\n+ * @param\topaque\t\tOpaque data to be written to HW\n+ *\t\t\t\tdescriptor for enqueue. In case\n+ *\t\t\t\tRTE_CRYPTO_HW_DP_FF_SET_OPAQUE_ARRAY flag is\n+ *\t\t\t\tset this value should be an array of all\n+ *\t\t\t\t'vec->num' opaque data with the size stated in\n+ *\t\t\t\tthe vec. Otherwise only the first opaque\n+ *\t\t\t\tdata in the array will be stored in the first\n+ *\t\t\t\tHW descriptor waiting for dequeue.\n+ * @param\tflags\t\tBit-mask of one or more RTE_CRYPTO_HW_DP_FF_*\n+ *\t\t\t\tflags.\n+ *\n+ * @return\n+ * - Returns number of successfully processed packets. In case the returned\n+ * value is smaller than 'vec->num', the vec's status array will be written\n+ * the error number accordingly.\n+ */\n+typedef uint32_t (*cryptodev_sym_hw_crypto_enqueue_t)\n+\t(struct rte_cryptodev *dev, uint16_t qp_id,\n+\tunion rte_cryptodev_hw_session_ctx session,\n+\tunion rte_crypto_sym_ofs ofs, struct rte_crypto_sym_vec *vec,\n+\tvoid **opaque, uint32_t flags);\n+\n+/**\n+ * Dequeue symmetric crypto processing of user provided data.\n+ *\n+ * @param\tdev\t\t\tCrypto device pointer\n+ * @param\tqp_id\t\t\tThe index of the queue pair from which\n+ *\t\t\t\t\tto retrieve processed packets. The\n+ *\t\t\t\t\tvalue must be in the range [0,\n+ *\t\t\t\t\tnb_queue_pair - 1] previously\n+ *\t\t\t\t\tsupplied to rte_cryptodev_configure().\n+ * @param\tget_dequeue_count\tUser provided callback function to\n+ *\t\t\t\t\tobtain dequeue count.\n+ * @param\tpost_dequeue\t\tUser provided callback function to\n+ *\t\t\t\t\tpost-process a dequeued operation.\n+ * @param\tout_opaque\t\tOpaque data to be retrieve from HW\n+ *\t\t\t\t\tqueue. In case of the flag\n+ *\t\t\t\t\tRTE_CRYPTO_HW_DP_FF_GET_OPAQUE_ARRAY\n+ *\t\t\t\t\tis set every dequeued operation\n+ *\t\t\t\t\twill be written its stored opaque data\n+ *\t\t\t\t\tinto this array, otherwise only the\n+ *\t\t\t\t\tfirst dequeued operation will be\n+ *\t\t\t\t\twritten the opaque data.\n+ * @param\tn_success_jobs\t\tDriver written value to specific the\n+ *\t\t\t\t\ttotal successful operations count.\n+ * @param\tflags\t\t\tBit-mask of one or more\n+ *\t\t\t\t\tRTE_CRYPTO_HW_DP_FF_* flags.\n+ *\n+ * @return\n+ * - Returns number of dequeued packets.\n+ */\n+typedef uint32_t (*cryptodev_sym_hw_crypto_dequeue_t)\n+\t(struct rte_cryptodev *dev, uint16_t qp_id,\n+\trte_cryptodev_get_dequeue_count_t get_dequeue_count,\n+\trte_cryptodev_post_dequeue_t post_dequeue,\n+\tvoid **out_opaque,\n+\tuint32_t *n_success_jobs, uint32_t flags);\n+\n+/**\n+ * Structure of HW crypto Data-plane APIs.\n+ */\n+struct rte_crytodev_sym_hw_dp_ops {\n+\tcryptodev_sym_hw_crypto_enqueue_t enqueue_aead;\n+\tcryptodev_sym_hw_crypto_enqueue_t enqueue_cipher;\n+\tcryptodev_sym_hw_crypto_enqueue_t enqueue_auth;\n+\tcryptodev_sym_hw_crypto_enqueue_t enqueue_chain;\n+\tcryptodev_sym_hw_crypto_dequeue_t dequeue;\n+\tvoid *reserved[3];\n+};\n \n /** Crypto device operations function pointer table */\n struct rte_cryptodev_ops {\n@@ -348,8 +430,12 @@ struct rte_cryptodev_ops {\n \t/**< Clear a Crypto sessions private data. */\n \tcryptodev_asym_free_session_t asym_session_clear;\n \t/**< Clear a Crypto sessions private data. */\n-\tcryptodev_sym_cpu_crypto_process_t sym_cpu_process;\n-\t/**< process input data synchronously (cpu-crypto). */\n+\tunion {\n+\t\tcryptodev_sym_cpu_crypto_process_t sym_cpu_process;\n+\t\t/**< process input data synchronously (cpu-crypto). */\n+\t\tstruct rte_crytodev_sym_hw_dp_ops *sym_hw_enq_deq;\n+\t\t/**< Get HW crypto data-path call back functions and data */\n+\t};\n };\n \n \ndiff --git a/lib/librte_cryptodev/rte_cryptodev_version.map b/lib/librte_cryptodev/rte_cryptodev_version.map\nindex a7a78dc41..fb7ddb50c 100644\n--- a/lib/librte_cryptodev/rte_cryptodev_version.map\n+++ b/lib/librte_cryptodev/rte_cryptodev_version.map\n@@ -106,4 +106,9 @@ EXPERIMENTAL {\n \n \t# added in 20.08\n \trte_cryptodev_get_qp_status;\n+\trte_cryptodev_sym_hw_crypto_enqueue_aead;\n+\trte_cryptodev_sym_hw_crypto_enqueue_cipher;\n+\trte_cryptodev_sym_hw_crypto_enqueue_auth;\n+\trte_cryptodev_sym_hw_crypto_enqueue_chain;\n+\trte_cryptodev_sym_hw_crypto_dequeue;\n };\n", "prefixes": [ "v5", "1/4" ] }