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GET /api/patches/76464/?format=api
{ "id": 76464, "url": "http://patchwork.dpdk.org/api/patches/76464/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20200903163308.4759-2-akhil.goyal@nxp.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200903163308.4759-2-akhil.goyal@nxp.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200903163308.4759-2-akhil.goyal@nxp.com", "date": "2020-09-03T16:33:08", "name": "[2/2] crypto/dpaa2_sec: support non-HMAC auth algo versions", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "442afe3377d3737c4e00c914f942f938c78d89a2", "submitter": { "id": 517, "url": "http://patchwork.dpdk.org/api/people/517/?format=api", "name": "Akhil Goyal", "email": "akhil.goyal@nxp.com" }, "delegate": { "id": 6690, "url": "http://patchwork.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20200903163308.4759-2-akhil.goyal@nxp.com/mbox/", "series": [ { "id": 11932, "url": "http://patchwork.dpdk.org/api/series/11932/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=11932", "date": "2020-09-03T16:33:07", "name": "[1/2] crypto/dpaa2_sec: support DES-CBC", "version": 1, "mbox": "http://patchwork.dpdk.org/series/11932/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/76464/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/76464/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id D6E38A04BF;\n\tThu, 3 Sep 2020 18:33:26 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 3F29F1C10F;\n\tThu, 3 Sep 2020 18:33:20 +0200 (CEST)", "from inva020.nxp.com (inva020.nxp.com [92.121.34.13])\n by dpdk.org (Postfix) with ESMTP id 82A6E1C0D5\n for <dev@dpdk.org>; Thu, 3 Sep 2020 18:33:17 +0200 (CEST)", "from inva020.nxp.com (localhost [127.0.0.1])\n by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 5F6D81A0E1F;\n Thu, 3 Sep 2020 18:33:17 +0200 (CEST)", "from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com\n [165.114.16.14])\n by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 608B91A0405;\n Thu, 3 Sep 2020 18:33:15 +0200 (CEST)", "from lsv03273.swis.in-blr01.nxp.com (lsv03273.swis.in-blr01.nxp.com\n [92.120.147.113])\n by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id D1C8A40330;\n Thu, 3 Sep 2020 18:33:10 +0200 (CEST)" ], "From": "akhil.goyal@nxp.com", "To": "dev@dpdk.org", "Cc": "Akhil Goyal <akhil.goyal@nxp.com>, Hemant Agrawal <hemant.agrawal@nxp.com>", "Date": "Thu, 3 Sep 2020 22:03:08 +0530", "Message-Id": "<20200903163308.4759-2-akhil.goyal@nxp.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20200903163308.4759-1-akhil.goyal@nxp.com>", "References": "<20200903163308.4759-1-akhil.goyal@nxp.com>", "X-Virus-Scanned": "ClamAV using ClamSMTP", "Subject": "[dpdk-dev] [PATCH 2/2] crypto/dpaa2_sec: support non-HMAC auth algo\n\tversions", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Akhil Goyal <akhil.goyal@nxp.com>\n\nadded support for non-HMAC for auth algorithms\n(SHA1, SHA2, MD5).\nCorresponding capabilities are enabled so that test\napplication can enable those test cases.\n\nSigned-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>\nSigned-off-by: Akhil Goyal <akhil.goyal@nxp.com>\n---\n doc/guides/cryptodevs/features/dpaa2_sec.ini | 6 +\n drivers/common/dpaax/caamflib/desc/algo.h | 86 +++++++++++-\n drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 82 +++++++++---\n drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h | 131 ++++++++++++++++++-\n 4 files changed, 286 insertions(+), 19 deletions(-)", "diff": "diff --git a/doc/guides/cryptodevs/features/dpaa2_sec.ini b/doc/guides/cryptodevs/features/dpaa2_sec.ini\nindex c31321d5d..02c1bf418 100644\n--- a/doc/guides/cryptodevs/features/dpaa2_sec.ini\n+++ b/doc/guides/cryptodevs/features/dpaa2_sec.ini\n@@ -33,11 +33,17 @@ ZUC EEA3 = Y\n ; Supported authentication algorithms of the 'dpaa2_sec' crypto driver.\n ;\n [Auth]\n+MD5 = Y\n MD5 HMAC = Y\n+SHA1 = Y\n SHA1 HMAC = Y\n+SHA224 = Y\n SHA224 HMAC = Y\n+SHA256 = Y\n SHA256 HMAC = Y\n+SHA384 = Y\n SHA384 HMAC = Y\n+SHA512 = Y\n SHA512 HMAC = Y\n SNOW3G UIA2 = Y\n ZUC EIA3 = Y\ndiff --git a/drivers/common/dpaax/caamflib/desc/algo.h b/drivers/common/dpaax/caamflib/desc/algo.h\nindex 345bb5b3f..41cac5abd 100644\n--- a/drivers/common/dpaax/caamflib/desc/algo.h\n+++ b/drivers/common/dpaax/caamflib/desc/algo.h\n@@ -1,7 +1,7 @@\n /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)\n *\n * Copyright 2008-2016 Freescale Semiconductor Inc.\n- * Copyright 2016,2019 NXP\n+ * Copyright 2016,2019-2020 NXP\n *\n */\n \n@@ -466,6 +466,90 @@ cnstr_shdsc_hmac(uint32_t *descbuf, bool ps, bool swap,\n \treturn PROGRAM_FINALIZE(p);\n }\n \n+/**\n+ * cnstr_shdsc_hash - HASH shared\n+ * @descbuf: pointer to descriptor-under-construction buffer\n+ * @ps: if 36/40bit addressing is desired, this parameter must be true\n+ * @swap: must be true when core endianness doesn't match SEC endianness\n+ * @share: sharing type of shared descriptor\n+ * @authdata: pointer to authentication transform definitions;\n+ * message digest algorithm: OP_ALG_ALGSEL_MD5/ SHA1-512.\n+ * @do_icv: 0 if ICV checking is not desired, any other value if ICV checking\n+ * is needed for all the packets processed by this shared descriptor\n+ * @trunc_len: Length of the truncated ICV to be written in the output buffer, 0\n+ * if no truncation is needed\n+ *\n+ * Note: There's no support for keys longer than the block size of the\n+ * underlying hash function, according to the selected algorithm.\n+ *\n+ * Return: size of descriptor written in words or negative number on error\n+ */\n+static inline int\n+cnstr_shdsc_hash(uint32_t *descbuf, bool ps, bool swap,\n+\t\t enum rta_share_type share,\n+\t\t struct alginfo *authdata, uint8_t do_icv,\n+\t\t uint8_t trunc_len)\n+{\n+\tstruct program prg;\n+\tstruct program *p = &prg;\n+\tuint8_t storelen, opicv, dir;\n+\n+\t/* Compute fixed-size store based on alg selection */\n+\tswitch (authdata->algtype) {\n+\tcase OP_ALG_ALGSEL_MD5:\n+\t\tstorelen = 16;\n+\t\tbreak;\n+\tcase OP_ALG_ALGSEL_SHA1:\n+\t\tstorelen = 20;\n+\t\tbreak;\n+\tcase OP_ALG_ALGSEL_SHA224:\n+\t\tstorelen = 28;\n+\t\tbreak;\n+\tcase OP_ALG_ALGSEL_SHA256:\n+\t\tstorelen = 32;\n+\t\tbreak;\n+\tcase OP_ALG_ALGSEL_SHA384:\n+\t\tstorelen = 48;\n+\t\tbreak;\n+\tcase OP_ALG_ALGSEL_SHA512:\n+\t\tstorelen = 64;\n+\t\tbreak;\n+\tdefault:\n+\t\treturn -EINVAL;\n+\t}\n+\n+\ttrunc_len = trunc_len && (trunc_len < storelen) ? trunc_len : storelen;\n+\n+\topicv = do_icv ? ICV_CHECK_ENABLE : ICV_CHECK_DISABLE;\n+\tdir = do_icv ? DIR_DEC : DIR_ENC;\n+\n+\tPROGRAM_CNTXT_INIT(p, descbuf, 0);\n+\tif (swap)\n+\t\tPROGRAM_SET_BSWAP(p);\n+\tif (ps)\n+\t\tPROGRAM_SET_36BIT_ADDR(p);\n+\tSHR_HDR(p, share, 1, SC);\n+\n+\t/* Do operation */\n+\t/* compute sequences */\n+\tif (opicv == ICV_CHECK_ENABLE)\n+\t\tMATHB(p, SEQINSZ, SUB, trunc_len, VSEQINSZ, 4, IMMED2);\n+\telse\n+\t\tMATHB(p, SEQINSZ, SUB, MATH2, VSEQINSZ, 4, 0);\n+\n+\tALG_OPERATION(p, authdata->algtype,\n+\t\t OP_ALG_AAI_HASH,\n+\t\t OP_ALG_AS_INITFINAL, opicv, dir);\n+\tSEQFIFOLOAD(p, MSG2, 0, VLF | LAST2);\n+\n+\tif (opicv == ICV_CHECK_ENABLE)\n+\t\tSEQFIFOLOAD(p, ICV2, trunc_len, LAST2);\n+\telse\n+\t\tSEQSTORE(p, CONTEXT2, 0, trunc_len, 0);\n+\n+\treturn PROGRAM_FINALIZE(p);\n+}\n+\n /**\n * cnstr_shdsc_kasumi_f8 - KASUMI F8 (Confidentiality) as a shared descriptor\n * (ETSI \"Document 1: f8 and f9 specification\")\ndiff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c\nindex 69040ec6c..195c7d894 100644\n--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c\n+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c\n@@ -1979,21 +1979,23 @@ dpaa2_sec_auth_init(struct rte_cryptodev *dev,\n \tflc = &priv->flc_desc[DESC_INITFINAL].flc;\n \n \tsession->ctxt_type = DPAA2_SEC_AUTH;\n-\tsession->auth_key.data = rte_zmalloc(NULL, xform->auth.key.length,\n+\tsession->auth_key.length = xform->auth.key.length;\n+\tif (xform->auth.key.length) {\n+\t\tsession->auth_key.data = rte_zmalloc(NULL,\n+\t\t\txform->auth.key.length,\n \t\t\tRTE_CACHE_LINE_SIZE);\n-\tif (session->auth_key.data == NULL) {\n-\t\tDPAA2_SEC_ERR(\"Unable to allocate memory for auth key\");\n-\t\trte_free(priv);\n-\t\treturn -ENOMEM;\n+\t\tif (session->auth_key.data == NULL) {\n+\t\t\tDPAA2_SEC_ERR(\"Unable to allocate memory for auth key\");\n+\t\t\trte_free(priv);\n+\t\t\treturn -ENOMEM;\n+\t\t}\n+\t\tmemcpy(session->auth_key.data, xform->auth.key.data,\n+\t\t xform->auth.key.length);\n+\t\tauthdata.key = (size_t)session->auth_key.data;\n+\t\tauthdata.key_enc_flags = 0;\n+\t\tauthdata.key_type = RTA_DATA_IMM;\n \t}\n-\tsession->auth_key.length = xform->auth.key.length;\n-\n-\tmemcpy(session->auth_key.data, xform->auth.key.data,\n-\t xform->auth.key.length);\n-\tauthdata.key = (size_t)session->auth_key.data;\n \tauthdata.keylen = session->auth_key.length;\n-\tauthdata.key_enc_flags = 0;\n-\tauthdata.key_type = RTA_DATA_IMM;\n \n \tsession->digest_length = xform->auth.digest_length;\n \tsession->dir = (xform->auth.op == RTE_CRYPTO_AUTH_OP_GENERATE) ?\n@@ -2076,18 +2078,66 @@ dpaa2_sec_auth_init(struct rte_cryptodev *dev,\n \t\t\t\t\t !session->dir,\n \t\t\t\t\t session->digest_length);\n \t\tbreak;\n-\tcase RTE_CRYPTO_AUTH_KASUMI_F9:\n-\tcase RTE_CRYPTO_AUTH_NULL:\n \tcase RTE_CRYPTO_AUTH_SHA1:\n+\t\tauthdata.algtype = OP_ALG_ALGSEL_SHA1;\n+\t\tauthdata.algmode = OP_ALG_AAI_HASH;\n+\t\tsession->auth_alg = RTE_CRYPTO_AUTH_SHA1;\n+\t\tbufsize = cnstr_shdsc_hash(priv->flc_desc[DESC_INITFINAL].desc,\n+\t\t\t\t\t 1, 0, SHR_NEVER, &authdata,\n+\t\t\t\t\t !session->dir,\n+\t\t\t\t\t session->digest_length);\n+\t\tbreak;\n+\tcase RTE_CRYPTO_AUTH_MD5:\n+\t\tauthdata.algtype = OP_ALG_ALGSEL_MD5;\n+\t\tauthdata.algmode = OP_ALG_AAI_HASH;\n+\t\tsession->auth_alg = RTE_CRYPTO_AUTH_MD5;\n+\t\tbufsize = cnstr_shdsc_hash(priv->flc_desc[DESC_INITFINAL].desc,\n+\t\t\t\t\t 1, 0, SHR_NEVER, &authdata,\n+\t\t\t\t\t !session->dir,\n+\t\t\t\t\t session->digest_length);\n+\t\tbreak;\n \tcase RTE_CRYPTO_AUTH_SHA256:\n+\t\tauthdata.algtype = OP_ALG_ALGSEL_SHA256;\n+\t\tauthdata.algmode = OP_ALG_AAI_HASH;\n+\t\tsession->auth_alg = RTE_CRYPTO_AUTH_SHA256;\n+\t\tbufsize = cnstr_shdsc_hash(priv->flc_desc[DESC_INITFINAL].desc,\n+\t\t\t\t\t 1, 0, SHR_NEVER, &authdata,\n+\t\t\t\t\t !session->dir,\n+\t\t\t\t\t session->digest_length);\n+\t\tbreak;\n+\tcase RTE_CRYPTO_AUTH_SHA384:\n+\t\tauthdata.algtype = OP_ALG_ALGSEL_SHA384;\n+\t\tauthdata.algmode = OP_ALG_AAI_HASH;\n+\t\tsession->auth_alg = RTE_CRYPTO_AUTH_SHA384;\n+\t\tbufsize = cnstr_shdsc_hash(priv->flc_desc[DESC_INITFINAL].desc,\n+\t\t\t\t\t 1, 0, SHR_NEVER, &authdata,\n+\t\t\t\t\t !session->dir,\n+\t\t\t\t\t session->digest_length);\n+\t\tbreak;\n \tcase RTE_CRYPTO_AUTH_SHA512:\n+\t\tauthdata.algtype = OP_ALG_ALGSEL_SHA512;\n+\t\tauthdata.algmode = OP_ALG_AAI_HASH;\n+\t\tsession->auth_alg = RTE_CRYPTO_AUTH_SHA512;\n+\t\tbufsize = cnstr_shdsc_hash(priv->flc_desc[DESC_INITFINAL].desc,\n+\t\t\t\t\t 1, 0, SHR_NEVER, &authdata,\n+\t\t\t\t\t !session->dir,\n+\t\t\t\t\t session->digest_length);\n+\t\tbreak;\n \tcase RTE_CRYPTO_AUTH_SHA224:\n-\tcase RTE_CRYPTO_AUTH_SHA384:\n-\tcase RTE_CRYPTO_AUTH_MD5:\n+\t\tauthdata.algtype = OP_ALG_ALGSEL_SHA224;\n+\t\tauthdata.algmode = OP_ALG_AAI_HASH;\n+\t\tsession->auth_alg = RTE_CRYPTO_AUTH_SHA224;\n+\t\tbufsize = cnstr_shdsc_hash(priv->flc_desc[DESC_INITFINAL].desc,\n+\t\t\t\t\t 1, 0, SHR_NEVER, &authdata,\n+\t\t\t\t\t !session->dir,\n+\t\t\t\t\t session->digest_length);\n+\t\tbreak;\n \tcase RTE_CRYPTO_AUTH_AES_GMAC:\n \tcase RTE_CRYPTO_AUTH_AES_XCBC_MAC:\n \tcase RTE_CRYPTO_AUTH_AES_CMAC:\n \tcase RTE_CRYPTO_AUTH_AES_CBC_MAC:\n+\tcase RTE_CRYPTO_AUTH_KASUMI_F9:\n+\tcase RTE_CRYPTO_AUTH_NULL:\n \t\tDPAA2_SEC_ERR(\"Crypto: Unsupported auth alg %un\",\n \t\t\t xform->auth.algo);\n \t\tret = -ENOTSUP;\ndiff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h b/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h\nindex c1f95f280..310ef6a5b 100644\n--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h\n+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h\n@@ -200,6 +200,7 @@ typedef struct dpaa2_sec_session_entry {\n } dpaa2_sec_session;\n \n static const struct rte_cryptodev_capabilities dpaa2_sec_capabilities[] = {\n+\t/* Symmetric capabilities */\n \t{\t/* NULL (AUTH) */\n \t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n \t\t{.sym = {\n@@ -221,6 +222,27 @@ static const struct rte_cryptodev_capabilities dpaa2_sec_capabilities[] = {\n \t\t\t}, },\n \t\t}, },\n \t},\n+\t{\t/* MD5 */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_MD5,\n+\t\t\t\t.block_size = 64,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 0,\n+\t\t\t\t\t.max = 0,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.iv_size = { 0 }\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n \t{\t/* MD5 HMAC */\n \t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n \t\t{.sym = {\n@@ -242,6 +264,27 @@ static const struct rte_cryptodev_capabilities dpaa2_sec_capabilities[] = {\n \t\t\t}, }\n \t\t}, }\n \t},\n+\t{\t/* SHA1 */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA1,\n+\t\t\t\t.block_size = 64,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 0,\n+\t\t\t\t\t.max = 0,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 20,\n+\t\t\t\t\t.max = 20,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.iv_size = { 0 }\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n \t{\t/* SHA1 HMAC */\n \t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n \t\t{.sym = {\n@@ -263,6 +306,27 @@ static const struct rte_cryptodev_capabilities dpaa2_sec_capabilities[] = {\n \t\t\t}, }\n \t\t}, }\n \t},\n+\t{\t/* SHA224 */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA224,\n+\t\t\t\t.block_size = 64,\n+\t\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 0,\n+\t\t\t\t\t.max = 0,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 28,\n+\t\t\t\t\t.max = 28,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.iv_size = { 0 }\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n \t{\t/* SHA224 HMAC */\n \t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n \t\t{.sym = {\n@@ -284,6 +348,27 @@ static const struct rte_cryptodev_capabilities dpaa2_sec_capabilities[] = {\n \t\t\t}, }\n \t\t}, }\n \t},\n+\t{\t/* SHA256 */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA256,\n+\t\t\t\t.block_size = 64,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 0,\n+\t\t\t\t\t.max = 0,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 32,\n+\t\t\t\t\t.max = 32,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.iv_size = { 0 }\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n \t{\t/* SHA256 HMAC */\n \t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n \t\t{.sym = {\n@@ -302,9 +387,30 @@ static const struct rte_cryptodev_capabilities dpaa2_sec_capabilities[] = {\n \t\t\t\t\t.increment = 1\n \t\t\t\t},\n \t\t\t\t.iv_size = { 0 }\n-\t\t\t\t}, }\n \t\t\t}, }\n-\t\t},\n+\t\t}, }\n+\t},\n+\t{\t/* SHA384 */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA384,\n+\t\t\t\t.block_size = 64,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 0,\n+\t\t\t\t\t.max = 0,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 48,\n+\t\t\t\t\t.max = 48,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t\t},\n+\t\t\t\t.iv_size = { 0 }\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n \t{\t/* SHA384 HMAC */\n \t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n \t\t{.sym = {\n@@ -326,6 +432,27 @@ static const struct rte_cryptodev_capabilities dpaa2_sec_capabilities[] = {\n \t\t\t}, }\n \t\t}, }\n \t},\n+\t{\t/* SHA512 */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA512,\n+\t\t\t\t.block_size = 128,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 0,\n+\t\t\t\t\t.max = 0,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 64,\n+\t\t\t\t\t.max = 64,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.iv_size = { 0 }\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n \t{\t/* SHA512 HMAC */\n \t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n \t\t{.sym = {\n", "prefixes": [ "2/2" ] }