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{
    "id": 86374,
    "url": "http://patchwork.dpdk.org/api/patches/86374/?format=api",
    "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/1610428684-20708-5-git-send-email-wei.huang@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patchwork.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1610428684-20708-5-git-send-email-wei.huang@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1610428684-20708-5-git-send-email-wei.huang@intel.com",
    "date": "2021-01-12T05:18:04",
    "name": "[v9,4/4] examples/ifpga: add example for opae ifpga API",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "ec475568dfca8cb0cf64b22bb2a444386b063aec",
    "submitter": {
        "id": 2033,
        "url": "http://patchwork.dpdk.org/api/people/2033/?format=api",
        "name": "Wei Huang",
        "email": "wei.huang@intel.com"
    },
    "delegate": {
        "id": 1540,
        "url": "http://patchwork.dpdk.org/api/users/1540/?format=api",
        "username": "qzhan15",
        "first_name": "Qi",
        "last_name": "Zhang",
        "email": "qi.z.zhang@intel.com"
    },
    "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/1610428684-20708-5-git-send-email-wei.huang@intel.com/mbox/",
    "series": [
        {
            "id": 14655,
            "url": "http://patchwork.dpdk.org/api/series/14655/?format=api",
            "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=14655",
            "date": "2021-01-12T05:18:00",
            "name": "raw/ifpga: add extra OPAE APIs",
            "version": 9,
            "mbox": "http://patchwork.dpdk.org/series/14655/mbox/"
        }
    ],
    "comments": "http://patchwork.dpdk.org/api/patches/86374/comments/",
    "check": "fail",
    "checks": "http://patchwork.dpdk.org/api/patches/86374/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
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        ],
        "IronPort-SDR": [
            "\n HVCbNDFPGCT6J0e5Uq3ysypRB5xpn5uer7DK4olx5B9vqjI4ghjHsyx/OskY80a59F5NgVJeCV\n iRpESN9HJKFA==",
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            "E=Sophos;i=\"5.79,340,1602572400\"; d=\"scan'208\";a=\"400054404\""
        ],
        "X-ExtLoop1": "1",
        "From": "Wei Huang <wei.huang@intel.com>",
        "To": "dev@dpdk.org,\n\trosen.xu@intel.com,\n\tqi.z.zhang@intel.com",
        "Cc": "stable@dpdk.org, tianfei.zhang@intel.com, Wei Huang <wei.huang@intel.com>",
        "Date": "Tue, 12 Jan 2021 00:18:04 -0500",
        "Message-Id": "<1610428684-20708-5-git-send-email-wei.huang@intel.com>",
        "X-Mailer": "git-send-email 1.8.3.1",
        "In-Reply-To": "<1610428684-20708-1-git-send-email-wei.huang@intel.com>",
        "References": "<1610428684-20708-1-git-send-email-wei.huang@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v9 4/4] examples/ifpga: add example for opae\n ifpga API",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
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    },
    "content": "An example application shows how to use opae ifpga APIs.\nYou can test each API by running corresponding command.\nA guide is also added to show how to run the example.\n\nSigned-off-by: Wei Huang <wei.huang@intel.com>\n---\nv2: fix coding style issue in commands.c\n---\nv3: add guide for running example\n---\nv4: fix compilation issue of ifpga.rst\n---\n doc/guides/sample_app_ug/ifpga.rst |  433 +++++++++\n examples/ifpga/Makefile            |   45 +\n examples/ifpga/commands.c          | 1321 ++++++++++++++++++++++++++++\n examples/ifpga/commands.h          |   16 +\n examples/ifpga/main.c              |   38 +\n examples/ifpga/meson.build         |   19 +\n 6 files changed, 1872 insertions(+)\n create mode 100644 doc/guides/sample_app_ug/ifpga.rst\n create mode 100644 examples/ifpga/Makefile\n create mode 100644 examples/ifpga/commands.c\n create mode 100644 examples/ifpga/commands.h\n create mode 100644 examples/ifpga/main.c\n create mode 100644 examples/ifpga/meson.build",
    "diff": "diff --git a/doc/guides/sample_app_ug/ifpga.rst b/doc/guides/sample_app_ug/ifpga.rst\nnew file mode 100644\nindex 000000000..adcac3bdf\n--- /dev/null\n+++ b/doc/guides/sample_app_ug/ifpga.rst\n@@ -0,0 +1,433 @@\n+..  SPDX-License-Identifier: BSD-3-Clause\n+    Copyright(c) 2020-2021 Intel Corporation.\n+\n+Intel FPGA Sample Application\n+=============================\n+\n+The Intel FPGA sample application is an example of how to use OPAE API to manage\n+Intel FPGA.\n+\n+Overview\n+--------\n+\n+The Intel FPGA sample application is a simple application that demonstrates\n+the use of the OPAE API provided by ifpga driver in the DPDK.\n+This application is a readline-like interface that can be used to manage\n+Intel FPGA, in a Linux* application environment.\n+\n+Compiling the Application\n+-------------------------\n+\n+To compile the sample application see :doc:`compiling`\n+\n+The application is located in the ``ifpga`` sub-directory.\n+\n+Running the Application\n+-----------------------\n+\n+To run the application in linux environment, issue the following command:\n+\n+.. code-block:: console\n+\n+    $ ./<build_dir>/examples/dpdk-ifpga --proc-type=auto\n+\n+Refer to the *DPDK Getting Started Guide* for general information on running\n+applications and the Environment Abstraction Layer (EAL) options.\n+\n+Explanation\n+-----------\n+\n+The following sections provide some explanation of the code.\n+\n+EAL Initialization and cmdline Start\n+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n+\n+The first task is the initialization of the Environment Abstraction Layer (EAL).\n+This is achieved as follows:\n+\n+.. code-block:: c\n+\n+    int main(int argc, char **argv)\n+    {\n+        ret = opae_init_eal(argc, argv);\n+        if (ret < 0)\n+            rte_panic(\"Cannot init EAL\\n\");\n+\n+Then, a new command line object is created and started to interact with the user\n+through the console:\n+\n+.. code-block:: c\n+\n+    cl = cmdline_stdin_new(main_ctx, \"opae> \");\n+    if (cl == NULL)\n+        rte_panic(\"Cannot create cmdline instance\\n\");\n+    cmdline_interact(cl);\n+    opae_cleanup_eal();\n+    cmdline_stdin_exit(cl);\n+\n+The cmd line_interact() function returns when the user types **Ctrl-d** or\n+**quit**. In this case, EAL is cleaned up and the application exits.\n+\n+Commands Description\n+--------------------\n+\n+The following sections provide some explanation of the commands.\n+\n+help command\n+~~~~~~~~~~~~\n+\n+The application has on-line help for the commands that are available at runtime.\n+\n+.. code-block:: console\n+\n+   opae> help\n+    get_api_version                        get OPAE API version\n+    get_proc_type                          get DPDK process type\n+    get_image_info <FILE>                  get information of image file\n+    get_status <BDF>                       get current status & progress of FPGA\n+    get_property <BDF> <0|1|2|4|8>         get property of FPGA\n+    get_phy_info <BDF>                     get information of PHY\n+    get_parent <BDF>                       get parent PCI device of FPGA\n+    get_child <BDF>                        get child PCI device of FPGA\n+    get_pf1 <BDF>                          get physical function 1 device of FPGA\n+    set_log_level <0-4>                    set logging level\n+    set_log_file <FILE>                    set logging file\n+    set_status <BDF> <0-4> <0-100>         set current status & progress of FPGA\n+    enumerate <VID> <DID>                  enumerate specified FPGA\n+    bind <BDF> <DRIVER>                    bind FPGA with kernel driver\n+    unbind <BDF>                           unbind FPGA from kernel driver\n+    probe <BDF>                            probe FPGA with IFPGA driver\n+    remove <BDF>                           remove FPGA from IFPGA driver\n+    flash <BDF> <FILE>                     update flash of FPGA\n+    pr <BDF> <PORT> <FILE>                 partial reconfigure FPGA\n+    reboot <BDF> <fpga|bmc> <0-1>          reboot FPGA or MAX10\n+    cancel <BDF>                           cancel flash update\n+    check                                  display list of PCI devices\n+    pci_read <BDF> <0-1024>                read PCI configuration space\n+    pci_write <BDF> <0-1024> <NUM>         write PCI configuration space\n+    quit                                   exit DPDK application\n+    help                                   show commands list\n+\n+get_api_version command\n+~~~~~~~~~~~~~~~~~~~~~~~\n+\n+Show OPAE API version which is same to the version of DPDK.\n+\n+.. code-block:: console\n+\n+   opae> get_api_version\n+   21.2.0\n+\n+set_log_level command\n+~~~~~~~~~~~~~~~~~~~~~\n+\n+Set logging level of OPAE API. Logging level is defined as below.\n+0 - CRITICAL\n+1 - ERROR\n+2 - WARNING\n+3 - INFORMATION\n+4 - DEBUG\n+\n+.. code-block:: console\n+\n+   opae> set_log_level 4\n+   OPAE-API: Current log level is DEBUG\n+   Successful\n+   opae> set_log_level 6\n+   OPAE-API: Current log level is DEBUG\n+   Failed\n+\n+set_log_file command\n+~~~~~~~~~~~~~~~~~~~~\n+\n+Set logging file of OPAE API.\n+\n+.. code-block:: console\n+\n+   opae> set_log_file /tmp/ifpga.log\n+   Successful\n+\n+get_proc_type command\n+~~~~~~~~~~~~~~~~~~~~~\n+\n+Show the process type of DPDK. If you start multiple instances of the\n+application, the process type of the first one is 'Primary', the others\n+are 'Secondary'.\n+\n+.. code-block:: console\n+\n+   opae> get_proc_type\n+   Primary\n+\n+get_image_info command\n+~~~~~~~~~~~~~~~~~~~~~~\n+\n+Display information of FPGA image file.\n+\n+.. code-block:: console\n+\n+   opae> get_image_info /home/wei/a10.bin\n+   Type:           FPGA_BBS\n+   Action:         UPDATE\n+   Total length:   58720256\n+   Payload offset: 1024\n+   Payload length: 58719232\n+   opae> get_image_info /home/wei/data.bin\n+   OPAE-ERR: Image '/home/wei/data.bin' can not be recognized\n+   Invalid image file\n+\n+enumerate command\n+~~~~~~~~~~~~~~~~~\n+\n+Display PCI address of FPGA with specified vendor ID and device ID. ID value can\n+be set to 0xffff for arbitrary ID.\n+\n+.. code-block:: console\n+\n+   opae> enumerate 0x8086 0x0b30\n+   0000:24:00.0\n+\n+get_property command\n+~~~~~~~~~~~~~~~~~~~~\n+\n+Display property information of specified FPGA. Property type is defined as below.\n+0 - All properties\n+1 - PCI property\n+2 - FME property\n+4 - port property\n+8 - BMC property\n+PCI property is always available, other properties can only be displayed after\n+ifpga driver is probed to the FPGA.\n+\n+.. code-block:: console\n+\n+   opae> get_property 24:00.0 0\n+   PCI:\n+    PCIe s:b:d.f     : 0000:24:00.0\n+    kernel driver    : vfio-pci\n+   FME:\n+    platform         : Vista Creek\n+    DCP version      : DCP 1.2\n+    phase            : Beta\n+    interface        : 2x2x25G\n+    build version    : 0.0.2\n+    ports num        : 1\n+    boot page        : user\n+    pr interface id  : a5d72a3c-c8b0-4939-912c-f715e5dc10ca\n+   PORT0:\n+    access type      : PF\n+    accelerator id   : 8892c23e-2eed-4b44-8bb6-5c88606e07df\n+   BMC:\n+    MAX10 version    : D.2.0.5\n+    NIOS FW version  : D.2.0.12\n+\n+get_phy_info command\n+~~~~~~~~~~~~~~~~~~~~\n+\n+Display information and status of PHY connects to the specified FPGA.\n+\n+.. code-block:: console\n+\n+   opae> get_phy_info 24:00.0\n+    retimers num     : 2\n+    link speed       : 25G\n+    link status      : 00\n+\n+get_parent command\n+~~~~~~~~~~~~~~~~~~\n+\n+Display PCI address of upstream device connects to the specified FPGA.\n+\n+.. code-block:: console\n+\n+   opae> get_parent 24:00.0\n+   0000:22:09.0\n+\n+get_child command\n+~~~~~~~~~~~~~~~~~\n+\n+Display PCI address of downstream device connects to the specified FPGA.\n+\n+.. code-block:: console\n+\n+   opae> get_child 24:00.0\n+   No child\n+   opae> get_child 22:09.0\n+   0000:24:00.0\n+\n+get_pf1 command\n+~~~~~~~~~~~~~~~\n+\n+Display PCI address of PF1 (physical function 1) of specified FPGA.\n+\n+.. code-block:: console\n+\n+   opae> get_pf1 24:00.0\n+   0000:26:00.0\n+   0000:26:00.1\n+\n+get_status command\n+~~~~~~~~~~~~~~~~~~\n+\n+Display current RSU status of specified FPGA.\n+\n+.. code-block:: console\n+\n+   opae> get_status 24:00.0\n+   Status:   IDLE\n+   Progress: 0%\n+\n+set_status command\n+~~~~~~~~~~~~~~~~~~\n+\n+Set current RSU status of specified FPGA. This command is mainly used for debug\n+purpose. Status value is defined as below.\n+0 - IDLE\n+1 - PREPARE\n+2 - PROGRAM\n+3 - COPY\n+4 - REBOOT\n+\n+.. code-block:: console\n+\n+   opae> set_status 24:00.0 2 35\n+   Successful\n+   opae> get_status 24:00.0\n+   Status:   PROGRAM\n+   Progress: 35%\n+\n+unbind command\n+~~~~~~~~~~~~~~\n+\n+Unbind kernel driver from specified FPGA.\n+\n+.. code-block:: console\n+\n+   opae> unbind 24:00.0\n+   OPAE-ERR: 0000:24:00.0 is probed, remove it first\n+   Failed\n+   opae> remove 24:00.0\n+   Successful\n+   opae> unbind 24:00.0\n+   Successful\n+\n+bind command\n+~~~~~~~~~~~~\n+\n+Bind specified kernel driver to specified FPGA.\n+\n+.. code-block:: console\n+\n+   opae> bind 24:00.0 vfio-pci\n+   Successful\n+\n+probe command\n+~~~~~~~~~~~~~\n+\n+Probe specified FPGA with DPDK PMD driver.\n+\n+.. code-block:: console\n+\n+   opae> probe 24:00.0\n+   Successful\n+\n+remove command\n+~~~~~~~~~~~~~~\n+\n+Remove specified FPGA from DPDK PMD driver. It's a reverse operation to probe\n+command.\n+\n+.. code-block:: console\n+\n+   opae> remove 24:00.0\n+   Successful\n+\n+flash command\n+~~~~~~~~~~~~~\n+\n+Update image in flash of specified FPGA.\n+\n+.. code-block:: console\n+\n+   opae> flash 24:00.0 /home/wei/a10.bin\n+   Successful\n+\n+pr command\n+~~~~~~~~~~\n+\n+Do partial reconfiguration of specified FPGA.\n+\n+.. code-block:: console\n+\n+   opae> pr 24:00.0 0 /home/wei/nlb0.gbs\n+   Successful\n+\n+reboot command\n+~~~~~~~~~~~~~~\n+\n+Reboot specified FPGA. Reboot type and page is defined as below.\n+fpga - reboot FPGA only\n+bmc - reboot whole card with FPGA\n+0 - factory page\n+1 - user page\n+\n+.. code-block:: console\n+\n+   opae> reboot 24:00.0 fpga 1\n+   Successful\n+\n+cancel command\n+~~~~~~~~~~~~~~\n+\n+Cancel flash programming of specified FPGA.\n+\n+.. code-block:: console\n+\n+   opae> cancel 24:00.0\n+   Successful\n+\n+check command\n+~~~~~~~~~~~~~\n+\n+Display PCI device list established by DPDK.\n+\n+.. code-block:: console\n+\n+   opae> check\n+ ID     NAME       SEG BUS DEV FUNC  VID  DID   KDRV\n+  0 0000:00:11.5  0000  00  11  5   8086 2827   unknown\n+  1 0000:00:14.0  0000  00  14  0   8086 a1af   unknown\n+  2 0000:00:16.0  0000  00  16  0   8086 a1ba   unknown\n+  3 0000:00:1c.0  0000  00  1c  0   8086 a190   unknown\n+ ......\n+ 29 0000:24:00.0  0000  24  00  0   8086 0b30   vfio-pci\n+ ......\n+\n+pci_read command\n+~~~~~~~~~~~~~~~~\n+\n+Read PCI configuration space of specified FPGA.\n+\n+.. code-block:: console\n+\n+   opae> pci_read 24:00.0 0\n+   0x0b308086\n+\n+pci_write command\n+~~~~~~~~~~~~~~~~~\n+\n+Write PCI configuration space of specified FPGA.\n+\n+.. code-block:: console\n+\n+   opae> pci_write 24:00.0 4 0x100406\n+   Successful\n+\n+quit command\n+~~~~~~~~~~~~\n+\n+Exit this sample application.\n+\n+.. code-block:: console\n+\n+   opae> quit\ndiff --git a/examples/ifpga/Makefile b/examples/ifpga/Makefile\nnew file mode 100644\nindex 000000000..6bfd5c8b4\n--- /dev/null\n+++ b/examples/ifpga/Makefile\n@@ -0,0 +1,45 @@\n+# SPDX-License-Identifier: BSD-3-Clause\n+# Copyright(c) 2020-2021 Intel Corporation\n+\n+# binary name\n+APP = ifpga\n+\n+# all source are stored in SRCS-y\n+SRCS-y := main.c commands.c\n+\n+# Build using pkg-config variables if possible\n+ifneq ($(shell pkg-config --exists libdpdk && echo 0),0)\n+$(error \"no installation of DPDK found\")\n+endif\n+\n+all: static\n+.PHONY: shared static\n+shared: build/$(APP)-shared\n+\tln -sf $(APP)-shared build/$(APP)\n+static: build/$(APP)-static\n+\tln -sf $(APP)-static build/$(APP)\n+\n+PKGCONF ?= pkg-config\n+\n+PC_FILE := $(shell $(PKGCONF) --path libdpdk 2>/dev/null)\n+CFLAGS += -O3 $(shell $(PKGCONF) --cflags libdpdk) -I../../drivers/raw/ifpga\n+LDFLAGS_SHARED = $(shell $(PKGCONF) --libs libdpdk) -lrte_bus_pci \\\n+                 -lrte_bus_ifpga -lrte_bus_vdev -lrte_raw_ifpga \\\n+                 -lrte_net_i40e -lrte_net_ipn3ke\n+LDFLAGS_STATIC = $(shell $(PKGCONF) --static --libs libdpdk)\n+\n+CFLAGS += -DALLOW_EXPERIMENTAL_API\n+\n+build/$(APP)-shared: $(SRCS-y) Makefile $(PC_FILE) | build\n+\t$(CC) $(CFLAGS) $(SRCS-y) -o $@ $(LDFLAGS) $(LDFLAGS_SHARED)\n+\n+build/$(APP)-static: $(SRCS-y) Makefile $(PC_FILE) | build\n+\t$(CC) $(CFLAGS) $(SRCS-y) -o $@ $(LDFLAGS) $(LDFLAGS_STATIC)\n+\n+build:\n+\t@mkdir -p $@\n+\n+.PHONY: clean\n+clean:\n+\trm -f build/$(APP) build/$(APP)-static build/$(APP)-shared\n+\ttest -d build && rmdir -p build || true\ndiff --git a/examples/ifpga/commands.c b/examples/ifpga/commands.c\nnew file mode 100644\nindex 000000000..eb2fe1ca6\n--- /dev/null\n+++ b/examples/ifpga/commands.c\n@@ -0,0 +1,1321 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2020-2021 Intel Corporation.\n+ * All rights reserved.\n+ */\n+\n+#include <stdio.h>\n+#include <stdint.h>\n+#include <string.h>\n+#include <stdlib.h>\n+#include <stdarg.h>\n+#include <errno.h>\n+\n+#include <cmdline_rdline.h>\n+#include <cmdline_parse.h>\n+#include <cmdline_parse_num.h>\n+#include <cmdline_parse_string.h>\n+#include <cmdline.h>\n+\n+#include \"commands.h\"\n+\n+static int parse_pciaddr(const char *bdf, opae_pci_device *id)\n+{\n+\tsize_t len = 0;\n+\tunsigned int domain = 0;\n+\tunsigned int bus = 0;\n+\tunsigned int devid = 0;\n+\tunsigned int function = 0;\n+\n+\tif (!bdf || !id)\n+\t\treturn -EINVAL;\n+\n+\tlen = strlen(bdf);\n+\tif ((len < 5) || (len > 12))\n+\t\treturn -EINVAL;\n+\n+\tlen = sscanf(bdf, \"%x:%x:%x.%d\", &domain, &bus, &devid, &function);\n+\tif (len == 4) {\n+\t\tsnprintf(id->bdf, sizeof(id->bdf), \"%04x:%02x:%02x.%d\",\n+\t\t\tdomain, bus, devid, function);\n+\t} else {\n+\t\tlen = sscanf(bdf, \"%x:%x.%d\", &bus, &devid, &function);\n+\t\tif (len == 3) {\n+\t\t\tsnprintf(id->bdf, sizeof(id->bdf), \"%04x:%02x:%02x.%d\",\n+\t\t\t\t0, bus, devid, function);\n+\t\t} else {\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t}\n+\treturn 0;\n+}\n+\n+static void uuid_to_str(opae_uuid *id, uuid_str *str)\n+{\n+\tuint8_t *b = NULL;\n+\tchar *p = NULL;\n+\tint i, j;\n+\n+\tif (!id || !str)\n+\t\treturn;\n+\n+\tb = &id->b[15];\n+\tp = str->s;\n+\tfor (i = 0; i < 4; i++, b--, p += 2)\n+\t\tsprintf(p, \"%02x\", *b);\n+\tsprintf(p++, \"-\");\n+\tfor (i = 0; i < 3; i++) {\n+\t\tfor (j = 0; j < 2; j++, b--, p += 2)\n+\t\t\tsprintf(p, \"%02x\", *b);\n+\t\tsprintf(p++, \"-\");\n+\t}\n+\tfor (i = 0; i < 6; i++, b--, p += 2)\n+\t\tsprintf(p, \"%02x\", *b);\n+}\n+\n+/* *** GET API VERSION *** */\n+struct cmd_version_result {\n+\tcmdline_fixed_string_t cmd;\n+};\n+\n+static void cmd_version_parsed(__rte_unused void *parsed_result,\n+\tstruct cmdline *cl, __rte_unused void *data)\n+{\n+\topae_api_version ver;\n+\topae_get_api_version(&ver);\n+\tcmdline_printf(cl, \"%d.%d.%d\\n\", ver.major, ver.minor, ver.micro);\n+}\n+\n+cmdline_parse_token_string_t cmd_version_cmd =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_version_result, cmd, \"get_api_version\");\n+\n+cmdline_parse_inst_t cmd_get_api_version = {\n+\t.f = cmd_version_parsed,\n+\t.data = NULL,\n+\t.help_str = \"get OPAE API version\",\n+\t.tokens = {\n+\t\t(void *)&cmd_version_cmd,\n+\t\tNULL,\n+\t},\n+};\n+\n+/* *** GET PROC TYPE *** */\n+struct cmd_proc_type_result {\n+\tcmdline_fixed_string_t cmd;\n+};\n+\n+static void cmd_proc_type_parsed(__rte_unused void *parsed_result,\n+\tstruct cmdline *cl, __rte_unused void *data)\n+{\n+\tint type = opae_get_proc_type();\n+\n+\tif (type == 0)\n+\t\tcmdline_printf(cl, \"Primary\\n\");\n+\telse if (type == 1)\n+\t\tcmdline_printf(cl, \"Secondary\\n\");\n+\telse\n+\t\tcmdline_printf(cl, \"Unknown\\n\");\n+}\n+\n+cmdline_parse_token_string_t cmd_proc_type_cmd =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_proc_type_result, cmd, \"get_proc_type\");\n+\n+cmdline_parse_inst_t cmd_get_proc_type = {\n+\t.f = cmd_proc_type_parsed,\n+\t.data = NULL,\n+\t.help_str = \"get DPDK process type\",\n+\t.tokens = {\n+\t\t(void *)&cmd_proc_type_cmd,\n+\t\tNULL,\n+\t},\n+};\n+\n+/* *** GET IMAGE INFO *** */\n+struct cmd_image_info_result {\n+\tcmdline_fixed_string_t cmd;\n+\tcmdline_fixed_string_t path;\n+};\n+\n+static void cmd_image_info_parsed(void *parsed_result,\n+\tstruct cmdline *cl, __rte_unused void *data)\n+{\n+\tstruct cmd_image_info_result *res = parsed_result;\n+\topae_img_info info;\n+\n+\tif (opae_get_image_info(res->path, &info) == 0) {\n+\t\tcmdline_printf(cl, \"%-16s\", \"Type:\");\n+\t\tif (info.type == OPAE_IMG_TYPE_BBS)\n+\t\t\tcmdline_printf(cl, \"FPGA_BBS\\n\");\n+\t\telse if (info.type == OPAE_IMG_TYPE_BMC)\n+\t\t\tcmdline_printf(cl, \"BMC\\n\");\n+\t\telse if (info.type == OPAE_IMG_TYPE_GBS)\n+\t\t\tcmdline_printf(cl, \"FGPA_GBS\\n\");\n+\t\telse\n+\t\t\tcmdline_printf(cl, \"Unknown\\n\");\n+\t\tcmdline_printf(cl, \"%-16s\", \"Action:\");\n+\t\tif (info.subtype == OPAE_IMG_SUBTYPE_UPDATE)\n+\t\t\tcmdline_printf(cl, \"UPDATE\\n\");\n+\t\telse if (info.subtype == OPAE_IMG_SUBTYPE_CANCELLATION)\n+\t\t\tcmdline_printf(cl, \"CANCELLATION\\n\");\n+\t\telse if (info.subtype == OPAE_IMG_SUBTYPE_ROOT_KEY_HASH_256)\n+\t\t\tcmdline_printf(cl, \"ROOT_HASH_256\\n\");\n+\t\telse if (info.subtype == OPAE_IMG_SUBTYPE_ROOT_KEY_HASH_384)\n+\t\t\tcmdline_printf(cl, \"ROOT_HASH_384\\n\");\n+\t\telse\n+\t\t\tcmdline_printf(cl, \"Unknown\\n\");\n+\t\tcmdline_printf(cl, \"%-16s%u\\n\", \"Total length:\",\n+\t\t\tinfo.total_len);\n+\t\tcmdline_printf(cl, \"%-16s%u\\n\", \"Payload offset:\",\n+\t\t\tinfo.payload_offset);\n+\t\tcmdline_printf(cl, \"%-16s%u\\n\", \"Payload length:\",\n+\t\t\tinfo.payload_len);\n+\t} else {\n+\t\tcmdline_printf(cl, \"Invalid image file\\n\");\n+\t}\n+}\n+\n+cmdline_parse_token_string_t cmd_image_info_cmd =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_image_info_result, cmd,\n+\t\t\"get_image_info\");\n+cmdline_parse_token_string_t cmd_image_info_path =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_image_info_result, path, NULL);\n+\n+cmdline_parse_inst_t cmd_get_image_info = {\n+\t.f = cmd_image_info_parsed,\n+\t.data = NULL,\n+\t.help_str = \"get information of image file\",\n+\t.tokens = {\n+\t\t(void *)&cmd_image_info_cmd,\n+\t\t(void *)&cmd_image_info_path,\n+\t\tNULL,\n+\t},\n+};\n+\n+/* *** GET STATUS *** */\n+struct cmd_get_status_result {\n+\tcmdline_fixed_string_t cmd;\n+\tcmdline_fixed_string_t bdf;\n+};\n+\n+static void cmd_get_status_parsed(void *parsed_result,\n+\tstruct cmdline *cl, __rte_unused void *data)\n+{\n+\tstruct cmd_get_status_result *res = parsed_result;\n+\topae_pci_device id;\n+\tuint32_t stat, prog;\n+\n+\tif (parse_pciaddr(res->bdf, &id) < 0) {\n+\t\tcmdline_printf(cl, \"%s is invalid PCI address\\n\", res->bdf);\n+\t\treturn;\n+\t}\n+\n+\tif (opae_load_rsu_status(&id, &stat, &prog) == 0) {\n+\t\tcmdline_printf(cl, \"%-10s\", \"Status:\");\n+\t\tif (stat == 0)\n+\t\t\tcmdline_printf(cl, \"IDLE\\n\");\n+\t\telse if (stat == 1)\n+\t\t\tcmdline_printf(cl, \"PREPARE\\n\");\n+\t\telse if (stat == 2)\n+\t\t\tcmdline_printf(cl, \"PROGRAM\\n\");\n+\t\telse if (stat == 3)\n+\t\t\tcmdline_printf(cl, \"COPY\\n\");\n+\t\telse if (stat == 4)\n+\t\t\tcmdline_printf(cl, \"REBOOT\\n\");\n+\t\telse\n+\t\t\tcmdline_printf(cl, \"unknown\\n\");\n+\t\tcmdline_printf(cl, \"%-10s%u%%\\n\", \"Progress:\", prog);\n+\t} else {\n+\t\tcmdline_printf(cl, \"Failed\\n\");\n+\t}\n+}\n+\n+cmdline_parse_token_string_t cmd_get_status_cmd =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_get_status_result, cmd, \"get_status\");\n+cmdline_parse_token_string_t cmd_get_status_bdf =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_get_status_result, bdf, NULL);\n+\n+cmdline_parse_inst_t cmd_get_status = {\n+\t.f = cmd_get_status_parsed,\n+\t.data = NULL,\n+\t.help_str = \"get current status & progress of FPGA\",\n+\t.tokens = {\n+\t\t(void *)&cmd_get_status_cmd,\n+\t\t(void *)&cmd_get_status_bdf,\n+\t\tNULL,\n+\t},\n+};\n+\n+/* *** GET PROPERTY *** */\n+struct cmd_property_result {\n+\tcmdline_fixed_string_t cmd;\n+\tcmdline_fixed_string_t bdf;\n+\tint32_t type;\n+};\n+\n+static void cmd_property_parsed(void *parsed_result,\n+\tstruct cmdline *cl, __rte_unused void *data)\n+{\n+\tstruct cmd_property_result *res = parsed_result;\n+\topae_pci_device id;\n+\topae_fpga_property prop;\n+\tuuid_str str;\n+\tuint32_t port = 0;\n+\n+\tswitch (res->type) {\n+\tcase 0:\n+\tcase 1:\n+\tcase 2:\n+\tcase 4:\n+\tcase 8:\n+\t\tbreak;\n+\tdefault:\n+\t\tcmdline_printf(cl, \"%d is invalid type of property\\n\",\n+\t\t\tres->type);\n+\t\treturn;\n+\t}\n+\tif (parse_pciaddr(res->bdf, &id) < 0) {\n+\t\tcmdline_printf(cl, \"%s is invalid PCI address\\n\", res->bdf);\n+\t\treturn;\n+\t}\n+\n+\tif (opae_get_property(&id, &prop, res->type) == 0) {\n+\t\tif ((res->type == 0) || (res->type == 1)) {\n+\t\t\tcmdline_printf(cl, \"%s:\\n\", \"PCI\");\n+\t\t\tcmdline_printf(cl, \" %-16s : %s\\n\",\n+\t\t\t\t\"PCIe s:b:d.f\", prop.pci.pci_addr);\n+\t\t\tcmdline_printf(cl, \" %-16s : %s\\n\",\n+\t\t\t\t\"kernel driver\", prop.pci.drv_name);\n+\t\t}\n+\t\tif ((res->type == 0) || (res->type == 2)) {\n+\t\t\tcmdline_printf(cl, \"%s:\\n\", \"FME\");\n+\t\t\tcmdline_printf(cl, \" %-16s : %s\\n\",\n+\t\t\t\t\"platform\", prop.fme.platform_name);\n+\t\t\tcmdline_printf(cl, \" %-16s : %s\\n\",\n+\t\t\t\t\"DCP version\", prop.fme.dcp_version);\n+\t\t\tcmdline_printf(cl, \" %-16s : %s\\n\",\n+\t\t\t\t\"phase\", prop.fme.release_name);\n+\t\t\tcmdline_printf(cl, \" %-16s : %s\\n\",\n+\t\t\t\t\"interface\", prop.fme.interface_type);\n+\t\t\tcmdline_printf(cl, \" %-16s : %s\\n\",\n+\t\t\t\t\"build version\", prop.fme.build_version);\n+\t\t\tcmdline_printf(cl, \" %-16s : %u\\n\",\n+\t\t\t\t\"ports num\", prop.fme.num_ports);\n+\t\t\tcmdline_printf(cl, \" %-16s : %s\\n\",\n+\t\t\t\t\"boot page\", prop.fme.boot_page ? \"user\" : \"factory\");\n+\t\t\tuuid_to_str(&prop.fme.pr_id, &str);\n+\t\t\tcmdline_printf(cl, \" %-16s : %s\\n\", \"pr interface id\",\n+\t\t\t\tstr.s);\n+\t\t}\n+\t\tif ((res->type == 0) || (res->type == 4)) {\n+\t\t\tfor (port = 0; port < prop.fme.num_ports; port++) {\n+\t\t\t\tcmdline_printf(cl, \"%s%d:\\n\", \"PORT\", port);\n+\t\t\t\tcmdline_printf(cl, \" %-16s : %s\\n\",\n+\t\t\t\t\t\"access type\",\n+\t\t\t\t\tprop.port[port].type ? \"VF\" : \"PF\");\n+\t\t\t\tuuid_to_str(&prop.port[port].afu_id, &str);\n+\t\t\t\tcmdline_printf(cl, \" %-16s : %s\\n\",\n+\t\t\t\t\t\"accelerator id\", str.s);\n+\t\t\t}\n+\t\t}\n+\t\tif ((res->type == 0) || (res->type == 8)) {\n+\t\t\tcmdline_printf(cl, \"%s:\\n\", \"BMC\");\n+\t\t\tcmdline_printf(cl, \" %-16s : %s\\n\",\n+\t\t\t\t\"MAX10 version\", prop.bmc.bmc_version);\n+\t\t\tcmdline_printf(cl, \" %-16s : %s\\n\",\n+\t\t\t\t\"NIOS FW version\", prop.bmc.fw_version);\n+\t\t}\n+\t} else {\n+\t\tcmdline_printf(cl, \"Failed\\n\");\n+\t}\n+}\n+\n+cmdline_parse_token_string_t cmd_property_cmd =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_property_result, cmd, \"get_property\");\n+cmdline_parse_token_string_t cmd_property_bdf =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_property_result, bdf, NULL);\n+cmdline_parse_token_num_t cmd_property_type =\n+\tTOKEN_NUM_INITIALIZER(struct cmd_property_result, type, RTE_INT32);\n+\n+cmdline_parse_inst_t cmd_get_property = {\n+\t.f = cmd_property_parsed,\n+\t.data = NULL,\n+\t.help_str = \"get property of FPGA\",\n+\t.tokens = {\n+\t\t(void *)&cmd_property_cmd,\n+\t\t(void *)&cmd_property_bdf,\n+\t\t(void *)&cmd_property_type,\n+\t\tNULL,\n+\t},\n+};\n+\n+/* *** GET PHY INFO *** */\n+struct cmd_phy_info_result {\n+\tcmdline_fixed_string_t cmd;\n+\tcmdline_fixed_string_t bdf;\n+};\n+\n+static void cmd_phy_info_parsed(void *parsed_result,\n+\tstruct cmdline *cl, __rte_unused void *data)\n+{\n+\tstruct cmd_phy_info_result *res = parsed_result;\n+\topae_pci_device id;\n+\topae_phy_info info;\n+\n+\tif (parse_pciaddr(res->bdf, &id) < 0) {\n+\t\tcmdline_printf(cl, \"%s is invalid PCI address\\n\", res->bdf);\n+\t\treturn;\n+\t}\n+\n+\tif (opae_get_phy_info(&id, &info) == 0) {\n+\t\tcmdline_printf(cl, \" %-16s : %u\\n\",\n+\t\t\t\"retimers num\", info.num_retimers);\n+\t\tcmdline_printf(cl, \" %-16s : %uG\\n\",\n+\t\t\t\"link speed\", info.link_speed);\n+\t\tcmdline_printf(cl, \" %-16s : %02x\\n\",\n+\t\t\t\"link status\", info.link_status);\n+\t} else {\n+\t\tcmdline_printf(cl, \"Failed\\n\");\n+\t}\n+}\n+\n+cmdline_parse_token_string_t cmd_phy_info_cmd =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_phy_info_result, cmd, \"get_phy_info\");\n+cmdline_parse_token_string_t cmd_phy_info_bdf =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_phy_info_result, bdf, NULL);\n+\n+cmdline_parse_inst_t cmd_phy_info = {\n+\t.f = cmd_phy_info_parsed,\n+\t.data = NULL,\n+\t.help_str = \"get information of PHY\",\n+\t.tokens = {\n+\t\t(void *)&cmd_phy_info_cmd,\n+\t\t(void *)&cmd_phy_info_bdf,\n+\t\tNULL,\n+\t},\n+};\n+\n+/* *** GET PARENT *** */\n+struct cmd_parent_result {\n+\tcmdline_fixed_string_t cmd;\n+\tcmdline_fixed_string_t bdf;\n+};\n+\n+static void cmd_parent_parsed(void *parsed_result,\n+\tstruct cmdline *cl, __rte_unused void *data)\n+{\n+\tstruct cmd_parent_result *res = parsed_result;\n+\topae_pci_device id;\n+\topae_pci_device parent;\n+\n+\tif (parse_pciaddr(res->bdf, &id) < 0) {\n+\t\tcmdline_printf(cl, \"%s is invalid PCI address\\n\", res->bdf);\n+\t\treturn;\n+\t}\n+\n+\tif (opae_get_parent(&id, &parent) > 0)\n+\t\tcmdline_printf(cl, \"%s\\n\", parent.bdf);\n+\telse\n+\t\tcmdline_printf(cl, \"Failed\\n\");\n+}\n+\n+cmdline_parse_token_string_t cmd_parent_cmd =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_parent_result, cmd, \"get_parent\");\n+cmdline_parse_token_string_t cmd_parent_bdf =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_parent_result, bdf, NULL);\n+\n+cmdline_parse_inst_t cmd_get_parent = {\n+\t.f = cmd_parent_parsed,\n+\t.data = NULL,\n+\t.help_str = \"get parent PCI device of FPGA\",\n+\t.tokens = {\n+\t\t(void *)&cmd_parent_cmd,\n+\t\t(void *)&cmd_parent_bdf,\n+\t\tNULL,\n+\t},\n+};\n+\n+/* *** GET CHILD *** */\n+struct cmd_child_result {\n+\tcmdline_fixed_string_t cmd;\n+\tcmdline_fixed_string_t bdf;\n+};\n+\n+static void cmd_child_parsed(void *parsed_result,\n+\tstruct cmdline *cl, __rte_unused void *data)\n+{\n+\tstruct cmd_child_result *res = parsed_result;\n+\topae_pci_device id;\n+\tpcidev_id child;\n+\tint i, count = 0;\n+\n+\tif (parse_pciaddr(res->bdf, &id) < 0) {\n+\t\tcmdline_printf(cl, \"%s is invalid PCI address\\n\", res->bdf);\n+\t\treturn;\n+\t}\n+\n+\tcount = opae_get_child(&id, NULL, 0);\n+\tif (count > 0) {\n+\t\tchild = (pcidev_id)malloc(sizeof(opae_pci_device) * count);\n+\t\tif (child) {\n+\t\t\topae_get_child(&id, child, count);\n+\t\t\tfor (i = 0; i < count; i++)\n+\t\t\t\tcmdline_printf(cl, \"%s\\n\", child[i].bdf);\n+\t\t\tfree(child);\n+\t\t} else {\n+\t\t\tcmdline_printf(cl, \"No memory\\n\");\n+\t\t}\n+\t} else if (count == 0) {\n+\t\tcmdline_printf(cl, \"No child\\n\");\n+\t} else {\n+\t\tcmdline_printf(cl, \"Failed\\n\");\n+\t}\n+}\n+\n+cmdline_parse_token_string_t cmd_child_cmd =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_child_result, cmd, \"get_child\");\n+cmdline_parse_token_string_t cmd_child_bdf =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_child_result, bdf, NULL);\n+\n+cmdline_parse_inst_t cmd_get_child = {\n+\t.f = cmd_child_parsed,\n+\t.data = NULL,\n+\t.help_str = \"get child PCI device of FPGA\",\n+\t.tokens = {\n+\t\t(void *)&cmd_child_cmd,\n+\t\t(void *)&cmd_child_bdf,\n+\t\tNULL,\n+\t},\n+};\n+\n+/* *** GET PF1 *** */\n+struct cmd_pf1_result {\n+\tcmdline_fixed_string_t cmd;\n+\tcmdline_fixed_string_t bdf;\n+};\n+\n+static void cmd_pf1_parsed(void *parsed_result,\n+\tstruct cmdline *cl, __rte_unused void *data)\n+{\n+\tstruct cmd_pf1_result *res = parsed_result;\n+\topae_pci_device id;\n+\tpcidev_id peer;\n+\tint i, count = 0;\n+\n+\tif (parse_pciaddr(res->bdf, &id) < 0) {\n+\t\tcmdline_printf(cl, \"%s is invalid PCI address\\n\", res->bdf);\n+\t\treturn;\n+\t}\n+\n+\tcount = opae_get_pf1(&id, NULL, 0);\n+\tif (count > 0) {\n+\t\tpeer = (pcidev_id)malloc(sizeof(opae_pci_device) * count);\n+\t\tif (peer) {\n+\t\t\topae_get_pf1(&id, peer, count);\n+\t\t\tfor (i = 0; i < count; i++)\n+\t\t\t\tcmdline_printf(cl, \"%s\\n\", peer[i].bdf);\n+\t\t\tfree(peer);\n+\t\t} else {\n+\t\t\tcmdline_printf(cl, \"No memory\\n\");\n+\t\t}\n+\t} else if (count == 0) {\n+\t\tcmdline_printf(cl, \"No PF1\\n\");\n+\t} else {\n+\t\tcmdline_printf(cl, \"Failed\\n\");\n+\t}\n+}\n+\n+cmdline_parse_token_string_t cmd_pf1_cmd =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_pf1_result, cmd, \"get_pf1\");\n+cmdline_parse_token_string_t cmd_pf1_bdf =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_pf1_result, bdf, NULL);\n+\n+cmdline_parse_inst_t cmd_get_pf1 = {\n+\t.f = cmd_pf1_parsed,\n+\t.data = NULL,\n+\t.help_str = \"get physical function 1 device of FPGA\",\n+\t.tokens = {\n+\t\t(void *)&cmd_pf1_cmd,\n+\t\t(void *)&cmd_pf1_bdf,\n+\t\tNULL,\n+\t},\n+};\n+\n+/* *** SET LOG LEVEL *** */\n+struct cmd_log_level_result {\n+\tcmdline_fixed_string_t cmd;\n+\tint32_t level;\n+};\n+\n+static void cmd_log_level_parsed(void *parsed_result,\n+\tstruct cmdline *cl, __rte_unused void *data)\n+{\n+\tstruct cmd_log_level_result *res = parsed_result;\n+\tif (opae_set_log_level(res->level) == res->level)\n+\t\tcmdline_printf(cl, \"Successful\\n\");\n+\telse\n+\t\tcmdline_printf(cl, \"Failed\\n\");\n+}\n+\n+cmdline_parse_token_string_t cmd_log_level_cmd =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_log_level_result, cmd, \"set_log_level\");\n+cmdline_parse_token_num_t cmd_log_level_level =\n+\tTOKEN_NUM_INITIALIZER(struct cmd_log_level_result, level, RTE_INT32);\n+\n+cmdline_parse_inst_t cmd_set_log_level = {\n+\t.f = cmd_log_level_parsed,\n+\t.data = NULL,\n+\t.help_str = \"set logging level\",\n+\t.tokens = {\n+\t\t(void *)&cmd_log_level_cmd,\n+\t\t(void *)&cmd_log_level_level,\n+\t\tNULL,\n+\t},\n+};\n+\n+/* *** SET LOG FILE *** */\n+struct cmd_log_file_result {\n+\tcmdline_fixed_string_t cmd;\n+\tcmdline_fixed_string_t path;\n+};\n+\n+static void cmd_log_file_parsed(void *parsed_result,\n+\tstruct cmdline *cl, __rte_unused void *data)\n+{\n+\tstruct cmd_log_file_result *res = parsed_result;\n+\tif (opae_set_log_file(res->path, 1) == 0)\n+\t\tcmdline_printf(cl, \"Successful\\n\");\n+\telse\n+\t\tcmdline_printf(cl, \"Failed\\n\");\n+}\n+\n+cmdline_parse_token_string_t cmd_log_file_cmd =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_log_file_result, cmd, \"set_log_file\");\n+cmdline_parse_token_string_t cmd_log_file_path =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_log_file_result, path, NULL);\n+\n+cmdline_parse_inst_t cmd_set_log_file = {\n+\t.f = cmd_log_file_parsed,\n+\t.data = NULL,\n+\t.help_str = \"set logging file\",\n+\t.tokens = {\n+\t\t(void *)&cmd_log_file_cmd,\n+\t\t(void *)&cmd_log_file_path,\n+\t\tNULL,\n+\t},\n+};\n+\n+/* *** SET STATUS *** */\n+struct cmd_set_status_result {\n+\tcmdline_fixed_string_t cmd;\n+\tcmdline_fixed_string_t bdf;\n+\tuint32_t stat;\n+\tuint32_t prog;\n+};\n+\n+static void cmd_set_status_parsed(void *parsed_result,\n+\tstruct cmdline *cl, __rte_unused void *data)\n+{\n+\tstruct cmd_set_status_result *res = parsed_result;\n+\topae_pci_device id;\n+\n+\tif (parse_pciaddr(res->bdf, &id) < 0) {\n+\t\tcmdline_printf(cl, \"%s is invalid PCI address\\n\", res->bdf);\n+\t\treturn;\n+\t}\n+\tif ((res->stat > 4) || (res->prog > 100)) {\n+\t\tcmdline_printf(cl, \"%u,%u is invalid status\\n\", res->stat,\n+\t\t\tres->prog);\n+\t\treturn;\n+\t}\n+\n+\tif (opae_store_rsu_status(&id, res->stat, res->prog) == 0)\n+\t\tcmdline_printf(cl, \"Successful\\n\");\n+\telse\n+\t\tcmdline_printf(cl, \"Failed\\n\");\n+}\n+\n+cmdline_parse_token_string_t cmd_set_status_cmd =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_set_status_result, cmd, \"set_status\");\n+cmdline_parse_token_string_t cmd_set_status_bdf =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_set_status_result, bdf, NULL);\n+cmdline_parse_token_num_t cmd_set_status_stat =\n+\tTOKEN_NUM_INITIALIZER(struct cmd_set_status_result, stat, RTE_UINT32);\n+cmdline_parse_token_num_t cmd_set_status_prog =\n+\tTOKEN_NUM_INITIALIZER(struct cmd_set_status_result, prog, RTE_UINT32);\n+\n+cmdline_parse_inst_t cmd_set_status = {\n+\t.f = cmd_set_status_parsed,\n+\t.data = NULL,\n+\t.help_str = \"set current status & progress of FPGA\",\n+\t.tokens = {\n+\t\t(void *)&cmd_set_status_cmd,\n+\t\t(void *)&cmd_set_status_bdf,\n+\t\t(void *)&cmd_set_status_stat,\n+\t\t(void *)&cmd_set_status_prog,\n+\t\tNULL,\n+\t},\n+};\n+\n+/* *** ENUMERATE *** */\n+struct cmd_enumerate_result {\n+\tcmdline_fixed_string_t cmd;\n+\tuint32_t vid;\n+\tuint32_t did;\n+};\n+\n+static void cmd_enumerate_parsed(void *parsed_result,\n+\tstruct cmdline *cl, __rte_unused void *data)\n+{\n+\tstruct cmd_enumerate_result *res = parsed_result;\n+\topae_pci_id filter;\n+\topae_pci_device *id;\n+\tint i, count = 0;\n+\n+\tfilter.vendor_id = res->vid;\n+\tfilter.device_id = res->did;\n+\tfilter.class_id = BIT_SET_32;\n+\tfilter.subsystem_vendor_id = BIT_SET_16;\n+\tfilter.subsystem_device_id = BIT_SET_16;\n+\n+\tcount = opae_enumerate(&filter, NULL, 0);\n+\tif (count > 0) {\n+\t\tid = (opae_pci_device *)malloc(sizeof(opae_pci_device) * count);\n+\t\tif (id) {\n+\t\t\topae_enumerate(&filter, id, count);\n+\t\t\tfor (i = 0; i < count; i++)\n+\t\t\t\tcmdline_printf(cl, \"%s\\n\", id[i].bdf);\n+\t\t\tfree(id);\n+\t\t} else {\n+\t\t\tcmdline_printf(cl, \"No memory\\n\");\n+\t\t}\n+\t} else if (count == 0) {\n+\t\tcmdline_printf(cl, \"Not found\\n\");\n+\t} else {\n+\t\tcmdline_printf(cl, \"Failed\\n\");\n+\t}\n+}\n+\n+cmdline_parse_token_string_t cmd_enumerate_cmd =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_enumerate_result, cmd, \"enumerate\");\n+cmdline_parse_token_num_t cmd_enumerate_vid =\n+\tTOKEN_NUM_INITIALIZER(struct cmd_enumerate_result, vid, RTE_UINT32);\n+cmdline_parse_token_num_t cmd_enumerate_did =\n+\tTOKEN_NUM_INITIALIZER(struct cmd_enumerate_result, did, RTE_UINT32);\n+\n+cmdline_parse_inst_t cmd_enumerate = {\n+\t.f = cmd_enumerate_parsed,\n+\t.data = NULL,\n+\t.help_str = \"enumerate specified FPGA\",\n+\t.tokens = {\n+\t\t(void *)&cmd_enumerate_cmd,\n+\t\t(void *)&cmd_enumerate_vid,\n+\t\t(void *)&cmd_enumerate_did,\n+\t\tNULL,\n+\t},\n+};\n+\n+/* *** BIND *** */\n+struct cmd_bind_result {\n+\tcmdline_fixed_string_t cmd;\n+\tcmdline_fixed_string_t bdf;\n+\tcmdline_fixed_string_t drv;\n+};\n+\n+static void cmd_bind_parsed(void *parsed_result,\n+\tstruct cmdline *cl, __rte_unused void *data)\n+{\n+\tstruct cmd_bind_result *res = parsed_result;\n+\topae_pci_device id;\n+\n+\tif (parse_pciaddr(res->bdf, &id) < 0) {\n+\t\tcmdline_printf(cl, \"%s is invalid PCI address\\n\", res->bdf);\n+\t\treturn;\n+\t}\n+\n+\tif (opae_bind_driver(&id, res->drv) == 0)\n+\t\tcmdline_printf(cl, \"Successful\\n\");\n+\telse\n+\t\tcmdline_printf(cl, \"Failed\\n\");\n+}\n+\n+cmdline_parse_token_string_t cmd_bind_cmd =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_bind_result, cmd, \"bind\");\n+cmdline_parse_token_string_t cmd_bind_bdf =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_bind_result, bdf, NULL);\n+cmdline_parse_token_string_t cmd_bind_drv =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_bind_result, drv, NULL);\n+\n+cmdline_parse_inst_t cmd_bind = {\n+\t.f = cmd_bind_parsed,\n+\t.data = NULL,\n+\t.help_str = \"bind FPGA with kernel driver\",\n+\t.tokens = {\n+\t\t(void *)&cmd_bind_cmd,\n+\t\t(void *)&cmd_bind_bdf,\n+\t\t(void *)&cmd_bind_drv,\n+\t\tNULL,\n+\t},\n+};\n+\n+/* *** UNBIND *** */\n+struct cmd_unbind_result {\n+\tcmdline_fixed_string_t cmd;\n+\tcmdline_fixed_string_t bdf;\n+};\n+\n+static void cmd_unbind_parsed(void *parsed_result,\n+\tstruct cmdline *cl, __rte_unused void *data)\n+{\n+\tstruct cmd_unbind_result *res = parsed_result;\n+\topae_pci_device id;\n+\n+\tif (parse_pciaddr(res->bdf, &id) < 0) {\n+\t\tcmdline_printf(cl, \"%s is invalid PCI address\\n\", res->bdf);\n+\t\treturn;\n+\t}\n+\n+\tif (opae_unbind_driver(&id) == 0)\n+\t\tcmdline_printf(cl, \"Successful\\n\");\n+\telse\n+\t\tcmdline_printf(cl, \"Failed\\n\");\n+}\n+\n+cmdline_parse_token_string_t cmd_unbind_cmd =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_bind_result, cmd, \"unbind\");\n+cmdline_parse_token_string_t cmd_unbind_bdf =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_bind_result, bdf, NULL);\n+\n+cmdline_parse_inst_t cmd_unbind = {\n+\t.f = cmd_unbind_parsed,\n+\t.data = NULL,\n+\t.help_str = \"unbind FPGA from kernel driver\",\n+\t.tokens = {\n+\t\t(void *)&cmd_unbind_cmd,\n+\t\t(void *)&cmd_unbind_bdf,\n+\t\tNULL,\n+\t},\n+};\n+\n+/* *** PROBE *** */\n+struct cmd_probe_result {\n+\tcmdline_fixed_string_t cmd;\n+\tcmdline_fixed_string_t bdf;\n+};\n+\n+static void cmd_probe_parsed(void *parsed_result,\n+\tstruct cmdline *cl, __rte_unused void *data)\n+{\n+\tstruct cmd_probe_result *res = parsed_result;\n+\topae_pci_device id;\n+\n+\tif (parse_pciaddr(res->bdf, &id) < 0) {\n+\t\tcmdline_printf(cl, \"%s is invalid PCI address\\n\", res->bdf);\n+\t\treturn;\n+\t}\n+\n+\tif (opae_probe_device(&id) == 0)\n+\t\tcmdline_printf(cl, \"Successful\\n\");\n+\telse\n+\t\tcmdline_printf(cl, \"Failed\\n\");\n+}\n+\n+cmdline_parse_token_string_t cmd_probe_cmd =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_probe_result, cmd, \"probe\");\n+cmdline_parse_token_string_t cmd_probe_bdf =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_probe_result, bdf, NULL);\n+\n+cmdline_parse_inst_t cmd_probe = {\n+\t.f = cmd_probe_parsed,\n+\t.data = NULL,\n+\t.help_str = \"probe FPGA with IFPGA driver\",\n+\t.tokens = {\n+\t\t(void *)&cmd_probe_cmd,\n+\t\t(void *)&cmd_probe_bdf,\n+\t\tNULL,\n+\t},\n+};\n+\n+/* *** REMOVE *** */\n+struct cmd_remove_result {\n+\tcmdline_fixed_string_t cmd;\n+\tcmdline_fixed_string_t bdf;\n+};\n+\n+static void cmd_remove_parsed(void *parsed_result,\n+\tstruct cmdline *cl, __rte_unused void *data)\n+{\n+\tstruct cmd_remove_result *res = parsed_result;\n+\topae_pci_device id;\n+\n+\tif (parse_pciaddr(res->bdf, &id) < 0) {\n+\t\tcmdline_printf(cl, \"%s is invalid PCI address\\n\", res->bdf);\n+\t\treturn;\n+\t}\n+\n+\tif (opae_remove_device(&id) == 0)\n+\t\tcmdline_printf(cl, \"Successful\\n\");\n+\telse\n+\t\tcmdline_printf(cl, \"Failed\\n\");\n+}\n+\n+cmdline_parse_token_string_t cmd_remove_cmd =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_remove_result, cmd, \"remove\");\n+cmdline_parse_token_string_t cmd_remove_bdf =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_remove_result, bdf, NULL);\n+\n+cmdline_parse_inst_t cmd_remove = {\n+\t.f = cmd_remove_parsed,\n+\t.data = NULL,\n+\t.help_str = \"remove FPGA from IFPGA driver\",\n+\t.tokens = {\n+\t\t(void *)&cmd_remove_cmd,\n+\t\t(void *)&cmd_remove_bdf,\n+\t\tNULL,\n+\t},\n+};\n+\n+/* *** FLASH *** */\n+struct cmd_flash_result {\n+\tcmdline_fixed_string_t cmd;\n+\tcmdline_fixed_string_t bdf;\n+\tcmdline_fixed_string_t path;\n+};\n+\n+static void cmd_flash_parsed(void *parsed_result,\n+\tstruct cmdline *cl, __rte_unused void *data)\n+{\n+\tstruct cmd_flash_result *res = parsed_result;\n+\topae_pci_device id;\n+\tuint64_t stat = 0;\n+\n+\tif (parse_pciaddr(res->bdf, &id) < 0) {\n+\t\tcmdline_printf(cl, \"%s is invalid PCI address\\n\", res->bdf);\n+\t\treturn;\n+\t}\n+\n+\tif (opae_update_flash(&id, res->path, &stat))\n+\t\tcmdline_printf(cl, \"Error: 0x%lx\\n\", stat);\n+}\n+\n+cmdline_parse_token_string_t cmd_flash_cmd =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_flash_result, cmd, \"flash\");\n+cmdline_parse_token_string_t cmd_flash_bdf =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_flash_result, bdf, NULL);\n+cmdline_parse_token_string_t cmd_flash_path =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_flash_result, path, NULL);\n+\n+cmdline_parse_inst_t cmd_flash = {\n+\t.f = cmd_flash_parsed,\n+\t.data = NULL,\n+\t.help_str = \"update flash of FPGA\",\n+\t.tokens = {\n+\t\t(void *)&cmd_flash_cmd,\n+\t\t(void *)&cmd_flash_bdf,\n+\t\t(void *)&cmd_flash_path,\n+\t\tNULL,\n+\t},\n+};\n+\n+/* *** PR *** */\n+struct cmd_pr_result {\n+\tcmdline_fixed_string_t cmd;\n+\tcmdline_fixed_string_t bdf;\n+\tint32_t port;\n+\tcmdline_fixed_string_t path;\n+};\n+\n+static void cmd_pr_parsed(void *parsed_result,\n+\tstruct cmdline *cl, __rte_unused void *data)\n+{\n+\tstruct cmd_pr_result *res = parsed_result;\n+\topae_pci_device id;\n+\n+\tif (parse_pciaddr(res->bdf, &id) < 0) {\n+\t\tcmdline_printf(cl, \"%s is invalid PCI address\\n\", res->bdf);\n+\t\treturn;\n+\t}\n+\n+\tif (opae_partial_reconfigure(&id, res->port, res->path) == 0)\n+\t\tcmdline_printf(cl, \"Successful\\n\");\n+\telse\n+\t\tcmdline_printf(cl, \"Failed\\n\");\n+}\n+\n+cmdline_parse_token_string_t cmd_pr_cmd =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_pr_result, cmd, \"pr\");\n+cmdline_parse_token_string_t cmd_pr_bdf =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_pr_result, bdf, NULL);\n+cmdline_parse_token_num_t cmd_pr_port =\n+\tTOKEN_NUM_INITIALIZER(struct cmd_pr_result, port, RTE_INT32);\n+cmdline_parse_token_string_t cmd_pr_path =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_pr_result, path, NULL);\n+\n+cmdline_parse_inst_t cmd_pr = {\n+\t.f = cmd_pr_parsed,\n+\t.data = NULL,\n+\t.help_str = \"partial reconfigure FPGA\",\n+\t.tokens = {\n+\t\t(void *)&cmd_pr_cmd,\n+\t\t(void *)&cmd_pr_bdf,\n+\t\t(void *)&cmd_pr_port,\n+\t\t(void *)&cmd_pr_path,\n+\t\tNULL,\n+\t},\n+};\n+\n+/* *** REBOOT *** */\n+struct cmd_reboot_result {\n+\tcmdline_fixed_string_t cmd;\n+\tcmdline_fixed_string_t bdf;\n+\tcmdline_fixed_string_t type;\n+\tint32_t page;\n+};\n+\n+static void cmd_reboot_parsed(void *parsed_result,\n+\tstruct cmdline *cl, __rte_unused void *data)\n+{\n+\tstruct cmd_reboot_result *res = parsed_result;\n+\topae_pci_device id;\n+\tint type = 0;\n+\n+\tif (parse_pciaddr(res->bdf, &id) < 0) {\n+\t\tcmdline_printf(cl, \"%s is invalid PCI address\\n\", res->bdf);\n+\t\treturn;\n+\t}\n+\n+\tif (!strcmp(res->type, \"fpga\")) {\n+\t\ttype = 0;\n+\t} else if (!strcmp(res->type, \"bmc\")) {\n+\t\ttype = 1;\n+\t} else {\n+\t\tcmdline_printf(cl, \"%s is invalid reboot type\\n\", res->type);\n+\t\treturn;\n+\t}\n+\n+\tif (opae_reboot_device(&id, type, res->page) == 0)\n+\t\tcmdline_printf(cl, \"Successful\\n\");\n+\telse\n+\t\tcmdline_printf(cl, \"Failed\\n\");\n+}\n+\n+cmdline_parse_token_string_t cmd_reboot_cmd =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_reboot_result, cmd, \"reboot\");\n+cmdline_parse_token_string_t cmd_reboot_bdf =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_reboot_result, bdf, NULL);\n+cmdline_parse_token_string_t cmd_reboot_type =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_reboot_result, type, NULL);\n+cmdline_parse_token_num_t cmd_reboot_page =\n+\tTOKEN_NUM_INITIALIZER(struct cmd_reboot_result, page, RTE_INT32);\n+\n+cmdline_parse_inst_t cmd_reboot = {\n+\t.f = cmd_reboot_parsed,\n+\t.data = NULL,\n+\t.help_str = \"reboot FPGA or MAX10\",\n+\t.tokens = {\n+\t\t(void *)&cmd_reboot_cmd,\n+\t\t(void *)&cmd_reboot_bdf,\n+\t\t(void *)&cmd_reboot_type,\n+\t\t(void *)&cmd_reboot_page,\n+\t\tNULL,\n+\t},\n+};\n+\n+/* *** CANCEL *** */\n+struct cmd_cancel_result {\n+\tcmdline_fixed_string_t cmd;\n+\tcmdline_fixed_string_t bdf;\n+};\n+\n+static void cmd_cancel_parsed(void *parsed_result,\n+\tstruct cmdline *cl, __rte_unused void *data)\n+{\n+\tstruct cmd_cancel_result *res = parsed_result;\n+\topae_pci_device id;\n+\n+\tif (parse_pciaddr(res->bdf, &id) < 0) {\n+\t\tcmdline_printf(cl, \"%s is invalid PCI address\\n\", res->bdf);\n+\t\treturn;\n+\t}\n+\n+\tif (opae_cancel_flash_update(&id, 0) == 0)\n+\t\tcmdline_printf(cl, \"Successful\\n\");\n+\telse\n+\t\tcmdline_printf(cl, \"Failed\\n\");\n+}\n+\n+cmdline_parse_token_string_t cmd_cancel_cmd =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_cancel_result, cmd, \"cancel\");\n+cmdline_parse_token_string_t cmd_cancel_bdf =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_cancel_result, bdf, NULL);\n+\n+cmdline_parse_inst_t cmd_cancel = {\n+\t.f = cmd_cancel_parsed,\n+\t.data = NULL,\n+\t.help_str = \"cancel flash update\",\n+\t.tokens = {\n+\t\t(void *)&cmd_cancel_cmd,\n+\t\t(void *)&cmd_cancel_bdf,\n+\t\tNULL,\n+\t},\n+};\n+\n+/* *** CHECK *** */\n+struct cmd_check_result {\n+\tcmdline_fixed_string_t cmd;\n+};\n+\n+static void cmd_check_parsed(__rte_unused void *parsed_result,\n+\t__rte_unused struct cmdline *cl, __rte_unused void *data)\n+{\n+\topae_check_pcidev_list();\n+}\n+\n+cmdline_parse_token_string_t cmd_check_cmd =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_check_result, cmd, \"check\");\n+\n+cmdline_parse_inst_t cmd_check = {\n+\t.f = cmd_check_parsed,\n+\t.data = NULL,\n+\t.help_str = \"display list of PCI devices\",\n+\t.tokens = {\n+\t\t(void *)&cmd_check_cmd,\n+\t\tNULL,\n+\t},\n+};\n+\n+/* *** PCI READ *** */\n+struct cmd_pci_read_result {\n+\tcmdline_fixed_string_t cmd;\n+\tcmdline_fixed_string_t bdf;\n+\tuint32_t offset;\n+};\n+\n+static void cmd_pci_read_parsed(void *parsed_result,\n+\tstruct cmdline *cl, __rte_unused void *data)\n+{\n+\tstruct cmd_pci_read_result *res = parsed_result;\n+\topae_pci_device id;\n+\tuint32_t offset = 0;\n+\tuint32_t value = 0;\n+\n+\tif (parse_pciaddr(res->bdf, &id) < 0) {\n+\t\tcmdline_printf(cl, \"%s is invalid PCI address\\n\", res->bdf);\n+\t\treturn;\n+\t}\n+\n+\tif (res->offset & 0x3) {\n+\t\toffset = res->offset & ~3;\n+\t\tcmdline_printf(cl, \"align offset to 0x%x\\n\", offset);\n+\t} else {\n+\t\toffset = res->offset;\n+\t}\n+\n+\tif (opae_read_pci_cfg(&id, offset, &value) == 0)\n+\t\tcmdline_printf(cl, \"0x%08x\\n\", value);\n+\telse\n+\t\tcmdline_printf(cl, \"Failed\\n\");\n+}\n+\n+cmdline_parse_token_string_t cmd_pci_read_cmd =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_pci_read_result, cmd, \"pci_read\");\n+cmdline_parse_token_string_t cmd_pci_read_bdf =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_pci_read_result, bdf, NULL);\n+cmdline_parse_token_num_t cmd_pci_read_offset =\n+\tTOKEN_NUM_INITIALIZER(struct cmd_pci_read_result, offset, RTE_UINT32);\n+\n+cmdline_parse_inst_t cmd_pci_read = {\n+\t.f = cmd_pci_read_parsed,\n+\t.data = NULL,\n+\t.help_str = \"read PCI configuration space\",\n+\t.tokens = {\n+\t\t(void *)&cmd_pci_read_cmd,\n+\t\t(void *)&cmd_pci_read_bdf,\n+\t\t(void *)&cmd_pci_read_offset,\n+\t\tNULL,\n+\t},\n+};\n+\n+/* *** PCI WRITE *** */\n+struct cmd_pci_write_result {\n+\tcmdline_fixed_string_t cmd;\n+\tcmdline_fixed_string_t bdf;\n+\tuint32_t offset;\n+\tuint32_t value;\n+};\n+\n+static void cmd_pci_write_parsed(void *parsed_result,\n+\tstruct cmdline *cl, __rte_unused void *data)\n+{\n+\tstruct cmd_pci_write_result *res = parsed_result;\n+\topae_pci_device id;\n+\tuint32_t offset = 0;\n+\n+\tif (parse_pciaddr(res->bdf, &id) < 0) {\n+\t\tcmdline_printf(cl, \"%s is invalid PCI address\\n\", res->bdf);\n+\t\treturn;\n+\t}\n+\n+\tif (res->offset & 0x3) {\n+\t\toffset = res->offset & ~3;\n+\t\tcmdline_printf(cl, \"align offset to 0x%x\\n\", offset);\n+\t} else {\n+\t\toffset = res->offset;\n+\t}\n+\n+\tif (opae_write_pci_cfg(&id, offset, res->value) == 0)\n+\t\tcmdline_printf(cl, \"Successful\\n\");\n+\telse\n+\t\tcmdline_printf(cl, \"Failed\\n\");\n+}\n+\n+cmdline_parse_token_string_t cmd_pci_write_cmd =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_pci_write_result, cmd, \"pci_write\");\n+cmdline_parse_token_string_t cmd_pci_write_bdf =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_pci_write_result, bdf, NULL);\n+cmdline_parse_token_num_t cmd_pci_write_offset =\n+\tTOKEN_NUM_INITIALIZER(struct cmd_pci_write_result, offset, RTE_UINT32);\n+cmdline_parse_token_num_t cmd_pci_write_value =\n+\tTOKEN_NUM_INITIALIZER(struct cmd_pci_write_result, value, RTE_UINT32);\n+\n+cmdline_parse_inst_t cmd_pci_write = {\n+\t.f = cmd_pci_write_parsed,\n+\t.data = NULL,\n+\t.help_str = \"write PCI configuration space\",\n+\t.tokens = {\n+\t\t(void *)&cmd_pci_write_cmd,\n+\t\t(void *)&cmd_pci_write_bdf,\n+\t\t(void *)&cmd_pci_write_offset,\n+\t\t(void *)&cmd_pci_write_value,\n+\t\tNULL,\n+\t},\n+};\n+\n+/* *** QUIT *** */\n+struct cmd_quit_result {\n+\tcmdline_fixed_string_t quit;\n+};\n+\n+static void cmd_quit_parsed(__rte_unused void *parsed_result,\n+\tstruct cmdline *cl, __rte_unused void *data)\n+{\n+\tcmdline_quit(cl);\n+}\n+\n+cmdline_parse_token_string_t cmd_quit_quit =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_quit_result, quit, \"quit\");\n+\n+cmdline_parse_inst_t cmd_quit = {\n+\t.f = cmd_quit_parsed,\n+\t.data = NULL,\n+\t.help_str = \"exit DPDK application\",\n+\t.tokens = {\n+\t\t(void *)&cmd_quit_quit,\n+\t\tNULL,\n+\t},\n+};\n+\n+/* *** HELP *** */\n+struct cmd_help_result {\n+\tcmdline_fixed_string_t help;\n+};\n+\n+static void cmd_help_parsed(__rte_unused void *parsed_result,\n+\tstruct cmdline *cl, __rte_unused void *data)\n+{\n+\tcmdline_printf(cl,\n+\t\t\" get_api_version               \\t\\t\"\n+\t\t\t\"get OPAE API version\\n\"\n+\t\t\" get_proc_type                 \\t\\t\"\n+\t\t\t\"get DPDK process type\\n\"\n+\t\t\" get_image_info <FILE>         \\t\\t\"\n+\t\t\t\"get information of image file\\n\"\n+\t\t\" get_status <BDF>              \\t\\t\"\n+\t\t\t\"get current status & progress of FPGA\\n\"\n+\t\t\" get_property <BDF> <0|1|2|4|8>\\t\\t\"\n+\t\t\t\"get property of FPGA\\n\"\n+\t\t\" get_phy_info <BDF>            \\t\\t\"\n+\t\t\t\"get information of PHY\\n\"\n+\t\t\" get_parent <BDF>              \\t\\t\"\n+\t\t\t\"get parent PCI device of FPGA\\n\"\n+\t\t\" get_child <BDF>               \\t\\t\"\n+\t\t\t\"get child PCI device of FPGA\\n\"\n+\t\t\" get_pf1 <BDF>                 \\t\\t\"\n+\t\t\t\"get physical function 1 device of FPGA\\n\"\n+\t\t\" set_log_level <0-4>           \\t\\t\"\n+\t\t\t\"set logging level\\n\"\n+\t\t\" set_log_file <FILE>           \\t\\t\"\n+\t\t\t\"set logging file\\n\"\n+\t\t\" set_status <BDF> <0-4> <0-100>\\t\\t\"\n+\t\t\t\"set current status & progress of FPGA\\n\"\n+\t\t\" enumerate <VID> <DID>         \\t\\t\"\n+\t\t\t\"enumerate specified FPGA\\n\"\n+\t\t\" bind <BDF> <DRIVER>           \\t\\t\"\n+\t\t\t\"bind FPGA with kernel driver\\n\"\n+\t\t\" unbind <BDF>                  \\t\\t\"\n+\t\t\t\"unbind FPGA from kernel driver\\n\"\n+\t\t\" probe <BDF>                   \\t\\t\"\n+\t\t\t\"probe FPGA with IFPGA driver\\n\"\n+\t\t\" remove <BDF>                  \\t\\t\"\n+\t\t\t\"remove FPGA from IFPGA driver\\n\"\n+\t\t\" flash <BDF> <FILE>            \\t\\t\"\n+\t\t\t\"update flash of FPGA\\n\"\n+\t\t\" pr <BDF> <PORT> <FILE>        \\t\\t\"\n+\t\t\t\"partial reconfigure FPGA\\n\"\n+\t\t\" reboot <BDF> <fpga|bmc> <0-1> \\t\\t\"\n+\t\t\t\"reboot FPGA or MAX10\\n\"\n+\t\t\" cancel <BDF>                  \\t\\t\"\n+\t\t\t\"cancel flash update\\n\"\n+\t\t\" check                         \\t\\t\"\n+\t\t\t\"display list of PCI devices\\n\"\n+\t\t\" pci_read <BDF> <0-1024>       \\t\\t\"\n+\t\t\t\"read PCI configuration space\\n\"\n+\t\t\" pci_write <BDF> <0-1024> <NUM>\\t\\t\"\n+\t\t\t\"write PCI configuration space\\n\"\n+\t\t\" quit                          \\t\\t\"\n+\t\t\t\"exit DPDK application\\n\"\n+\t\t\" help                          \\t\\t\"\n+\t\t\t\"show commands list\\n\");\n+}\n+\n+cmdline_parse_token_string_t cmd_help_help =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_help_result, help, \"help\");\n+\n+cmdline_parse_inst_t cmd_help = {\n+\t.f = cmd_help_parsed,\n+\t.data = NULL,\n+\t.help_str = \"show commands list\",\n+\t.tokens = {\n+\t\t(void *)&cmd_help_help,\n+\t\tNULL,\n+\t},\n+};\n+\n+/****** CONTEXT (list of commands) */\n+cmdline_parse_ctx_t main_ctx[] = {\n+\t(cmdline_parse_inst_t *)&cmd_get_image_info,\n+\t(cmdline_parse_inst_t *)&cmd_get_api_version,\n+\t(cmdline_parse_inst_t *)&cmd_get_proc_type,\n+\t(cmdline_parse_inst_t *)&cmd_get_status,\n+\t(cmdline_parse_inst_t *)&cmd_get_property,\n+\t(cmdline_parse_inst_t *)&cmd_phy_info,\n+\t(cmdline_parse_inst_t *)&cmd_get_parent,\n+\t(cmdline_parse_inst_t *)&cmd_get_child,\n+\t(cmdline_parse_inst_t *)&cmd_get_pf1,\n+\t(cmdline_parse_inst_t *)&cmd_set_log_level,\n+\t(cmdline_parse_inst_t *)&cmd_set_log_file,\n+\t(cmdline_parse_inst_t *)&cmd_set_status,\n+\t(cmdline_parse_inst_t *)&cmd_enumerate,\n+\t(cmdline_parse_inst_t *)&cmd_bind,\n+\t(cmdline_parse_inst_t *)&cmd_unbind,\n+\t(cmdline_parse_inst_t *)&cmd_probe,\n+\t(cmdline_parse_inst_t *)&cmd_remove,\n+\t(cmdline_parse_inst_t *)&cmd_flash,\n+\t(cmdline_parse_inst_t *)&cmd_pr,\n+\t(cmdline_parse_inst_t *)&cmd_reboot,\n+\t(cmdline_parse_inst_t *)&cmd_cancel,\n+\t(cmdline_parse_inst_t *)&cmd_check,\n+\t(cmdline_parse_inst_t *)&cmd_pci_read,\n+\t(cmdline_parse_inst_t *)&cmd_pci_write,\n+\t(cmdline_parse_inst_t *)&cmd_quit,\n+\t(cmdline_parse_inst_t *)&cmd_help,\n+\tNULL,\n+};\ndiff --git a/examples/ifpga/commands.h b/examples/ifpga/commands.h\nnew file mode 100644\nindex 000000000..76c4c5025\n--- /dev/null\n+++ b/examples/ifpga/commands.h\n@@ -0,0 +1,16 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2020-2021 Intel Corporation\n+ */\n+\n+#ifndef _COMMANDS_H_\n+#define _COMMANDS_H_\n+\n+#include \"ifpga_opae_api.h\"\n+\n+extern cmdline_parse_ctx_t main_ctx[];\n+\n+typedef struct {\n+\tchar s[38];\n+} uuid_str;\n+\n+#endif /* _COMMANDS_H_ */\ndiff --git a/examples/ifpga/main.c b/examples/ifpga/main.c\nnew file mode 100644\nindex 000000000..e9380d581\n--- /dev/null\n+++ b/examples/ifpga/main.c\n@@ -0,0 +1,38 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2020-2021 Intel Corporation\n+ */\n+\n+#include <stdio.h>\n+#include <string.h>\n+#include <stdint.h>\n+#include <errno.h>\n+#include <sys/queue.h>\n+\n+#include <cmdline_rdline.h>\n+#include <cmdline_parse.h>\n+#include <cmdline_socket.h>\n+#include <cmdline.h>\n+\n+#include <rte_memory.h>\n+#include <rte_eal.h>\n+#include <rte_debug.h>\n+\n+#include \"commands.h\"\n+\n+\n+int main(int argc, char **argv)\n+{\n+\tstruct cmdline *cl;\n+\tint ret;\n+\n+\tret = opae_init_eal(argc, argv);\n+\tif (ret < 0)\n+\t\trte_panic(\"Cannot init EAL\\n\");\n+\tcl = cmdline_stdin_new(main_ctx, \"opae> \");\n+\tif (cl == NULL)\n+\t\trte_panic(\"Cannot create cmdline instance\\n\");\n+\tcmdline_interact(cl);\n+\topae_cleanup_eal();\n+\tcmdline_stdin_exit(cl);\n+\treturn 0;\n+}\ndiff --git a/examples/ifpga/meson.build b/examples/ifpga/meson.build\nnew file mode 100644\nindex 000000000..9077a7bb2\n--- /dev/null\n+++ b/examples/ifpga/meson.build\n@@ -0,0 +1,19 @@\n+# SPDX-License-Identifier: BSD-3-Clause\n+# Copyright(c) 2020-2021 Intel Corporation\n+\n+# meson file, for building this example as part of a main DPDK build.\n+#\n+# To build this example as a standalone application with an already-installed\n+# DPDK instance, use 'make'\n+\n+# require the raw_ifpga library\n+build = dpdk_conf.has('RTE_RAW_IFPGA')\n+if not build\n+\tsubdir_done()\n+endif\n+\n+deps += 'raw_ifpga'\n+allow_experimental_apis = true\n+sources = files(\n+\t'main.c', 'commands.c'\n+)\n",
    "prefixes": [
        "v9",
        "4/4"
    ]
}