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GET /api/patches/89003/?format=api
{ "id": 89003, "url": "http://patchwork.dpdk.org/api/patches/89003/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210312093143.28186-8-ivan.malov@oktetlabs.ru/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210312093143.28186-8-ivan.malov@oktetlabs.ru>", "list_archive_url": "https://inbox.dpdk.org/dev/20210312093143.28186-8-ivan.malov@oktetlabs.ru", "date": "2021-03-12T09:31:41", "name": "[08/10] net/sfc: support action VXLAN ENCAP in MAE backend", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "6e7d5c2c0dbcc007f66e2d1e185ae0f066568117", "submitter": { "id": 869, "url": "http://patchwork.dpdk.org/api/people/869/?format=api", "name": "Ivan Malov", "email": "Ivan.Malov@oktetlabs.ru" }, "delegate": null, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210312093143.28186-8-ivan.malov@oktetlabs.ru/mbox/", "series": [ { "id": 15630, "url": "http://patchwork.dpdk.org/api/series/15630/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=15630", "date": "2021-03-12T09:31:34", "name": "[01/10] ethdev: reuse header definition in flow pattern item ETH", "version": 1, "mbox": "http://patchwork.dpdk.org/series/15630/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/89003/comments/", "check": "warning", "checks": "http://patchwork.dpdk.org/api/patches/89003/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 41AD3A0547;\n\tFri, 12 Mar 2021 10:32:38 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 0EC85160888;\n\tFri, 12 Mar 2021 10:31:59 +0100 (CET)", "from shelob.oktetlabs.ru (shelob.oktetlabs.ru [91.220.146.113])\n by mails.dpdk.org (Postfix) with ESMTP id DECD61607EE\n for <dev@dpdk.org>; Fri, 12 Mar 2021 10:31:50 +0100 (CET)", "from localhost.localdomain (unknown [188.242.7.54])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest\n SHA256)\n (No client certificate requested)\n by shelob.oktetlabs.ru (Postfix) with ESMTPSA id 9EB977F5B3;\n Fri, 12 Mar 2021 12:31:50 +0300 (MSK)" ], "DKIM-Filter": "OpenDKIM Filter v2.11.0 shelob.oktetlabs.ru 9EB977F5B3", "DKIM-Signature": "v=1; a=rsa-sha256; c=simple/simple; d=oktetlabs.ru;\n s=default; t=1615541510;\n bh=d9cRU0SCoMmkl39ZgqegvRhmWGEBBcKIwSixO53C/3c=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References;\n b=laELoId+L+m3fuVuVlv1LicYU6ir6fbYBcbl8LgWDTDLbMDexU+XtGK7hy9tW1wNk\n nd6Zod9BycqTmqbjYIXNEZcHJxgwCiADd0NP86a2VvGl2WX7ELQ6FTMqIb4lBa99UN\n d2gmsAdX5cQxFCppgGPipbnd4gReC3OtG57EpIUo=", "From": "Ivan Malov <ivan.malov@oktetlabs.ru>", "To": "dev@dpdk.org", "Cc": "Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>,\n Andy Moreton <amoreton@xilinx.com>", "Date": "Fri, 12 Mar 2021 12:31:41 +0300", "Message-Id": "<20210312093143.28186-8-ivan.malov@oktetlabs.ru>", "X-Mailer": "git-send-email 2.20.1", "In-Reply-To": "<20210312093143.28186-1-ivan.malov@oktetlabs.ru>", "References": "<20210312093143.28186-1-ivan.malov@oktetlabs.ru>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH 08/10] net/sfc: support action VXLAN ENCAP in MAE\n backend", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Provide necessary facilities for handling this action.\n\nSigned-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>\nReviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>\nReviewed-by: Andy Moreton <amoreton@xilinx.com>\n---\n drivers/net/sfc/sfc_mae.c | 550 +++++++++++++++++++++++++++++++++++++-\n drivers/net/sfc/sfc_mae.h | 29 ++\n 2 files changed, 572 insertions(+), 7 deletions(-)", "diff": "diff --git a/drivers/net/sfc/sfc_mae.c b/drivers/net/sfc/sfc_mae.c\nindex 50efd47ad..79a1bd91d 100644\n--- a/drivers/net/sfc/sfc_mae.c\n+++ b/drivers/net/sfc/sfc_mae.c\n@@ -9,7 +9,9 @@\n \n #include <stdbool.h>\n \n+#include <rte_bitops.h>\n #include <rte_common.h>\n+#include <rte_vxlan.h>\n \n #include \"efx.h\"\n \n@@ -35,6 +37,7 @@ sfc_mae_attach(struct sfc_adapter *sa)\n \tconst efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);\n \tefx_mport_sel_t entity_mport;\n \tstruct sfc_mae *mae = &sa->mae;\n+\tstruct sfc_mae_bounce_eh *bounce_eh = &mae->bounce_eh;\n \tefx_mae_limits_t limits;\n \tint rc;\n \n@@ -80,17 +83,26 @@ sfc_mae_attach(struct sfc_adapter *sa)\n \tif (rc != 0)\n \t\tgoto fail_mae_assign_switch_port;\n \n+\tsfc_log_init(sa, \"allocate encap. header bounce buffer\");\n+\tbounce_eh->buf_size = limits.eml_encap_header_size_limit;\n+\tbounce_eh->buf = rte_malloc(\"sfc_mae_bounce_eh\",\n+\t\t\t\t bounce_eh->buf_size, 0);\n+\tif (bounce_eh->buf == NULL)\n+\t\tgoto fail_mae_alloc_bounce_eh;\n+\n \tmae->status = SFC_MAE_STATUS_SUPPORTED;\n \tmae->nb_outer_rule_prios_max = limits.eml_max_n_outer_prios;\n \tmae->nb_action_rule_prios_max = limits.eml_max_n_action_prios;\n \tmae->encap_types_supported = limits.eml_encap_types_supported;\n \tTAILQ_INIT(&mae->outer_rules);\n+\tTAILQ_INIT(&mae->encap_headers);\n \tTAILQ_INIT(&mae->action_sets);\n \n \tsfc_log_init(sa, \"done\");\n \n \treturn 0;\n \n+fail_mae_alloc_bounce_eh:\n fail_mae_assign_switch_port:\n fail_mae_assign_switch_domain:\n fail_mae_assign_entity_mport:\n@@ -117,6 +129,8 @@ sfc_mae_detach(struct sfc_adapter *sa)\n \tif (status_prev != SFC_MAE_STATUS_SUPPORTED)\n \t\treturn;\n \n+\trte_free(mae->bounce_eh.buf);\n+\n \tefx_mae_fini(sa->nic);\n \n \tsfc_log_init(sa, \"done\");\n@@ -254,8 +268,165 @@ sfc_mae_outer_rule_disable(struct sfc_adapter *sa,\n \treturn 0;\n }\n \n+static struct sfc_mae_encap_header *\n+sfc_mae_encap_header_attach(struct sfc_adapter *sa,\n+\t\t\t const struct sfc_mae_bounce_eh *bounce_eh)\n+{\n+\tstruct sfc_mae_encap_header *encap_header;\n+\tstruct sfc_mae *mae = &sa->mae;\n+\n+\tSFC_ASSERT(sfc_adapter_is_locked(sa));\n+\n+\tTAILQ_FOREACH(encap_header, &mae->encap_headers, entries) {\n+\t\tif (encap_header->size == bounce_eh->size &&\n+\t\t memcmp(encap_header->buf, bounce_eh->buf,\n+\t\t\t bounce_eh->size) == 0) {\n+\t\t\t++(encap_header->refcnt);\n+\t\t\treturn encap_header;\n+\t\t}\n+\t}\n+\n+\treturn NULL;\n+}\n+\n+static int\n+sfc_mae_encap_header_add(struct sfc_adapter *sa,\n+\t\t\t const struct sfc_mae_bounce_eh *bounce_eh,\n+\t\t\t struct sfc_mae_encap_header **encap_headerp)\n+{\n+\tstruct sfc_mae_encap_header *encap_header;\n+\tstruct sfc_mae *mae = &sa->mae;\n+\n+\tSFC_ASSERT(sfc_adapter_is_locked(sa));\n+\n+\tencap_header = rte_zmalloc(\"sfc_mae_encap_header\",\n+\t\t\t\t sizeof(*encap_header), 0);\n+\tif (encap_header == NULL)\n+\t\treturn ENOMEM;\n+\n+\tencap_header->size = bounce_eh->size;\n+\n+\tencap_header->buf = rte_malloc(\"sfc_mae_encap_header_buf\",\n+\t\t\t\t encap_header->size, 0);\n+\tif (encap_header->buf == NULL) {\n+\t\trte_free(encap_header);\n+\t\treturn ENOMEM;\n+\t}\n+\n+\trte_memcpy(encap_header->buf, bounce_eh->buf, bounce_eh->size);\n+\n+\tencap_header->refcnt = 1;\n+\tencap_header->type = bounce_eh->type;\n+\tencap_header->fw_rsrc.eh_id.id = EFX_MAE_RSRC_ID_INVALID;\n+\n+\tTAILQ_INSERT_TAIL(&mae->encap_headers, encap_header, entries);\n+\n+\t*encap_headerp = encap_header;\n+\n+\treturn 0;\n+}\n+\n+static void\n+sfc_mae_encap_header_del(struct sfc_adapter *sa,\n+\t\t struct sfc_mae_encap_header *encap_header)\n+{\n+\tstruct sfc_mae *mae = &sa->mae;\n+\n+\tif (encap_header == NULL)\n+\t\treturn;\n+\n+\tSFC_ASSERT(sfc_adapter_is_locked(sa));\n+\tSFC_ASSERT(encap_header->refcnt != 0);\n+\n+\t--(encap_header->refcnt);\n+\n+\tif (encap_header->refcnt != 0)\n+\t\treturn;\n+\n+\tSFC_ASSERT(encap_header->fw_rsrc.eh_id.id == EFX_MAE_RSRC_ID_INVALID);\n+\tSFC_ASSERT(encap_header->fw_rsrc.refcnt == 0);\n+\n+\tTAILQ_REMOVE(&mae->encap_headers, encap_header, entries);\n+\trte_free(encap_header->buf);\n+\trte_free(encap_header);\n+}\n+\n+static int\n+sfc_mae_encap_header_enable(struct sfc_adapter *sa,\n+\t\t\t struct sfc_mae_encap_header *encap_header,\n+\t\t\t efx_mae_actions_t *action_set_spec)\n+{\n+\tstruct sfc_mae_fw_rsrc *fw_rsrc;\n+\tint rc;\n+\n+\tif (encap_header == NULL)\n+\t\treturn 0;\n+\n+\tSFC_ASSERT(sfc_adapter_is_locked(sa));\n+\n+\tfw_rsrc = &encap_header->fw_rsrc;\n+\n+\tif (fw_rsrc->refcnt == 0) {\n+\t\tSFC_ASSERT(fw_rsrc->eh_id.id == EFX_MAE_RSRC_ID_INVALID);\n+\t\tSFC_ASSERT(encap_header->buf != NULL);\n+\t\tSFC_ASSERT(encap_header->size != 0);\n+\n+\t\trc = efx_mae_encap_header_alloc(sa->nic, encap_header->type,\n+\t\t\t\t\t\tencap_header->buf,\n+\t\t\t\t\t\tencap_header->size,\n+\t\t\t\t\t\t&fw_rsrc->eh_id);\n+\t\tif (rc != 0)\n+\t\t\treturn rc;\n+\t}\n+\n+\trc = efx_mae_action_set_fill_in_eh_id(action_set_spec,\n+\t\t\t\t\t &fw_rsrc->eh_id);\n+\tif (rc != 0) {\n+\t\tif (fw_rsrc->refcnt == 0) {\n+\t\t\t(void)efx_mae_encap_header_free(sa->nic,\n+\t\t\t\t\t\t\t&fw_rsrc->eh_id);\n+\t\t}\n+\t\treturn rc;\n+\t}\n+\n+\t++(fw_rsrc->refcnt);\n+\n+\treturn 0;\n+}\n+\n+static int\n+sfc_mae_encap_header_disable(struct sfc_adapter *sa,\n+\t\t\t struct sfc_mae_encap_header *encap_header)\n+{\n+\tstruct sfc_mae_fw_rsrc *fw_rsrc;\n+\tint rc;\n+\n+\tif (encap_header == NULL)\n+\t\treturn 0;\n+\n+\tSFC_ASSERT(sfc_adapter_is_locked(sa));\n+\n+\tfw_rsrc = &encap_header->fw_rsrc;\n+\n+\tSFC_ASSERT(fw_rsrc->eh_id.id != EFX_MAE_RSRC_ID_INVALID);\n+\tSFC_ASSERT(fw_rsrc->refcnt != 0);\n+\n+\tif (fw_rsrc->refcnt == 1) {\n+\t\trc = efx_mae_encap_header_free(sa->nic, &fw_rsrc->eh_id);\n+\t\tif (rc != 0)\n+\t\t\treturn rc;\n+\n+\t\tfw_rsrc->eh_id.id = EFX_MAE_RSRC_ID_INVALID;\n+\t}\n+\n+\t--(fw_rsrc->refcnt);\n+\n+\treturn 0;\n+}\n+\n static struct sfc_mae_action_set *\n sfc_mae_action_set_attach(struct sfc_adapter *sa,\n+\t\t\t const struct sfc_mae_encap_header *encap_header,\n \t\t\t const efx_mae_actions_t *spec)\n {\n \tstruct sfc_mae_action_set *action_set;\n@@ -264,7 +435,8 @@ sfc_mae_action_set_attach(struct sfc_adapter *sa,\n \tSFC_ASSERT(sfc_adapter_is_locked(sa));\n \n \tTAILQ_FOREACH(action_set, &mae->action_sets, entries) {\n-\t\tif (efx_mae_action_set_specs_equal(action_set->spec, spec)) {\n+\t\tif (action_set->encap_header == encap_header &&\n+\t\t efx_mae_action_set_specs_equal(action_set->spec, spec)) {\n \t\t\t++(action_set->refcnt);\n \t\t\treturn action_set;\n \t\t}\n@@ -276,6 +448,7 @@ sfc_mae_action_set_attach(struct sfc_adapter *sa,\n static int\n sfc_mae_action_set_add(struct sfc_adapter *sa,\n \t\t efx_mae_actions_t *spec,\n+\t\t struct sfc_mae_encap_header *encap_header,\n \t\t struct sfc_mae_action_set **action_setp)\n {\n \tstruct sfc_mae_action_set *action_set;\n@@ -289,6 +462,7 @@ sfc_mae_action_set_add(struct sfc_adapter *sa,\n \n \taction_set->refcnt = 1;\n \taction_set->spec = spec;\n+\taction_set->encap_header = encap_header;\n \n \taction_set->fw_rsrc.aset_id.id = EFX_MAE_RSRC_ID_INVALID;\n \n@@ -317,6 +491,7 @@ sfc_mae_action_set_del(struct sfc_adapter *sa,\n \tSFC_ASSERT(action_set->fw_rsrc.refcnt == 0);\n \n \tefx_mae_action_set_spec_fini(sa->nic, action_set->spec);\n+\tsfc_mae_encap_header_del(sa, action_set->encap_header);\n \tTAILQ_REMOVE(&mae->action_sets, action_set, entries);\n \trte_free(action_set);\n }\n@@ -325,6 +500,7 @@ static int\n sfc_mae_action_set_enable(struct sfc_adapter *sa,\n \t\t\t struct sfc_mae_action_set *action_set)\n {\n+\tstruct sfc_mae_encap_header *encap_header = action_set->encap_header;\n \tstruct sfc_mae_fw_rsrc *fw_rsrc = &action_set->fw_rsrc;\n \tint rc;\n \n@@ -334,10 +510,18 @@ sfc_mae_action_set_enable(struct sfc_adapter *sa,\n \t\tSFC_ASSERT(fw_rsrc->aset_id.id == EFX_MAE_RSRC_ID_INVALID);\n \t\tSFC_ASSERT(action_set->spec != NULL);\n \n+\t\trc = sfc_mae_encap_header_enable(sa, encap_header,\n+\t\t\t\t\t\t action_set->spec);\n+\t\tif (rc != 0)\n+\t\t\treturn rc;\n+\n \t\trc = efx_mae_action_set_alloc(sa->nic, action_set->spec,\n \t\t\t\t\t &fw_rsrc->aset_id);\n-\t\tif (rc != 0)\n+\t\tif (rc != 0) {\n+\t\t\t(void)sfc_mae_encap_header_disable(sa, encap_header);\n+\n \t\t\treturn rc;\n+\t\t}\n \t}\n \n \t++(fw_rsrc->refcnt);\n@@ -362,6 +546,10 @@ sfc_mae_action_set_disable(struct sfc_adapter *sa,\n \t\t\treturn rc;\n \n \t\tfw_rsrc->aset_id.id = EFX_MAE_RSRC_ID_INVALID;\n+\n+\t\trc = sfc_mae_encap_header_disable(sa, action_set->encap_header);\n+\t\tif (rc != 0)\n+\t\t\treturn rc;\n \t}\n \n \t--(fw_rsrc->refcnt);\n@@ -1936,6 +2124,307 @@ sfc_mae_rule_parse_action_of_set_vlan_pcp(\n \tbundle->vlan_push_tci |= rte_cpu_to_be_16(vlan_tci_pcp);\n }\n \n+struct sfc_mae_parsed_item {\n+\tconst struct rte_flow_item\t*item;\n+\tsize_t\t\t\t\tproto_header_ofst;\n+\tsize_t\t\t\t\tproto_header_size;\n+};\n+\n+/*\n+ * For each 16-bit word of the given header, override\n+ * bits enforced by the corresponding 16-bit mask.\n+ */\n+static void\n+sfc_mae_header_force_item_masks(uint8_t *header_buf,\n+\t\t\t\tconst struct sfc_mae_parsed_item *parsed_items,\n+\t\t\t\tunsigned int nb_parsed_items)\n+{\n+\tunsigned int item_idx;\n+\n+\tfor (item_idx = 0; item_idx < nb_parsed_items; ++item_idx) {\n+\t\tconst struct sfc_mae_parsed_item *parsed_item;\n+\t\tconst struct rte_flow_item *item;\n+\t\tsize_t proto_header_size;\n+\t\tsize_t ofst;\n+\n+\t\tparsed_item = &parsed_items[item_idx];\n+\t\tproto_header_size = parsed_item->proto_header_size;\n+\t\titem = parsed_item->item;\n+\n+\t\tfor (ofst = 0; ofst < proto_header_size;\n+\t\t ofst += sizeof(rte_be16_t)) {\n+\t\t\trte_be16_t *wp = RTE_PTR_ADD(header_buf, ofst);\n+\t\t\tconst rte_be16_t *w_maskp;\n+\t\t\tconst rte_be16_t *w_specp;\n+\n+\t\t\tw_maskp = RTE_PTR_ADD(item->mask, ofst);\n+\t\t\tw_specp = RTE_PTR_ADD(item->spec, ofst);\n+\n+\t\t\t*wp &= ~(*w_maskp);\n+\t\t\t*wp |= (*w_specp & *w_maskp);\n+\t\t}\n+\n+\t\theader_buf += proto_header_size;\n+\t}\n+}\n+\n+#define SFC_IPV4_TTL_DEF\t0x40\n+#define SFC_IPV6_VTC_FLOW_DEF\t0x60000000\n+#define SFC_IPV6_HOP_LIMITS_DEF\t0xff\n+#define SFC_VXLAN_FLAGS_DEF\t0x08000000\n+\n+static int\n+sfc_mae_rule_parse_action_vxlan_encap(\n+\t\t\t struct sfc_mae *mae,\n+\t\t\t const struct rte_flow_action_vxlan_encap *conf,\n+\t\t\t efx_mae_actions_t *spec,\n+\t\t\t struct rte_flow_error *error)\n+{\n+\tstruct sfc_mae_bounce_eh *bounce_eh = &mae->bounce_eh;\n+\tstruct rte_flow_item *pattern = conf->definition;\n+\tuint8_t *buf = bounce_eh->buf;\n+\n+\t/* This array will keep track of non-VOID pattern items. */\n+\tstruct sfc_mae_parsed_item parsed_items[1 /* Ethernet */ +\n+\t\t\t\t\t\t2 /* VLAN tags */ +\n+\t\t\t\t\t\t1 /* IPv4 or IPv6 */ +\n+\t\t\t\t\t\t1 /* UDP */ +\n+\t\t\t\t\t\t1 /* VXLAN */];\n+\tunsigned int nb_parsed_items = 0;\n+\n+\tsize_t eth_ethertype_ofst = offsetof(struct rte_ether_hdr, ether_type);\n+\tuint8_t dummy_buf[RTE_MAX(sizeof(struct rte_ipv4_hdr),\n+\t\t\t\t sizeof(struct rte_ipv6_hdr))];\n+\tstruct rte_ipv4_hdr *ipv4 = (void *)dummy_buf;\n+\tstruct rte_ipv6_hdr *ipv6 = (void *)dummy_buf;\n+\tstruct rte_vxlan_hdr *vxlan = NULL;\n+\tstruct rte_udp_hdr *udp = NULL;\n+\tunsigned int nb_vlan_tags = 0;\n+\tsize_t next_proto_ofst = 0;\n+\tsize_t ethertype_ofst = 0;\n+\tuint64_t exp_items;\n+\n+\tif (pattern == NULL) {\n+\t\treturn rte_flow_error_set(error, EINVAL,\n+\t\t\t\tRTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,\n+\t\t\t\t\"The encap. header definition is NULL\");\n+\t}\n+\n+\tbounce_eh->type = EFX_TUNNEL_PROTOCOL_VXLAN;\n+\tbounce_eh->size = 0;\n+\n+\t/*\n+\t * Process pattern items and remember non-VOID ones.\n+\t * Defer applying masks until after the complete header\n+\t * has been built from the pattern items.\n+\t */\n+\texp_items = RTE_BIT64(RTE_FLOW_ITEM_TYPE_ETH);\n+\n+\tfor (; pattern->type != RTE_FLOW_ITEM_TYPE_END; ++pattern) {\n+\t\tstruct sfc_mae_parsed_item *parsed_item;\n+\t\tconst uint64_t exp_items_extra_vlan[] = {\n+\t\t\tRTE_BIT64(RTE_FLOW_ITEM_TYPE_VLAN), 0\n+\t\t};\n+\t\tsize_t proto_header_size;\n+\t\trte_be16_t *ethertypep;\n+\t\tuint8_t *next_protop;\n+\t\tuint8_t *buf_cur;\n+\n+\t\tif (pattern->spec == NULL) {\n+\t\t\treturn rte_flow_error_set(error, EINVAL,\n+\t\t\t\t\tRTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,\n+\t\t\t\t\t\"NULL item spec in the encap. header\");\n+\t\t}\n+\n+\t\tif (pattern->mask == NULL) {\n+\t\t\treturn rte_flow_error_set(error, EINVAL,\n+\t\t\t\t\tRTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,\n+\t\t\t\t\t\"NULL item mask in the encap. header\");\n+\t\t}\n+\n+\t\tif (pattern->last != NULL) {\n+\t\t\t/* This is not a match pattern, so disallow range. */\n+\t\t\treturn rte_flow_error_set(error, EINVAL,\n+\t\t\t\t\tRTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,\n+\t\t\t\t\t\"Range item in the encap. header\");\n+\t\t}\n+\n+\t\tif (pattern->type == RTE_FLOW_ITEM_TYPE_VOID) {\n+\t\t\t/* Handle VOID separately, for clarity. */\n+\t\t\tcontinue;\n+\t\t}\n+\n+\t\tif ((exp_items & RTE_BIT64(pattern->type)) == 0) {\n+\t\t\treturn rte_flow_error_set(error, ENOTSUP,\n+\t\t\t\t\tRTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,\n+\t\t\t\t\t\"Unexpected item in the encap. header\");\n+\t\t}\n+\n+\t\tparsed_item = &parsed_items[nb_parsed_items];\n+\t\tbuf_cur = buf + bounce_eh->size;\n+\n+\t\tswitch (pattern->type) {\n+\t\tcase RTE_FLOW_ITEM_TYPE_ETH:\n+\t\t\tSFC_BUILD_SET_OVERFLOW(RTE_FLOW_ITEM_TYPE_ETH,\n+\t\t\t\t\t exp_items);\n+\t\t\tRTE_BUILD_BUG_ON(offsetof(struct rte_flow_item_eth,\n+\t\t\t\t\t\t hdr) != 0);\n+\n+\t\t\tproto_header_size = sizeof(struct rte_ether_hdr);\n+\n+\t\t\tethertype_ofst = eth_ethertype_ofst;\n+\n+\t\t\texp_items = RTE_BIT64(RTE_FLOW_ITEM_TYPE_VLAN) |\n+\t\t\t\t RTE_BIT64(RTE_FLOW_ITEM_TYPE_IPV4) |\n+\t\t\t\t RTE_BIT64(RTE_FLOW_ITEM_TYPE_IPV6);\n+\t\t\tbreak;\n+\t\tcase RTE_FLOW_ITEM_TYPE_VLAN:\n+\t\t\tSFC_BUILD_SET_OVERFLOW(RTE_FLOW_ITEM_TYPE_VLAN,\n+\t\t\t\t\t exp_items);\n+\t\t\tRTE_BUILD_BUG_ON(offsetof(struct rte_flow_item_vlan,\n+\t\t\t\t\t\t hdr) != 0);\n+\n+\t\t\tproto_header_size = sizeof(struct rte_vlan_hdr);\n+\n+\t\t\tethertypep = RTE_PTR_ADD(buf, eth_ethertype_ofst);\n+\t\t\t*ethertypep = RTE_BE16(RTE_ETHER_TYPE_QINQ);\n+\n+\t\t\tethertypep = RTE_PTR_ADD(buf, ethertype_ofst);\n+\t\t\t*ethertypep = RTE_BE16(RTE_ETHER_TYPE_VLAN);\n+\n+\t\t\tethertype_ofst =\n+\t\t\t bounce_eh->size +\n+\t\t\t offsetof(struct rte_vlan_hdr, eth_proto);\n+\n+\t\t\texp_items = RTE_BIT64(RTE_FLOW_ITEM_TYPE_IPV4) |\n+\t\t\t\t RTE_BIT64(RTE_FLOW_ITEM_TYPE_IPV6);\n+\t\t\texp_items |= exp_items_extra_vlan[nb_vlan_tags];\n+\n+\t\t\t++nb_vlan_tags;\n+\t\t\tbreak;\n+\t\tcase RTE_FLOW_ITEM_TYPE_IPV4:\n+\t\t\tSFC_BUILD_SET_OVERFLOW(RTE_FLOW_ITEM_TYPE_IPV4,\n+\t\t\t\t\t exp_items);\n+\t\t\tRTE_BUILD_BUG_ON(offsetof(struct rte_flow_item_ipv4,\n+\t\t\t\t\t\t hdr) != 0);\n+\n+\t\t\tproto_header_size = sizeof(struct rte_ipv4_hdr);\n+\n+\t\t\tethertypep = RTE_PTR_ADD(buf, ethertype_ofst);\n+\t\t\t*ethertypep = RTE_BE16(RTE_ETHER_TYPE_IPV4);\n+\n+\t\t\tnext_proto_ofst =\n+\t\t\t bounce_eh->size +\n+\t\t\t offsetof(struct rte_ipv4_hdr, next_proto_id);\n+\n+\t\t\tipv4 = (struct rte_ipv4_hdr *)buf_cur;\n+\n+\t\t\texp_items = RTE_BIT64(RTE_FLOW_ITEM_TYPE_UDP);\n+\t\t\tbreak;\n+\t\tcase RTE_FLOW_ITEM_TYPE_IPV6:\n+\t\t\tSFC_BUILD_SET_OVERFLOW(RTE_FLOW_ITEM_TYPE_IPV6,\n+\t\t\t\t\t exp_items);\n+\t\t\tRTE_BUILD_BUG_ON(offsetof(struct rte_flow_item_ipv6,\n+\t\t\t\t\t\t hdr) != 0);\n+\n+\t\t\tproto_header_size = sizeof(struct rte_ipv6_hdr);\n+\n+\t\t\tethertypep = RTE_PTR_ADD(buf, ethertype_ofst);\n+\t\t\t*ethertypep = RTE_BE16(RTE_ETHER_TYPE_IPV6);\n+\n+\t\t\tnext_proto_ofst = bounce_eh->size +\n+\t\t\t\t\t offsetof(struct rte_ipv6_hdr, proto);\n+\n+\t\t\tipv6 = (struct rte_ipv6_hdr *)buf_cur;\n+\n+\t\t\texp_items = RTE_BIT64(RTE_FLOW_ITEM_TYPE_UDP);\n+\t\t\tbreak;\n+\t\tcase RTE_FLOW_ITEM_TYPE_UDP:\n+\t\t\tSFC_BUILD_SET_OVERFLOW(RTE_FLOW_ITEM_TYPE_UDP,\n+\t\t\t\t\t exp_items);\n+\t\t\tRTE_BUILD_BUG_ON(offsetof(struct rte_flow_item_udp,\n+\t\t\t\t\t\t hdr) != 0);\n+\n+\t\t\tproto_header_size = sizeof(struct rte_udp_hdr);\n+\n+\t\t\tnext_protop = RTE_PTR_ADD(buf, next_proto_ofst);\n+\t\t\t*next_protop = IPPROTO_UDP;\n+\n+\t\t\tudp = (struct rte_udp_hdr *)buf_cur;\n+\n+\t\t\texp_items = RTE_BIT64(RTE_FLOW_ITEM_TYPE_VXLAN);\n+\t\t\tbreak;\n+\t\tcase RTE_FLOW_ITEM_TYPE_VXLAN:\n+\t\t\tSFC_BUILD_SET_OVERFLOW(RTE_FLOW_ITEM_TYPE_VXLAN,\n+\t\t\t\t\t exp_items);\n+\t\t\tRTE_BUILD_BUG_ON(offsetof(struct rte_flow_item_vxlan,\n+\t\t\t\t\t\t hdr) != 0);\n+\n+\t\t\tproto_header_size = sizeof(struct rte_vxlan_hdr);\n+\n+\t\t\tvxlan = (struct rte_vxlan_hdr *)buf_cur;\n+\n+\t\t\tudp->dst_port = RTE_BE16(RTE_VXLAN_DEFAULT_PORT);\n+\t\t\tudp->dgram_len = RTE_BE16(sizeof(*udp) +\n+\t\t\t\t\t\t sizeof(*vxlan));\n+\t\t\tudp->dgram_cksum = 0;\n+\n+\t\t\texp_items = 0;\n+\t\t\tbreak;\n+\t\tdefault:\n+\t\t\treturn rte_flow_error_set(error, ENOTSUP,\n+\t\t\t\t\tRTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,\n+\t\t\t\t\t\"Unknown item in the encap. header\");\n+\t\t}\n+\n+\t\tif (bounce_eh->size + proto_header_size > bounce_eh->buf_size) {\n+\t\t\treturn rte_flow_error_set(error, E2BIG,\n+\t\t\t\t\tRTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,\n+\t\t\t\t\t\"The encap. header is too big\");\n+\t\t}\n+\n+\t\tif ((proto_header_size & 1) != 0) {\n+\t\t\treturn rte_flow_error_set(error, EINVAL,\n+\t\t\t\t\tRTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,\n+\t\t\t\t\t\"Odd layer size in the encap. header\");\n+\t\t}\n+\n+\t\trte_memcpy(buf_cur, pattern->spec, proto_header_size);\n+\t\tbounce_eh->size += proto_header_size;\n+\n+\t\tparsed_item->item = pattern;\n+\t\tparsed_item->proto_header_size = proto_header_size;\n+\t\t++nb_parsed_items;\n+\t}\n+\n+\tif (exp_items != 0) {\n+\t\t/* Parsing item VXLAN would have reset exp_items to 0. */\n+\t\treturn rte_flow_error_set(error, ENOTSUP,\n+\t\t\t\t\tRTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,\n+\t\t\t\t\t\"No item VXLAN in the encap. header\");\n+\t}\n+\n+\t/* One of the pointers (ipv4, ipv6) referes to a dummy area. */\n+\tipv4->version_ihl = RTE_IPV4_VHL_DEF;\n+\tipv4->time_to_live = SFC_IPV4_TTL_DEF;\n+\tipv4->total_length = RTE_BE16(sizeof(*ipv4) + sizeof(*udp) +\n+\t\t\t\t sizeof(*vxlan));\n+\t/* The HW cannot compute this checksum. */\n+\tipv4->hdr_checksum = 0;\n+\tipv4->hdr_checksum = rte_ipv4_cksum(ipv4);\n+\n+\tipv6->vtc_flow = RTE_BE32(SFC_IPV6_VTC_FLOW_DEF);\n+\tipv6->hop_limits = SFC_IPV6_HOP_LIMITS_DEF;\n+\tipv6->payload_len = udp->dgram_len;\n+\n+\tvxlan->vx_flags = RTE_BE32(SFC_VXLAN_FLAGS_DEF);\n+\n+\t/* Take care of the masks. */\n+\tsfc_mae_header_force_item_masks(buf, parsed_items, nb_parsed_items);\n+\n+\treturn (spec != NULL) ? efx_mae_action_set_populate_encap(spec) : 0;\n+}\n+\n static int\n sfc_mae_rule_parse_action_mark(const struct rte_flow_action_mark *conf,\n \t\t\t efx_mae_actions_t *spec)\n@@ -2016,6 +2505,7 @@ sfc_mae_rule_parse_action(struct sfc_adapter *sa,\n \t\t\t efx_mae_actions_t *spec,\n \t\t\t struct rte_flow_error *error)\n {\n+\tbool custom_error = B_FALSE;\n \tint rc = 0;\n \n \tswitch (action->type) {\n@@ -2039,6 +2529,14 @@ sfc_mae_rule_parse_action(struct sfc_adapter *sa,\n \t\t\t\t bundle->actions_mask);\n \t\tsfc_mae_rule_parse_action_of_set_vlan_pcp(action->conf, bundle);\n \t\tbreak;\n+\tcase RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:\n+\t\tSFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP,\n+\t\t\t\t bundle->actions_mask);\n+\t\trc = sfc_mae_rule_parse_action_vxlan_encap(&sa->mae,\n+\t\t\t\t\t\t\t action->conf,\n+\t\t\t\t\t\t\t spec, error);\n+\t\tcustom_error = B_TRUE;\n+\t\tbreak;\n \tcase RTE_FLOW_ACTION_TYPE_FLAG:\n \t\tSFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_FLAG,\n \t\t\t\t bundle->actions_mask);\n@@ -2080,24 +2578,49 @@ sfc_mae_rule_parse_action(struct sfc_adapter *sa,\n \t\t\t\t\"Unsupported action\");\n \t}\n \n-\tif (rc != 0) {\n+\tif (rc == 0) {\n+\t\tbundle->actions_mask |= (1ULL << action->type);\n+\t} else if (!custom_error) {\n \t\trc = rte_flow_error_set(error, rc, RTE_FLOW_ERROR_TYPE_ACTION,\n \t\t\t\tNULL, \"Failed to request the action\");\n-\t} else {\n-\t\tbundle->actions_mask |= (1ULL << action->type);\n \t}\n \n \treturn rc;\n }\n \n+static void\n+sfc_mae_bounce_eh_invalidate(struct sfc_mae_bounce_eh *bounce_eh)\n+{\n+\tbounce_eh->type = EFX_TUNNEL_PROTOCOL_NONE;\n+}\n+\n+static int\n+sfc_mae_process_encap_header(struct sfc_adapter *sa,\n+\t\t\t const struct sfc_mae_bounce_eh *bounce_eh,\n+\t\t\t struct sfc_mae_encap_header **encap_headerp)\n+{\n+\tif (bounce_eh->type == EFX_TUNNEL_PROTOCOL_NONE) {\n+\t\tencap_headerp = NULL;\n+\t\treturn 0;\n+\t}\n+\n+\t*encap_headerp = sfc_mae_encap_header_attach(sa, bounce_eh);\n+\tif (*encap_headerp != NULL)\n+\t\treturn 0;\n+\n+\treturn sfc_mae_encap_header_add(sa, bounce_eh, encap_headerp);\n+}\n+\n int\n sfc_mae_rule_parse_actions(struct sfc_adapter *sa,\n \t\t\t const struct rte_flow_action actions[],\n \t\t\t struct sfc_flow_spec_mae *spec_mae,\n \t\t\t struct rte_flow_error *error)\n {\n+\tstruct sfc_mae_encap_header *encap_header = NULL;\n \tstruct sfc_mae_actions_bundle bundle = {0};\n \tconst struct rte_flow_action *action;\n+\tstruct sfc_mae *mae = &sa->mae;\n \tefx_mae_actions_t *spec;\n \tint rc;\n \n@@ -2111,6 +2634,9 @@ sfc_mae_rule_parse_actions(struct sfc_adapter *sa,\n \tif (rc != 0)\n \t\tgoto fail_action_set_spec_init;\n \n+\t/* Cleanup after previous encap. header bounce buffer usage. */\n+\tsfc_mae_bounce_eh_invalidate(&mae->bounce_eh);\n+\n \tfor (action = actions;\n \t action->type != RTE_FLOW_ACTION_TYPE_END; ++action) {\n \t\trc = sfc_mae_actions_bundle_sync(action, &bundle, spec, error);\n@@ -2127,19 +2653,29 @@ sfc_mae_rule_parse_actions(struct sfc_adapter *sa,\n \tif (rc != 0)\n \t\tgoto fail_rule_parse_action;\n \n-\tspec_mae->action_set = sfc_mae_action_set_attach(sa, spec);\n+\trc = sfc_mae_process_encap_header(sa, &mae->bounce_eh, &encap_header);\n+\tif (rc != 0)\n+\t\tgoto fail_process_encap_header;\n+\n+\tspec_mae->action_set = sfc_mae_action_set_attach(sa, encap_header,\n+\t\t\t\t\t\t\t spec);\n \tif (spec_mae->action_set != NULL) {\n+\t\tsfc_mae_encap_header_del(sa, encap_header);\n \t\tefx_mae_action_set_spec_fini(sa->nic, spec);\n \t\treturn 0;\n \t}\n \n-\trc = sfc_mae_action_set_add(sa, spec, &spec_mae->action_set);\n+\trc = sfc_mae_action_set_add(sa, spec, encap_header,\n+\t\t\t\t &spec_mae->action_set);\n \tif (rc != 0)\n \t\tgoto fail_action_set_add;\n \n \treturn 0;\n \n fail_action_set_add:\n+\tsfc_mae_encap_header_del(sa, encap_header);\n+\n+fail_process_encap_header:\n fail_rule_parse_action:\n \tefx_mae_action_set_spec_fini(sa->nic, spec);\n \ndiff --git a/drivers/net/sfc/sfc_mae.h b/drivers/net/sfc/sfc_mae.h\nindex 00987af61..c08fa545b 100644\n--- a/drivers/net/sfc/sfc_mae.h\n+++ b/drivers/net/sfc/sfc_mae.h\n@@ -27,6 +27,7 @@ struct sfc_mae_fw_rsrc {\n \tunion {\n \t\tefx_mae_aset_id_t\taset_id;\n \t\tefx_mae_rule_id_t\trule_id;\n+\t\tefx_mae_eh_id_t\t\teh_id;\n \t};\n };\n \n@@ -41,11 +42,24 @@ struct sfc_mae_outer_rule {\n \n TAILQ_HEAD(sfc_mae_outer_rules, sfc_mae_outer_rule);\n \n+/** Encap. header registry entry */\n+struct sfc_mae_encap_header {\n+\tTAILQ_ENTRY(sfc_mae_encap_header)\tentries;\n+\tunsigned int\t\t\t\trefcnt;\n+\tuint8_t\t\t\t\t\t*buf;\n+\tsize_t\t\t\t\t\tsize;\n+\tefx_tunnel_protocol_t\t\t\ttype;\n+\tstruct sfc_mae_fw_rsrc\t\t\tfw_rsrc;\n+};\n+\n+TAILQ_HEAD(sfc_mae_encap_headers, sfc_mae_encap_header);\n+\n /** Action set registry entry */\n struct sfc_mae_action_set {\n \tTAILQ_ENTRY(sfc_mae_action_set)\tentries;\n \tunsigned int\t\t\trefcnt;\n \tefx_mae_actions_t\t\t*spec;\n+\tstruct sfc_mae_encap_header\t*encap_header;\n \tstruct sfc_mae_fw_rsrc\t\tfw_rsrc;\n };\n \n@@ -58,6 +72,17 @@ enum sfc_mae_status {\n \tSFC_MAE_STATUS_SUPPORTED\n };\n \n+/*\n+ * Encap. header bounce buffer. It is used to store header data\n+ * when parsing the header definition in the action VXLAN_ENCAP.\n+ */\n+struct sfc_mae_bounce_eh {\n+\tuint8_t\t\t\t\t*buf;\n+\tsize_t\t\t\t\tbuf_size;\n+\tsize_t\t\t\t\tsize;\n+\tefx_tunnel_protocol_t\t\ttype;\n+};\n+\n struct sfc_mae {\n \t/** Assigned switch domain identifier */\n \tuint16_t\t\t\tswitch_domain_id;\n@@ -73,8 +98,12 @@ struct sfc_mae {\n \tuint32_t\t\t\tencap_types_supported;\n \t/** Outer rule registry */\n \tstruct sfc_mae_outer_rules\touter_rules;\n+\t/** Encap. header registry */\n+\tstruct sfc_mae_encap_headers\tencap_headers;\n \t/** Action set registry */\n \tstruct sfc_mae_action_sets\taction_sets;\n+\t/** Encap. header bounce buffer */\n+\tstruct sfc_mae_bounce_eh\tbounce_eh;\n };\n \n struct sfc_adapter;\n", "prefixes": [ "08/10" ] }