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GET /api/patches/96780/?format=api
{ "id": 96780, "url": "http://patchwork.dpdk.org/api/patches/96780/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/1628596454-32918-3-git-send-email-fengchengwen@huawei.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1628596454-32918-3-git-send-email-fengchengwen@huawei.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1628596454-32918-3-git-send-email-fengchengwen@huawei.com", "date": "2021-08-10T11:54:10", "name": "[v14,2/6] dmadev: introduce DMA device library internal header", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "12594fef7463dd8bf3a0e1f1e067d7500b5dde3d", "submitter": { "id": 2146, "url": "http://patchwork.dpdk.org/api/people/2146/?format=api", "name": "fengchengwen", "email": "fengchengwen@huawei.com" }, "delegate": { "id": 1, "url": "http://patchwork.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/1628596454-32918-3-git-send-email-fengchengwen@huawei.com/mbox/", "series": [ { "id": 18248, "url": "http://patchwork.dpdk.org/api/series/18248/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=18248", "date": "2021-08-10T11:54:08", "name": "support dmadev", "version": 14, "mbox": "http://patchwork.dpdk.org/series/18248/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/96780/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/96780/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id A1AFBA0C4C;\n\tTue, 10 Aug 2021 13:58:22 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 741C8411C7;\n\tTue, 10 Aug 2021 13:58:11 +0200 (CEST)", "from szxga08-in.huawei.com (szxga08-in.huawei.com [45.249.212.255])\n by mails.dpdk.org (Postfix) with ESMTP id EEB8740686\n for <dev@dpdk.org>; Tue, 10 Aug 2021 13:58:06 +0200 (CEST)", "from dggemv704-chm.china.huawei.com (unknown [172.30.72.56])\n by szxga08-in.huawei.com (SkyGuard) with ESMTP id 4GkWfj1jb5z1CVGR;\n Tue, 10 Aug 2021 19:57:49 +0800 (CST)", "from dggpeml500024.china.huawei.com (7.185.36.10) by\n dggemv704-chm.china.huawei.com (10.3.19.47) with Microsoft SMTP Server\n (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id\n 15.1.2176.2; Tue, 10 Aug 2021 19:58:02 +0800", "from localhost.localdomain (10.67.165.24) by\n dggpeml500024.china.huawei.com (7.185.36.10) with Microsoft SMTP Server\n (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id\n 15.1.2176.2; Tue, 10 Aug 2021 19:58:02 +0800" ], "From": "Chengwen Feng <fengchengwen@huawei.com>", "To": "<thomas@monjalon.net>, <ferruh.yigit@intel.com>,\n <bruce.richardson@intel.com>, <jerinj@marvell.com>, <jerinjacobk@gmail.com>,\n <andrew.rybchenko@oktetlabs.ru>", "CC": "<dev@dpdk.org>, <mb@smartsharesystems.com>, <nipun.gupta@nxp.com>,\n <hemant.agrawal@nxp.com>, <maxime.coquelin@redhat.com>,\n <honnappa.nagarahalli@arm.com>, <david.marchand@redhat.com>,\n <sburla@marvell.com>, <pkapoor@marvell.com>, <konstantin.ananyev@intel.com>", "Date": "Tue, 10 Aug 2021 19:54:10 +0800", "Message-ID": "<1628596454-32918-3-git-send-email-fengchengwen@huawei.com>", "X-Mailer": "git-send-email 2.8.1", "In-Reply-To": "<1628596454-32918-1-git-send-email-fengchengwen@huawei.com>", "References": "<1625231891-2963-1-git-send-email-fengchengwen@huawei.com>\n <1628596454-32918-1-git-send-email-fengchengwen@huawei.com>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"UTF-8\"", "Content-Transfer-Encoding": "8bit", "X-Originating-IP": "[10.67.165.24]", "X-ClientProxiedBy": "dggems705-chm.china.huawei.com (10.3.19.182) To\n dggpeml500024.china.huawei.com (7.185.36.10)", "X-CFilter-Loop": "Reflected", "Subject": "[dpdk-dev] [PATCH v14 2/6] dmadev: introduce DMA device library\n internal header", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This patch introduce DMA device library internal header, which contains\ninternal data types that are used by the DMA devices in order to expose\ntheir ops to the class.\n\nSigned-off-by: Chengwen Feng <fengchengwen@huawei.com>\nAcked-by: Bruce Richardson <bruce.richardson@intel.com>\nAcked-by: Morten Brørup <mb@smartsharesystems.com>\n---\n lib/dmadev/meson.build | 1 +\n lib/dmadev/rte_dmadev_core.h | 180 +++++++++++++++++++++++++++++++++++++++++++\n 2 files changed, 181 insertions(+)\n create mode 100644 lib/dmadev/rte_dmadev_core.h", "diff": "diff --git a/lib/dmadev/meson.build b/lib/dmadev/meson.build\nindex 6d5bd85..f421ec1 100644\n--- a/lib/dmadev/meson.build\n+++ b/lib/dmadev/meson.build\n@@ -2,3 +2,4 @@\n # Copyright(c) 2021 HiSilicon Limited.\n \n headers = files('rte_dmadev.h')\n+indirect_headers += files('rte_dmadev_core.h')\ndiff --git a/lib/dmadev/rte_dmadev_core.h b/lib/dmadev/rte_dmadev_core.h\nnew file mode 100644\nindex 0000000..ff7b70a\n--- /dev/null\n+++ b/lib/dmadev/rte_dmadev_core.h\n@@ -0,0 +1,180 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2021 HiSilicon Limited.\n+ * Copyright(c) 2021 Intel Corporation.\n+ */\n+\n+#ifndef _RTE_DMADEV_CORE_H_\n+#define _RTE_DMADEV_CORE_H_\n+\n+/**\n+ * @file\n+ *\n+ * RTE DMA Device internal header.\n+ *\n+ * This header contains internal data types, that are used by the DMA devices\n+ * in order to expose their ops to the class.\n+ *\n+ * Applications should not use these API directly.\n+ *\n+ */\n+\n+struct rte_dmadev;\n+\n+typedef int (*rte_dmadev_info_get_t)(const struct rte_dmadev *dev,\n+\t\t\t\t struct rte_dmadev_info *dev_info,\n+\t\t\t\t uint32_t info_sz);\n+/**< @internal Used to get device information of a device. */\n+\n+typedef int (*rte_dmadev_configure_t)(struct rte_dmadev *dev,\n+\t\t\t\t const struct rte_dmadev_conf *dev_conf);\n+/**< @internal Used to configure a device. */\n+\n+typedef int (*rte_dmadev_start_t)(struct rte_dmadev *dev);\n+/**< @internal Used to start a configured device. */\n+\n+typedef int (*rte_dmadev_stop_t)(struct rte_dmadev *dev);\n+/**< @internal Used to stop a configured device. */\n+\n+typedef int (*rte_dmadev_close_t)(struct rte_dmadev *dev);\n+/**< @internal Used to close a configured device. */\n+\n+typedef int (*rte_dmadev_vchan_setup_t)(struct rte_dmadev *dev, uint16_t vchan,\n+\t\t\t\tconst struct rte_dmadev_vchan_conf *conf);\n+/**< @internal Used to allocate and set up a virtual DMA channel. */\n+\n+typedef int (*rte_dmadev_stats_get_t)(const struct rte_dmadev *dev,\n+\t\t\tuint16_t vchan, struct rte_dmadev_stats *stats,\n+\t\t\tuint32_t stats_sz);\n+/**< @internal Used to retrieve basic statistics. */\n+\n+typedef int (*rte_dmadev_stats_reset_t)(struct rte_dmadev *dev, uint16_t vchan);\n+/**< @internal Used to reset basic statistics. */\n+\n+typedef int (*rte_dmadev_dump_t)(const struct rte_dmadev *dev, FILE *f);\n+/**< @internal Used to dump internal information. */\n+\n+typedef int (*rte_dmadev_selftest_t)(uint16_t dev_id);\n+/**< @internal Used to start dmadev selftest. */\n+\n+typedef int (*rte_dmadev_copy_t)(struct rte_dmadev *dev, uint16_t vchan,\n+\t\t\t\t rte_iova_t src, rte_iova_t dst,\n+\t\t\t\t uint32_t length, uint64_t flags);\n+/**< @internal Used to enqueue a copy operation. */\n+\n+typedef int (*rte_dmadev_copy_sg_t)(struct rte_dmadev *dev, uint16_t vchan,\n+\t\t\t\t const struct rte_dmadev_sge *src,\n+\t\t\t\t const struct rte_dmadev_sge *dst,\n+\t\t\t\t uint16_t nb_src, uint16_t nb_dst,\n+\t\t\t\t uint64_t flags);\n+/**< @internal Used to enqueue a scatter-gather list copy operation. */\n+\n+typedef int (*rte_dmadev_fill_t)(struct rte_dmadev *dev, uint16_t vchan,\n+\t\t\t\t uint64_t pattern, rte_iova_t dst,\n+\t\t\t\t uint32_t length, uint64_t flags);\n+/**< @internal Used to enqueue a fill operation. */\n+\n+typedef int (*rte_dmadev_submit_t)(struct rte_dmadev *dev, uint16_t vchan);\n+/**< @internal Used to trigger hardware to begin working. */\n+\n+typedef uint16_t (*rte_dmadev_completed_t)(struct rte_dmadev *dev,\n+\t\t\t\tuint16_t vchan, const uint16_t nb_cpls,\n+\t\t\t\tuint16_t *last_idx, bool *has_error);\n+/**< @internal Used to return number of successful completed operations. */\n+\n+typedef uint16_t (*rte_dmadev_completed_status_t)(struct rte_dmadev *dev,\n+\t\t\tuint16_t vchan, const uint16_t nb_cpls,\n+\t\t\tuint16_t *last_idx, enum rte_dma_status_code *status);\n+/**< @internal Used to return number of completed operations. */\n+\n+/**\n+ * Possible states of a DMA device.\n+ */\n+enum rte_dmadev_state {\n+\tRTE_DMADEV_UNUSED = 0,\n+\t/**< Device is unused before being probed. */\n+\tRTE_DMADEV_ATTACHED,\n+\t/**< Device is attached when allocated in probing. */\n+};\n+\n+/**\n+ * DMA device operations function pointer table\n+ */\n+struct rte_dmadev_ops {\n+\trte_dmadev_info_get_t dev_info_get;\n+\trte_dmadev_configure_t dev_configure;\n+\trte_dmadev_start_t dev_start;\n+\trte_dmadev_stop_t dev_stop;\n+\trte_dmadev_close_t dev_close;\n+\trte_dmadev_vchan_setup_t vchan_setup;\n+\trte_dmadev_stats_get_t stats_get;\n+\trte_dmadev_stats_reset_t stats_reset;\n+\trte_dmadev_dump_t dev_dump;\n+\trte_dmadev_selftest_t dev_selftest;\n+};\n+\n+/**\n+ * @internal\n+ * The data part, with no function pointers, associated with each DMA device.\n+ *\n+ * This structure is safe to place in shared memory to be common among different\n+ * processes in a multi-process configuration.\n+ */\n+struct rte_dmadev_data {\n+\tvoid *dev_private;\n+\t/**< PMD-specific private data.\n+\t * This is a copy of the 'dev_private' field in the 'struct rte_dmadev'\n+\t * from primary process, it is used by the secondary process to get\n+\t * dev_private information.\n+\t */\n+\tuint16_t dev_id; /**< Device [external] identifier. */\n+\tchar dev_name[RTE_DMADEV_NAME_MAX_LEN]; /**< Unique identifier name */\n+\tstruct rte_dmadev_conf dev_conf; /**< DMA device configuration. */\n+\tuint8_t dev_started : 1; /**< Device state: STARTED(1)/STOPPED(0). */\n+\tuint64_t reserved[2]; /**< Reserved for future fields */\n+} __rte_cache_aligned;\n+\n+/**\n+ * @internal\n+ * The generic data structure associated with each DMA device.\n+ *\n+ * The dataplane APIs are located at the beginning of the structure, along\n+ * with the pointer to where all the data elements for the particular device\n+ * are stored in shared memory. This split scheme allows the function pointer\n+ * and driver data to be per-process, while the actual configuration data for\n+ * the device is shared.\n+ * And the 'dev_private' field was placed in the first cache line to optimize\n+ * performance because the PMD driver mainly depends on this field.\n+ */\n+struct rte_dmadev {\n+\trte_dmadev_copy_t copy;\n+\trte_dmadev_copy_sg_t copy_sg;\n+\trte_dmadev_fill_t fill;\n+\trte_dmadev_submit_t submit;\n+\trte_dmadev_completed_t completed;\n+\trte_dmadev_completed_status_t completed_status;\n+\tvoid *reserved_ptr; /**< Reserved for future IO function. */\n+\tvoid *dev_private;\n+\t/**< PMD-specific private data.\n+\t *\n+\t * - If is the primary process, after dmadev allocated by\n+\t * rte_dmadev_pmd_allocate(), the PCI/SoC device probing should\n+\t * initialize this field, and copy it's value to the 'dev_private'\n+\t * field of 'struct rte_dmadev_data' which pointer by 'data' filed.\n+\t *\n+\t * - If is the secondary process, dmadev framework will initialize this\n+\t * field by copy from 'dev_private' field of 'struct rte_dmadev_data'\n+\t * which initialized by primary process.\n+\t *\n+\t * @note It's the primary process responsibility to deinitialize this\n+\t * field after invoke rte_dmadev_pmd_release() in the PCI/SoC device\n+\t * removing stage.\n+\t */\n+\tstruct rte_dmadev_data *data; /**< Pointer to device data. */\n+\tconst struct rte_dmadev_ops *dev_ops; /**< Functions exported by PMD. */\n+\tstruct rte_device *device;\n+\t/**< Device info which supplied during device initialization. */\n+\tenum rte_dmadev_state state; /**< Flag indicating the device state. */\n+\tuint64_t reserved[2]; /**< Reserved for future fields. */\n+} __rte_cache_aligned;\n+\n+#endif /* _RTE_DMADEV_CORE_H_ */\n", "prefixes": [ "v14", "2/6" ] }