net/mlx5/hws: set the correct VLAN inner_type value

Message ID 20240221062811.298696-1-bingz@nvidia.com (mailing list archive)
State Accepted, archived
Delegated to: Raslan Darawsheh
Headers
Series net/mlx5/hws: set the correct VLAN inner_type value |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation warning apply issues
ci/loongarch-compilation warning apply patch failure
ci/iol-testing warning apply patch failure

Commit Message

Bing Zhao Feb. 21, 2024, 6:28 a.m. UTC
  From: Hamdan Igbaria <hamdani@nvidia.com>

Set the correct VLAN inner_type value, till today the
once the VLAN inner_type field was set, an incorrect
value was taken instead of the inner_type field.

Fixes: c55c2bf35333 ("net/mlx5/hws: add definer layer")
Cc: stable@dpdk.org

Signed-off-by: Hamdan Igbaria <hamdani@nvidia.com>
Reviewed-by: Erez Shitrit <erezsh@nvidia.com>
Acked-by: Suanming Mou <suanmingm@nvidia.com>
---
 drivers/net/mlx5/hws/mlx5dr_definer.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
  

Comments

Raslan Darawsheh Feb. 27, 2024, 4:18 p.m. UTC | #1
Hi,

> -----Original Message-----
> From: Bing Zhao <bingz@nvidia.com>
> Sent: Wednesday, February 21, 2024 8:28 AM
> To: Suanming Mou <suanmingm@nvidia.com>; Raslan Darawsheh
> <rasland@nvidia.com>; dev@dpdk.org
> Cc: Matan Azrad <matan@nvidia.com>; Slava Ovsiienko
> <viacheslavo@nvidia.com>; Ori Kam <orika@nvidia.com>; Dariusz Sosnowski
> <dsosnowski@nvidia.com>; stable@dpdk.org; Hamdan Agbariya
> <hamdani@nvidia.com>; Erez Shitrit <erezsh@nvidia.com>
> Subject: [PATCH] net/mlx5/hws: set the correct VLAN inner_type value
> 
> From: Hamdan Igbaria <hamdani@nvidia.com>
> 
> Set the correct VLAN inner_type value, till today the once the VLAN inner_type
> field was set, an incorrect value was taken instead of the inner_type field.
> 
> Fixes: c55c2bf35333 ("net/mlx5/hws: add definer layer")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Hamdan Igbaria <hamdani@nvidia.com>
> Reviewed-by: Erez Shitrit <erezsh@nvidia.com>
> Acked-by: Suanming Mou <suanmingm@nvidia.com>

Patch applied to next-net-mlx,

Kindest regards,
Raslan Darawsheh
  

Patch

diff --git a/drivers/net/mlx5/hws/mlx5dr_definer.c b/drivers/net/mlx5/hws/mlx5dr_definer.c
index 6585c91e1f..bedf65e66a 100644
--- a/drivers/net/mlx5/hws/mlx5dr_definer.c
+++ b/drivers/net/mlx5/hws/mlx5dr_definer.c
@@ -197,6 +197,7 @@  struct mlx5dr_definer_conv_data {
 	X(SET,		random_number,		v->value,		rte_flow_item_random) \
 	X(SET,		ib_l4_bth_a,		v->hdr.a,		rte_flow_item_ib_bth) \
 	X(SET,		cvlan,			STE_CVLAN,		rte_flow_item_vlan) \
+	X(SET_BE16,	inner_type,		v->inner_type,		rte_flow_item_vlan) \
 
 /* Item set function format */
 #define X(set_type, func_name, value, item_type) \
@@ -873,7 +874,7 @@  mlx5dr_definer_conv_item_vlan(struct mlx5dr_definer_conv_data *cd,
 	if (m->hdr.eth_proto) {
 		fc = &cd->fc[DR_CALC_FNAME(ETH_TYPE, inner)];
 		fc->item_idx = item_idx;
-		fc->tag_set = &mlx5dr_definer_eth_type_set;
+		fc->tag_set = &mlx5dr_definer_inner_type_set;
 		DR_CALC_SET(fc, eth_l2, l3_ethertype, inner);
 	}