[v4,02/14] net/mlx5: fix field reference for PPC

Message ID 20211104123320.1638915-3-xuemingl@nvidia.com (mailing list archive)
State Accepted, archived
Delegated to: Raslan Darawsheh
Headers
Series net/mlx5: support shared Rx queue |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Xueming Li Nov. 4, 2021, 12:33 p.m. UTC
  This patch fixes stale field reference.

Fixes: a18ac6113331 ("net/mlx5: add metadata support to Rx datapath")
Cc: viacheslavo@nvidia.com
Cc: stable@dpdk.org

Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Slava Ovsiienko <viacheslavo@nvidia.com>
---
 drivers/net/mlx5/mlx5_rxtx_vec_altivec.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)
  

Comments

Raslan Darawsheh Nov. 4, 2021, 5:07 p.m. UTC | #1
Hi,

> -----Original Message-----
> From: dev <dev-bounces@dpdk.org> On Behalf Of Xueming Li
> Sent: Thursday, November 4, 2021 2:33 PM
> To: dev@dpdk.org
> Cc: Xueming(Steven) Li <xuemingl@nvidia.com>; Lior Margalit
> <lmargalit@nvidia.com>; Slava Ovsiienko <viacheslavo@nvidia.com>;
> stable@dpdk.org; David Christensen <drc@linux.vnet.ibm.com>; Matan
> Azrad <matan@nvidia.com>; Yongseok Koh <yskoh@mellanox.com>
> Subject: [dpdk-dev] [PATCH v4 02/14] net/mlx5: fix field reference for PPC
> 
> This patch fixes stale field reference.
> 
> Fixes: a18ac6113331 ("net/mlx5: add metadata support to Rx datapath")
> Cc: viacheslavo@nvidia.com
> Cc: stable@dpdk.org
> 

This should be the first patch in the series since the first patch is removing the rsvd3 from the structure.
I'll change the order during integration,

Kindest regards,
Raslan Darawsheh
  
David Christensen Nov. 4, 2021, 5:49 p.m. UTC | #2
On 11/4/21 5:33 AM, Xueming Li wrote:
> This patch fixes stale field reference.
> 
> Fixes: a18ac6113331 ("net/mlx5: add metadata support to Rx datapath")
> Cc: viacheslavo@nvidia.com
> Cc: stable@dpdk.org
> 
> Signed-off-by: Xueming Li <xuemingl@nvidia.com>
> Acked-by: Slava Ovsiienko <viacheslavo@nvidia.com>
> ---
>   drivers/net/mlx5/mlx5_rxtx_vec_altivec.h | 8 ++++----
>   1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h b/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h
> index bcf487c34e9..1d00c1c43d1 100644
> --- a/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h
> +++ b/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h
> @@ -974,10 +974,10 @@ rxq_cq_process_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq,
>   			(vector unsigned short)cqe_tmp1, cqe_sel_mask1);
>   		cqe_tmp2 = (vector unsigned char)(vector unsigned long){
>   			*(__rte_aligned(8) unsigned long *)
> -			&cq[pos + p3].rsvd3[9], 0LL};
> +			&cq[pos + p3].rsvd4[2], 0LL};
>   		cqe_tmp1 = (vector unsigned char)(vector unsigned long){
>   			*(__rte_aligned(8) unsigned long *)
> -			&cq[pos + p2].rsvd3[9], 0LL};
> +			&cq[pos + p2].rsvd4[2], 0LL};
>   		cqes[3] = (vector unsigned char)
>   			vec_sel((vector unsigned short)cqes[3],
>   			(vector unsigned short)cqe_tmp2,
> @@ -1037,10 +1037,10 @@ rxq_cq_process_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq,
>   			(vector unsigned short)cqe_tmp1, cqe_sel_mask1);
>   		cqe_tmp2 = (vector unsigned char)(vector unsigned long){
>   			*(__rte_aligned(8) unsigned long *)
> -			&cq[pos + p1].rsvd3[9], 0LL};
> +			&cq[pos + p1].rsvd4[2], 0LL};
>   		cqe_tmp1 = (vector unsigned char)(vector unsigned long){
>   			*(__rte_aligned(8) unsigned long *)
> -			&cq[pos].rsvd3[9], 0LL};
> +			&cq[pos].rsvd4[2], 0LL};
>   		cqes[1] = (vector unsigned char)
>   			vec_sel((vector unsigned short)cqes[1],
>   			(vector unsigned short)cqe_tmp2, cqe_sel_mask2);
> 

Reviewed-by: David Christensen <drc@linux.vnet.ibm.com>
  

Patch

diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h b/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h
index bcf487c34e9..1d00c1c43d1 100644
--- a/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h
+++ b/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h
@@ -974,10 +974,10 @@  rxq_cq_process_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq,
 			(vector unsigned short)cqe_tmp1, cqe_sel_mask1);
 		cqe_tmp2 = (vector unsigned char)(vector unsigned long){
 			*(__rte_aligned(8) unsigned long *)
-			&cq[pos + p3].rsvd3[9], 0LL};
+			&cq[pos + p3].rsvd4[2], 0LL};
 		cqe_tmp1 = (vector unsigned char)(vector unsigned long){
 			*(__rte_aligned(8) unsigned long *)
-			&cq[pos + p2].rsvd3[9], 0LL};
+			&cq[pos + p2].rsvd4[2], 0LL};
 		cqes[3] = (vector unsigned char)
 			vec_sel((vector unsigned short)cqes[3],
 			(vector unsigned short)cqe_tmp2,
@@ -1037,10 +1037,10 @@  rxq_cq_process_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq,
 			(vector unsigned short)cqe_tmp1, cqe_sel_mask1);
 		cqe_tmp2 = (vector unsigned char)(vector unsigned long){
 			*(__rte_aligned(8) unsigned long *)
-			&cq[pos + p1].rsvd3[9], 0LL};
+			&cq[pos + p1].rsvd4[2], 0LL};
 		cqe_tmp1 = (vector unsigned char)(vector unsigned long){
 			*(__rte_aligned(8) unsigned long *)
-			&cq[pos].rsvd3[9], 0LL};
+			&cq[pos].rsvd4[2], 0LL};
 		cqes[1] = (vector unsigned char)
 			vec_sel((vector unsigned short)cqes[1],
 			(vector unsigned short)cqe_tmp2, cqe_sel_mask2);