[06/14] pci: define some command constants
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Commit Message
Define some PCI command constants and use them in existing drivers.
Signed-off-by: David Marchand <david.marchand@redhat.com>
---
drivers/bus/pci/linux/pci_vfio.c | 8 ++++----
drivers/event/dlb2/pf/dlb2_main.c | 8 +++-----
lib/pci/rte_pci.h | 4 +++-
3 files changed, 10 insertions(+), 10 deletions(-)
Comments
On Thu, Aug 03, 2023 at 09:50:29AM +0200, David Marchand wrote:
> Define some PCI command constants and use them in existing drivers.
>
> Signed-off-by: David Marchand <david.marchand@redhat.com>
> ---
For the idea, all good, but for the implementation, one comment inline
below.
With the below reworked:
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
> drivers/bus/pci/linux/pci_vfio.c | 8 ++++----
> drivers/event/dlb2/pf/dlb2_main.c | 8 +++-----
> lib/pci/rte_pci.h | 4 +++-
> 3 files changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/bus/pci/linux/pci_vfio.c b/drivers/bus/pci/linux/pci_vfio.c
> index 6d13cafdcf..f96b3ce7fb 100644
> --- a/drivers/bus/pci/linux/pci_vfio.c
> +++ b/drivers/bus/pci/linux/pci_vfio.c
> @@ -156,18 +156,18 @@ pci_vfio_enable_bus_memory(struct rte_pci_device *dev, int dev_fd)
> return -1;
> }
>
> - ret = pread64(dev_fd, &cmd, sizeof(cmd), offset + PCI_COMMAND);
> + ret = pread64(dev_fd, &cmd, sizeof(cmd), offset + RTE_PCI_COMMAND);
>
> if (ret != sizeof(cmd)) {
> RTE_LOG(ERR, EAL, "Cannot read command from PCI config space!\n");
> return -1;
> }
>
> - if (cmd & PCI_COMMAND_MEMORY)
> + if (cmd & RTE_PCI_COMMAND_MEMORY)
> return 0;
>
> - cmd |= PCI_COMMAND_MEMORY;
> - ret = pwrite64(dev_fd, &cmd, sizeof(cmd), offset + PCI_COMMAND);
> + cmd |= RTE_PCI_COMMAND_MEMORY;
> + ret = pwrite64(dev_fd, &cmd, sizeof(cmd), offset + RTE_PCI_COMMAND);
>
> if (ret != sizeof(cmd)) {
> RTE_LOG(ERR, EAL, "Cannot write command to PCI config space!\n");
> diff --git a/drivers/event/dlb2/pf/dlb2_main.c b/drivers/event/dlb2/pf/dlb2_main.c
> index c6606a9bee..6dbaa2ff97 100644
> --- a/drivers/event/dlb2/pf/dlb2_main.c
> +++ b/drivers/event/dlb2/pf/dlb2_main.c
> @@ -33,7 +33,6 @@
> #define DLB2_PCI_EXP_DEVCTL2 40
> #define DLB2_PCI_LNKCTL2 48
> #define DLB2_PCI_SLTCTL2 56
> -#define DLB2_PCI_CMD 4
> #define DLB2_PCI_EXP_DEVSTA 10
> #define DLB2_PCI_EXP_DEVSTA_TRPND 0x20
> #define DLB2_PCI_EXP_DEVCTL_BCR_FLR 0x8000
> @@ -47,7 +46,6 @@
> #define DLB2_PCI_ERR_ROOT_STATUS 0x30
> #define DLB2_PCI_ERR_COR_STATUS 0x10
> #define DLB2_PCI_ERR_UNCOR_STATUS 0x4
> -#define DLB2_PCI_COMMAND_INTX_DISABLE 0x400
> #define DLB2_PCI_ACS_CAP 0x4
> #define DLB2_PCI_ACS_CTRL 0x6
> #define DLB2_PCI_ACS_SV 0x1
> @@ -286,7 +284,7 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
>
> /* clear the PCI command register before issuing the FLR */
>
> - off = DLB2_PCI_CMD;
> + off = RTE_PCI_COMMAND;
> cmd = 0;
> if (rte_pci_write_config(pdev, &cmd, 2, off) != 2) {
> DLB2_LOG_ERR("[%s()] failed to write the pci command\n",
> @@ -468,9 +466,9 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
> }
> }
>
> - off = DLB2_PCI_CMD;
> + off = RTE_PCI_COMMAND;
> if (rte_pci_read_config(pdev, &cmd, 2, off) == 2) {
> - cmd &= ~DLB2_PCI_COMMAND_INTX_DISABLE;
> + cmd &= ~RTE_PCI_COMMAND_INTX_DISABLE;
> if (rte_pci_write_config(pdev, &cmd, 2, off) != 2) {
> DLB2_LOG_ERR("[%s()] failed to write the pci command\n",
> __func__);
> diff --git a/lib/pci/rte_pci.h b/lib/pci/rte_pci.h
> index a055a28592..bf2b2639f4 100644
> --- a/lib/pci/rte_pci.h
> +++ b/lib/pci/rte_pci.h
> @@ -32,10 +32,12 @@ extern "C" {
>
> #define RTE_PCI_VENDOR_ID 0x00 /* 16 bits */
> #define RTE_PCI_DEVICE_ID 0x02 /* 16 bits */
> -#define RTE_PCI_COMMAND 0x04 /* 16 bits */
>
> /* PCI Command Register */
> +#define RTE_PCI_COMMAND 0x04 /* 16 bits */
> +#define RTE_PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
> #define RTE_PCI_COMMAND_MASTER 0x4 /* Bus Master Enable */
> +#define RTE_PCI_COMMAND_INTX_DISABLE 0x400 /* INTx Emulation Disable */
>
It's weird here to have two defines in the same block with the same value -
even if one is 0x04 and the other is 0x4. That implies that the two values
don't belong in the same block of defines.
Question - would enums make sense for defining any of these? It allows
the groups to be named?
> /* PCI Status Register */
> #define RTE_PCI_STATUS 0x06 /* 16 bits */
> --
> 2.41.0
>
On Thu, Aug 3, 2023 at 11:58 AM Bruce Richardson
<bruce.richardson@intel.com> wrote:
>
> On Thu, Aug 03, 2023 at 09:50:29AM +0200, David Marchand wrote:
> > Define some PCI command constants and use them in existing drivers.
> >
> > Signed-off-by: David Marchand <david.marchand@redhat.com>
> > ---
>
> For the idea, all good, but for the implementation, one comment inline
> below.
>
> With the below reworked:
>
> Acked-by: Bruce Richardson <bruce.richardson@intel.com>
>
> > drivers/bus/pci/linux/pci_vfio.c | 8 ++++----
> > drivers/event/dlb2/pf/dlb2_main.c | 8 +++-----
> > lib/pci/rte_pci.h | 4 +++-
> > 3 files changed, 10 insertions(+), 10 deletions(-)
> >
> > diff --git a/drivers/bus/pci/linux/pci_vfio.c b/drivers/bus/pci/linux/pci_vfio.c
> > index 6d13cafdcf..f96b3ce7fb 100644
> > --- a/drivers/bus/pci/linux/pci_vfio.c
> > +++ b/drivers/bus/pci/linux/pci_vfio.c
> > @@ -156,18 +156,18 @@ pci_vfio_enable_bus_memory(struct rte_pci_device *dev, int dev_fd)
> > return -1;
> > }
> >
> > - ret = pread64(dev_fd, &cmd, sizeof(cmd), offset + PCI_COMMAND);
> > + ret = pread64(dev_fd, &cmd, sizeof(cmd), offset + RTE_PCI_COMMAND);
> >
> > if (ret != sizeof(cmd)) {
> > RTE_LOG(ERR, EAL, "Cannot read command from PCI config space!\n");
> > return -1;
> > }
> >
> > - if (cmd & PCI_COMMAND_MEMORY)
> > + if (cmd & RTE_PCI_COMMAND_MEMORY)
> > return 0;
> >
> > - cmd |= PCI_COMMAND_MEMORY;
> > - ret = pwrite64(dev_fd, &cmd, sizeof(cmd), offset + PCI_COMMAND);
> > + cmd |= RTE_PCI_COMMAND_MEMORY;
> > + ret = pwrite64(dev_fd, &cmd, sizeof(cmd), offset + RTE_PCI_COMMAND);
> >
> > if (ret != sizeof(cmd)) {
> > RTE_LOG(ERR, EAL, "Cannot write command to PCI config space!\n");
> > diff --git a/drivers/event/dlb2/pf/dlb2_main.c b/drivers/event/dlb2/pf/dlb2_main.c
> > index c6606a9bee..6dbaa2ff97 100644
> > --- a/drivers/event/dlb2/pf/dlb2_main.c
> > +++ b/drivers/event/dlb2/pf/dlb2_main.c
> > @@ -33,7 +33,6 @@
> > #define DLB2_PCI_EXP_DEVCTL2 40
> > #define DLB2_PCI_LNKCTL2 48
> > #define DLB2_PCI_SLTCTL2 56
> > -#define DLB2_PCI_CMD 4
> > #define DLB2_PCI_EXP_DEVSTA 10
> > #define DLB2_PCI_EXP_DEVSTA_TRPND 0x20
> > #define DLB2_PCI_EXP_DEVCTL_BCR_FLR 0x8000
> > @@ -47,7 +46,6 @@
> > #define DLB2_PCI_ERR_ROOT_STATUS 0x30
> > #define DLB2_PCI_ERR_COR_STATUS 0x10
> > #define DLB2_PCI_ERR_UNCOR_STATUS 0x4
> > -#define DLB2_PCI_COMMAND_INTX_DISABLE 0x400
> > #define DLB2_PCI_ACS_CAP 0x4
> > #define DLB2_PCI_ACS_CTRL 0x6
> > #define DLB2_PCI_ACS_SV 0x1
> > @@ -286,7 +284,7 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
> >
> > /* clear the PCI command register before issuing the FLR */
> >
> > - off = DLB2_PCI_CMD;
> > + off = RTE_PCI_COMMAND;
> > cmd = 0;
> > if (rte_pci_write_config(pdev, &cmd, 2, off) != 2) {
> > DLB2_LOG_ERR("[%s()] failed to write the pci command\n",
> > @@ -468,9 +466,9 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
> > }
> > }
> >
> > - off = DLB2_PCI_CMD;
> > + off = RTE_PCI_COMMAND;
> > if (rte_pci_read_config(pdev, &cmd, 2, off) == 2) {
> > - cmd &= ~DLB2_PCI_COMMAND_INTX_DISABLE;
> > + cmd &= ~RTE_PCI_COMMAND_INTX_DISABLE;
> > if (rte_pci_write_config(pdev, &cmd, 2, off) != 2) {
> > DLB2_LOG_ERR("[%s()] failed to write the pci command\n",
> > __func__);
> > diff --git a/lib/pci/rte_pci.h b/lib/pci/rte_pci.h
> > index a055a28592..bf2b2639f4 100644
> > --- a/lib/pci/rte_pci.h
> > +++ b/lib/pci/rte_pci.h
> > @@ -32,10 +32,12 @@ extern "C" {
> >
> > #define RTE_PCI_VENDOR_ID 0x00 /* 16 bits */
> > #define RTE_PCI_DEVICE_ID 0x02 /* 16 bits */
> > -#define RTE_PCI_COMMAND 0x04 /* 16 bits */
> >
> > /* PCI Command Register */
> > +#define RTE_PCI_COMMAND 0x04 /* 16 bits */
> > +#define RTE_PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
> > #define RTE_PCI_COMMAND_MASTER 0x4 /* Bus Master Enable */
> > +#define RTE_PCI_COMMAND_INTX_DISABLE 0x400 /* INTx Emulation Disable */
> >
>
> It's weird here to have two defines in the same block with the same value -
> even if one is 0x04 and the other is 0x4. That implies that the two values
> don't belong in the same block of defines.
>
> Question - would enums make sense for defining any of these? It allows
> the groups to be named?
That's something I will look into, or at least better organise the defines..
On Thu, Aug 3, 2023 at 1:51 PM David Marchand <david.marchand@redhat.com> wrote:
>
> On Thu, Aug 3, 2023 at 11:58 AM Bruce Richardson
> <bruce.richardson@intel.com> wrote:
> >
> > On Thu, Aug 03, 2023 at 09:50:29AM +0200, David Marchand wrote:
> > > Define some PCI command constants and use them in existing drivers.
> > >
> > > Signed-off-by: David Marchand <david.marchand@redhat.com>
> > > ---
> >
> > For the idea, all good, but for the implementation, one comment inline
> > below.
> >
> > With the below reworked:
> >
> > Acked-by: Bruce Richardson <bruce.richardson@intel.com>
> >
> > > drivers/bus/pci/linux/pci_vfio.c | 8 ++++----
> > > drivers/event/dlb2/pf/dlb2_main.c | 8 +++-----
> > > lib/pci/rte_pci.h | 4 +++-
> > > 3 files changed, 10 insertions(+), 10 deletions(-)
> > >
> > > diff --git a/drivers/bus/pci/linux/pci_vfio.c b/drivers/bus/pci/linux/pci_vfio.c
> > > index 6d13cafdcf..f96b3ce7fb 100644
> > > --- a/drivers/bus/pci/linux/pci_vfio.c
> > > +++ b/drivers/bus/pci/linux/pci_vfio.c
> > > @@ -156,18 +156,18 @@ pci_vfio_enable_bus_memory(struct rte_pci_device *dev, int dev_fd)
> > > return -1;
> > > }
> > >
> > > - ret = pread64(dev_fd, &cmd, sizeof(cmd), offset + PCI_COMMAND);
> > > + ret = pread64(dev_fd, &cmd, sizeof(cmd), offset + RTE_PCI_COMMAND);
> > >
> > > if (ret != sizeof(cmd)) {
> > > RTE_LOG(ERR, EAL, "Cannot read command from PCI config space!\n");
> > > return -1;
> > > }
> > >
> > > - if (cmd & PCI_COMMAND_MEMORY)
> > > + if (cmd & RTE_PCI_COMMAND_MEMORY)
> > > return 0;
> > >
> > > - cmd |= PCI_COMMAND_MEMORY;
> > > - ret = pwrite64(dev_fd, &cmd, sizeof(cmd), offset + PCI_COMMAND);
> > > + cmd |= RTE_PCI_COMMAND_MEMORY;
> > > + ret = pwrite64(dev_fd, &cmd, sizeof(cmd), offset + RTE_PCI_COMMAND);
> > >
> > > if (ret != sizeof(cmd)) {
> > > RTE_LOG(ERR, EAL, "Cannot write command to PCI config space!\n");
> > > diff --git a/drivers/event/dlb2/pf/dlb2_main.c b/drivers/event/dlb2/pf/dlb2_main.c
> > > index c6606a9bee..6dbaa2ff97 100644
> > > --- a/drivers/event/dlb2/pf/dlb2_main.c
> > > +++ b/drivers/event/dlb2/pf/dlb2_main.c
> > > @@ -33,7 +33,6 @@
> > > #define DLB2_PCI_EXP_DEVCTL2 40
> > > #define DLB2_PCI_LNKCTL2 48
> > > #define DLB2_PCI_SLTCTL2 56
> > > -#define DLB2_PCI_CMD 4
> > > #define DLB2_PCI_EXP_DEVSTA 10
> > > #define DLB2_PCI_EXP_DEVSTA_TRPND 0x20
> > > #define DLB2_PCI_EXP_DEVCTL_BCR_FLR 0x8000
> > > @@ -47,7 +46,6 @@
> > > #define DLB2_PCI_ERR_ROOT_STATUS 0x30
> > > #define DLB2_PCI_ERR_COR_STATUS 0x10
> > > #define DLB2_PCI_ERR_UNCOR_STATUS 0x4
> > > -#define DLB2_PCI_COMMAND_INTX_DISABLE 0x400
> > > #define DLB2_PCI_ACS_CAP 0x4
> > > #define DLB2_PCI_ACS_CTRL 0x6
> > > #define DLB2_PCI_ACS_SV 0x1
> > > @@ -286,7 +284,7 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
> > >
> > > /* clear the PCI command register before issuing the FLR */
> > >
> > > - off = DLB2_PCI_CMD;
> > > + off = RTE_PCI_COMMAND;
> > > cmd = 0;
> > > if (rte_pci_write_config(pdev, &cmd, 2, off) != 2) {
> > > DLB2_LOG_ERR("[%s()] failed to write the pci command\n",
> > > @@ -468,9 +466,9 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
> > > }
> > > }
> > >
> > > - off = DLB2_PCI_CMD;
> > > + off = RTE_PCI_COMMAND;
> > > if (rte_pci_read_config(pdev, &cmd, 2, off) == 2) {
> > > - cmd &= ~DLB2_PCI_COMMAND_INTX_DISABLE;
> > > + cmd &= ~RTE_PCI_COMMAND_INTX_DISABLE;
> > > if (rte_pci_write_config(pdev, &cmd, 2, off) != 2) {
> > > DLB2_LOG_ERR("[%s()] failed to write the pci command\n",
> > > __func__);
> > > diff --git a/lib/pci/rte_pci.h b/lib/pci/rte_pci.h
> > > index a055a28592..bf2b2639f4 100644
> > > --- a/lib/pci/rte_pci.h
> > > +++ b/lib/pci/rte_pci.h
> > > @@ -32,10 +32,12 @@ extern "C" {
> > >
> > > #define RTE_PCI_VENDOR_ID 0x00 /* 16 bits */
> > > #define RTE_PCI_DEVICE_ID 0x02 /* 16 bits */
> > > -#define RTE_PCI_COMMAND 0x04 /* 16 bits */
> > >
> > > /* PCI Command Register */
> > > +#define RTE_PCI_COMMAND 0x04 /* 16 bits */
> > > +#define RTE_PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
> > > #define RTE_PCI_COMMAND_MASTER 0x4 /* Bus Master Enable */
> > > +#define RTE_PCI_COMMAND_INTX_DISABLE 0x400 /* INTx Emulation Disable */
> > >
> >
> > It's weird here to have two defines in the same block with the same value -
> > even if one is 0x04 and the other is 0x4. That implies that the two values
> > don't belong in the same block of defines.
> >
> > Question - would enums make sense for defining any of these? It allows
> > the groups to be named?
>
> That's something I will look into, or at least better organise the defines..
At least, using enum would be a (minor) change in the API, as macros
were used so far and maybe some users were relying on them (#ifdef /
#ifndef).
I relooked at linux/pci_regs.h which organises those defines a bit as
I did, but with some kind of indentation (double space) to separate
the first offset of a block and the rest of the defines related to
said block of defines/registers.
Example:
#define PCI_COMMAND 0x04 /* 16 bits */
#define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */
#define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
#define PCI_COMMAND_MASTER 0x4 /* Enable bus mastering */
#define PCI_COMMAND_SPECIAL 0x8 /* Enable response to special cycles */
On Tue, Aug 08, 2023 at 11:20:28AM +0200, David Marchand wrote:
> On Thu, Aug 3, 2023 at 1:51 PM David Marchand <david.marchand@redhat.com> wrote:
> >
> > On Thu, Aug 3, 2023 at 11:58 AM Bruce Richardson
> > <bruce.richardson@intel.com> wrote:
> > >
> > > On Thu, Aug 03, 2023 at 09:50:29AM +0200, David Marchand wrote:
> > > > Define some PCI command constants and use them in existing drivers.
> > > >
> > > > Signed-off-by: David Marchand <david.marchand@redhat.com>
> > > > ---
> > >
> > > For the idea, all good, but for the implementation, one comment inline
> > > below.
> > >
> > > With the below reworked:
> > >
> > > Acked-by: Bruce Richardson <bruce.richardson@intel.com>
> > >
> > > > drivers/bus/pci/linux/pci_vfio.c | 8 ++++----
> > > > drivers/event/dlb2/pf/dlb2_main.c | 8 +++-----
> > > > lib/pci/rte_pci.h | 4 +++-
> > > > 3 files changed, 10 insertions(+), 10 deletions(-)
> > > >
> > > > diff --git a/drivers/bus/pci/linux/pci_vfio.c b/drivers/bus/pci/linux/pci_vfio.c
> > > > index 6d13cafdcf..f96b3ce7fb 100644
> > > > --- a/drivers/bus/pci/linux/pci_vfio.c
> > > > +++ b/drivers/bus/pci/linux/pci_vfio.c
> > > > @@ -156,18 +156,18 @@ pci_vfio_enable_bus_memory(struct rte_pci_device *dev, int dev_fd)
> > > > return -1;
> > > > }
> > > >
> > > > - ret = pread64(dev_fd, &cmd, sizeof(cmd), offset + PCI_COMMAND);
> > > > + ret = pread64(dev_fd, &cmd, sizeof(cmd), offset + RTE_PCI_COMMAND);
> > > >
> > > > if (ret != sizeof(cmd)) {
> > > > RTE_LOG(ERR, EAL, "Cannot read command from PCI config space!\n");
> > > > return -1;
> > > > }
> > > >
> > > > - if (cmd & PCI_COMMAND_MEMORY)
> > > > + if (cmd & RTE_PCI_COMMAND_MEMORY)
> > > > return 0;
> > > >
> > > > - cmd |= PCI_COMMAND_MEMORY;
> > > > - ret = pwrite64(dev_fd, &cmd, sizeof(cmd), offset + PCI_COMMAND);
> > > > + cmd |= RTE_PCI_COMMAND_MEMORY;
> > > > + ret = pwrite64(dev_fd, &cmd, sizeof(cmd), offset + RTE_PCI_COMMAND);
> > > >
> > > > if (ret != sizeof(cmd)) {
> > > > RTE_LOG(ERR, EAL, "Cannot write command to PCI config space!\n");
> > > > diff --git a/drivers/event/dlb2/pf/dlb2_main.c b/drivers/event/dlb2/pf/dlb2_main.c
> > > > index c6606a9bee..6dbaa2ff97 100644
> > > > --- a/drivers/event/dlb2/pf/dlb2_main.c
> > > > +++ b/drivers/event/dlb2/pf/dlb2_main.c
> > > > @@ -33,7 +33,6 @@
> > > > #define DLB2_PCI_EXP_DEVCTL2 40
> > > > #define DLB2_PCI_LNKCTL2 48
> > > > #define DLB2_PCI_SLTCTL2 56
> > > > -#define DLB2_PCI_CMD 4
> > > > #define DLB2_PCI_EXP_DEVSTA 10
> > > > #define DLB2_PCI_EXP_DEVSTA_TRPND 0x20
> > > > #define DLB2_PCI_EXP_DEVCTL_BCR_FLR 0x8000
> > > > @@ -47,7 +46,6 @@
> > > > #define DLB2_PCI_ERR_ROOT_STATUS 0x30
> > > > #define DLB2_PCI_ERR_COR_STATUS 0x10
> > > > #define DLB2_PCI_ERR_UNCOR_STATUS 0x4
> > > > -#define DLB2_PCI_COMMAND_INTX_DISABLE 0x400
> > > > #define DLB2_PCI_ACS_CAP 0x4
> > > > #define DLB2_PCI_ACS_CTRL 0x6
> > > > #define DLB2_PCI_ACS_SV 0x1
> > > > @@ -286,7 +284,7 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
> > > >
> > > > /* clear the PCI command register before issuing the FLR */
> > > >
> > > > - off = DLB2_PCI_CMD;
> > > > + off = RTE_PCI_COMMAND;
> > > > cmd = 0;
> > > > if (rte_pci_write_config(pdev, &cmd, 2, off) != 2) {
> > > > DLB2_LOG_ERR("[%s()] failed to write the pci command\n",
> > > > @@ -468,9 +466,9 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
> > > > }
> > > > }
> > > >
> > > > - off = DLB2_PCI_CMD;
> > > > + off = RTE_PCI_COMMAND;
> > > > if (rte_pci_read_config(pdev, &cmd, 2, off) == 2) {
> > > > - cmd &= ~DLB2_PCI_COMMAND_INTX_DISABLE;
> > > > + cmd &= ~RTE_PCI_COMMAND_INTX_DISABLE;
> > > > if (rte_pci_write_config(pdev, &cmd, 2, off) != 2) {
> > > > DLB2_LOG_ERR("[%s()] failed to write the pci command\n",
> > > > __func__);
> > > > diff --git a/lib/pci/rte_pci.h b/lib/pci/rte_pci.h
> > > > index a055a28592..bf2b2639f4 100644
> > > > --- a/lib/pci/rte_pci.h
> > > > +++ b/lib/pci/rte_pci.h
> > > > @@ -32,10 +32,12 @@ extern "C" {
> > > >
> > > > #define RTE_PCI_VENDOR_ID 0x00 /* 16 bits */
> > > > #define RTE_PCI_DEVICE_ID 0x02 /* 16 bits */
> > > > -#define RTE_PCI_COMMAND 0x04 /* 16 bits */
> > > >
> > > > /* PCI Command Register */
> > > > +#define RTE_PCI_COMMAND 0x04 /* 16 bits */
> > > > +#define RTE_PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
> > > > #define RTE_PCI_COMMAND_MASTER 0x4 /* Bus Master Enable */
> > > > +#define RTE_PCI_COMMAND_INTX_DISABLE 0x400 /* INTx Emulation Disable */
> > > >
> > >
> > > It's weird here to have two defines in the same block with the same value -
> > > even if one is 0x04 and the other is 0x4. That implies that the two values
> > > don't belong in the same block of defines.
> > >
> > > Question - would enums make sense for defining any of these? It allows
> > > the groups to be named?
> >
> > That's something I will look into, or at least better organise the defines..
>
> At least, using enum would be a (minor) change in the API, as macros
> were used so far and maybe some users were relying on them (#ifdef /
> #ifndef).
>
> I relooked at linux/pci_regs.h which organises those defines a bit as
> I did, but with some kind of indentation (double space) to separate
> the first offset of a block and the rest of the defines related to
> said block of defines/registers.
> Example:
> #define PCI_COMMAND 0x04 /* 16 bits */
> #define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */
> #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
> #define PCI_COMMAND_MASTER 0x4 /* Enable bus mastering */
> #define PCI_COMMAND_SPECIAL 0x8 /* Enable response to special cycles */
>
>
I'd still prefer grouping with enums, but ok with this approach too.
/Bruce
Recheck-request: iol-sample-apps-testing,
This email is a test of the community lab's retesting system, please
ignore. Testing superseded reply on a patch.
On Thu, Aug 3, 2023 at 3:51 AM David Marchand <david.marchand@redhat.com>
wrote:
> Define some PCI command constants and use them in existing drivers.
>
> Signed-off-by: David Marchand <david.marchand@redhat.com>
> ---
> drivers/bus/pci/linux/pci_vfio.c | 8 ++++----
> drivers/event/dlb2/pf/dlb2_main.c | 8 +++-----
> lib/pci/rte_pci.h | 4 +++-
> 3 files changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/bus/pci/linux/pci_vfio.c
> b/drivers/bus/pci/linux/pci_vfio.c
> index 6d13cafdcf..f96b3ce7fb 100644
> --- a/drivers/bus/pci/linux/pci_vfio.c
> +++ b/drivers/bus/pci/linux/pci_vfio.c
> @@ -156,18 +156,18 @@ pci_vfio_enable_bus_memory(struct rte_pci_device
> *dev, int dev_fd)
> return -1;
> }
>
> - ret = pread64(dev_fd, &cmd, sizeof(cmd), offset + PCI_COMMAND);
> + ret = pread64(dev_fd, &cmd, sizeof(cmd), offset + RTE_PCI_COMMAND);
>
> if (ret != sizeof(cmd)) {
> RTE_LOG(ERR, EAL, "Cannot read command from PCI config
> space!\n");
> return -1;
> }
>
> - if (cmd & PCI_COMMAND_MEMORY)
> + if (cmd & RTE_PCI_COMMAND_MEMORY)
> return 0;
>
> - cmd |= PCI_COMMAND_MEMORY;
> - ret = pwrite64(dev_fd, &cmd, sizeof(cmd), offset + PCI_COMMAND);
> + cmd |= RTE_PCI_COMMAND_MEMORY;
> + ret = pwrite64(dev_fd, &cmd, sizeof(cmd), offset +
> RTE_PCI_COMMAND);
>
> if (ret != sizeof(cmd)) {
> RTE_LOG(ERR, EAL, "Cannot write command to PCI config
> space!\n");
> diff --git a/drivers/event/dlb2/pf/dlb2_main.c
> b/drivers/event/dlb2/pf/dlb2_main.c
> index c6606a9bee..6dbaa2ff97 100644
> --- a/drivers/event/dlb2/pf/dlb2_main.c
> +++ b/drivers/event/dlb2/pf/dlb2_main.c
> @@ -33,7 +33,6 @@
> #define DLB2_PCI_EXP_DEVCTL2 40
> #define DLB2_PCI_LNKCTL2 48
> #define DLB2_PCI_SLTCTL2 56
> -#define DLB2_PCI_CMD 4
> #define DLB2_PCI_EXP_DEVSTA 10
> #define DLB2_PCI_EXP_DEVSTA_TRPND 0x20
> #define DLB2_PCI_EXP_DEVCTL_BCR_FLR 0x8000
> @@ -47,7 +46,6 @@
> #define DLB2_PCI_ERR_ROOT_STATUS 0x30
> #define DLB2_PCI_ERR_COR_STATUS 0x10
> #define DLB2_PCI_ERR_UNCOR_STATUS 0x4
> -#define DLB2_PCI_COMMAND_INTX_DISABLE 0x400
> #define DLB2_PCI_ACS_CAP 0x4
> #define DLB2_PCI_ACS_CTRL 0x6
> #define DLB2_PCI_ACS_SV 0x1
> @@ -286,7 +284,7 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
>
> /* clear the PCI command register before issuing the FLR */
>
> - off = DLB2_PCI_CMD;
> + off = RTE_PCI_COMMAND;
> cmd = 0;
> if (rte_pci_write_config(pdev, &cmd, 2, off) != 2) {
> DLB2_LOG_ERR("[%s()] failed to write the pci command\n",
> @@ -468,9 +466,9 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
> }
> }
>
> - off = DLB2_PCI_CMD;
> + off = RTE_PCI_COMMAND;
> if (rte_pci_read_config(pdev, &cmd, 2, off) == 2) {
> - cmd &= ~DLB2_PCI_COMMAND_INTX_DISABLE;
> + cmd &= ~RTE_PCI_COMMAND_INTX_DISABLE;
> if (rte_pci_write_config(pdev, &cmd, 2, off) != 2) {
> DLB2_LOG_ERR("[%s()] failed to write the pci
> command\n",
> __func__);
> diff --git a/lib/pci/rte_pci.h b/lib/pci/rte_pci.h
> index a055a28592..bf2b2639f4 100644
> --- a/lib/pci/rte_pci.h
> +++ b/lib/pci/rte_pci.h
> @@ -32,10 +32,12 @@ extern "C" {
>
> #define RTE_PCI_VENDOR_ID 0x00 /* 16 bits */
> #define RTE_PCI_DEVICE_ID 0x02 /* 16 bits */
> -#define RTE_PCI_COMMAND 0x04 /* 16 bits */
>
> /* PCI Command Register */
> +#define RTE_PCI_COMMAND 0x04 /* 16 bits */
> +#define RTE_PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space
> */
> #define RTE_PCI_COMMAND_MASTER 0x4 /* Bus Master Enable */
> +#define RTE_PCI_COMMAND_INTX_DISABLE 0x400 /* INTx Emulation Disable */
>
> /* PCI Status Register */
> #define RTE_PCI_STATUS 0x06 /* 16 bits */
> --
> 2.41.0
>
>
@@ -156,18 +156,18 @@ pci_vfio_enable_bus_memory(struct rte_pci_device *dev, int dev_fd)
return -1;
}
- ret = pread64(dev_fd, &cmd, sizeof(cmd), offset + PCI_COMMAND);
+ ret = pread64(dev_fd, &cmd, sizeof(cmd), offset + RTE_PCI_COMMAND);
if (ret != sizeof(cmd)) {
RTE_LOG(ERR, EAL, "Cannot read command from PCI config space!\n");
return -1;
}
- if (cmd & PCI_COMMAND_MEMORY)
+ if (cmd & RTE_PCI_COMMAND_MEMORY)
return 0;
- cmd |= PCI_COMMAND_MEMORY;
- ret = pwrite64(dev_fd, &cmd, sizeof(cmd), offset + PCI_COMMAND);
+ cmd |= RTE_PCI_COMMAND_MEMORY;
+ ret = pwrite64(dev_fd, &cmd, sizeof(cmd), offset + RTE_PCI_COMMAND);
if (ret != sizeof(cmd)) {
RTE_LOG(ERR, EAL, "Cannot write command to PCI config space!\n");
@@ -33,7 +33,6 @@
#define DLB2_PCI_EXP_DEVCTL2 40
#define DLB2_PCI_LNKCTL2 48
#define DLB2_PCI_SLTCTL2 56
-#define DLB2_PCI_CMD 4
#define DLB2_PCI_EXP_DEVSTA 10
#define DLB2_PCI_EXP_DEVSTA_TRPND 0x20
#define DLB2_PCI_EXP_DEVCTL_BCR_FLR 0x8000
@@ -47,7 +46,6 @@
#define DLB2_PCI_ERR_ROOT_STATUS 0x30
#define DLB2_PCI_ERR_COR_STATUS 0x10
#define DLB2_PCI_ERR_UNCOR_STATUS 0x4
-#define DLB2_PCI_COMMAND_INTX_DISABLE 0x400
#define DLB2_PCI_ACS_CAP 0x4
#define DLB2_PCI_ACS_CTRL 0x6
#define DLB2_PCI_ACS_SV 0x1
@@ -286,7 +284,7 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
/* clear the PCI command register before issuing the FLR */
- off = DLB2_PCI_CMD;
+ off = RTE_PCI_COMMAND;
cmd = 0;
if (rte_pci_write_config(pdev, &cmd, 2, off) != 2) {
DLB2_LOG_ERR("[%s()] failed to write the pci command\n",
@@ -468,9 +466,9 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
}
}
- off = DLB2_PCI_CMD;
+ off = RTE_PCI_COMMAND;
if (rte_pci_read_config(pdev, &cmd, 2, off) == 2) {
- cmd &= ~DLB2_PCI_COMMAND_INTX_DISABLE;
+ cmd &= ~RTE_PCI_COMMAND_INTX_DISABLE;
if (rte_pci_write_config(pdev, &cmd, 2, off) != 2) {
DLB2_LOG_ERR("[%s()] failed to write the pci command\n",
__func__);
@@ -32,10 +32,12 @@ extern "C" {
#define RTE_PCI_VENDOR_ID 0x00 /* 16 bits */
#define RTE_PCI_DEVICE_ID 0x02 /* 16 bits */
-#define RTE_PCI_COMMAND 0x04 /* 16 bits */
/* PCI Command Register */
+#define RTE_PCI_COMMAND 0x04 /* 16 bits */
+#define RTE_PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
#define RTE_PCI_COMMAND_MASTER 0x4 /* Bus Master Enable */
+#define RTE_PCI_COMMAND_INTX_DISABLE 0x400 /* INTx Emulation Disable */
/* PCI Status Register */
#define RTE_PCI_STATUS 0x06 /* 16 bits */